2019-05-29 14:17:58 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2015-03-31 18:36:33 +00:00
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#ifndef __DSI_CONNECTOR_H__
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#define __DSI_CONNECTOR_H__
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2015-05-15 17:04:06 +00:00
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#include <linux/of_platform.h>
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2015-03-31 18:36:33 +00:00
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#include <linux/platform_device.h>
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2019-08-26 15:26:29 +00:00
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#include <drm/drm_bridge.h>
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2017-04-24 04:50:28 +00:00
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#include <drm/drm_crtc.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_panel.h>
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2015-03-31 18:36:33 +00:00
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#include "msm_drv.h"
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#define DSI_0 0
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#define DSI_1 1
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#define DSI_MAX 2
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2016-09-15 09:04:49 +00:00
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struct msm_dsi_phy_shared_timings;
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2017-01-07 08:54:38 +00:00
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struct msm_dsi_phy_clk_request;
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2016-09-15 09:04:49 +00:00
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2015-05-15 17:04:05 +00:00
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enum msm_dsi_phy_type {
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MSM_DSI_PHY_28NM_HPM,
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MSM_DSI_PHY_28NM_LP,
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2015-06-18 14:14:21 +00:00
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MSM_DSI_PHY_20NM,
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2015-10-14 06:30:34 +00:00
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MSM_DSI_PHY_28NM_8960,
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2017-01-03 14:15:43 +00:00
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MSM_DSI_PHY_14NM,
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2018-01-17 06:05:25 +00:00
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MSM_DSI_PHY_10NM,
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2015-05-15 17:04:05 +00:00
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MSM_DSI_PHY_MAX
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};
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2016-09-15 09:14:22 +00:00
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enum msm_dsi_phy_usecase {
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MSM_DSI_PHY_STANDALONE,
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MSM_DSI_PHY_MASTER,
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MSM_DSI_PHY_SLAVE,
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};
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2015-05-15 17:04:06 +00:00
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#define DSI_DEV_REGULATOR_MAX 8
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2015-10-09 09:51:12 +00:00
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#define DSI_BUS_CLK_MAX 4
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2015-05-15 17:04:06 +00:00
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/* Regulators for DSI devices */
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struct dsi_reg_entry {
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char name[32];
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int enable_load;
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int disable_load;
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};
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struct dsi_reg_config {
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int num;
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struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
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};
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2015-03-31 18:36:33 +00:00
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struct msm_dsi {
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struct drm_device *dev;
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struct platform_device *pdev;
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2015-07-31 08:36:10 +00:00
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/* connector managed by us when we're connected to a drm_panel */
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2015-03-31 18:36:33 +00:00
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struct drm_connector *connector;
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2015-07-31 08:36:10 +00:00
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/* internal dsi bridge attached to MDP interface */
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2015-03-31 18:36:33 +00:00
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struct drm_bridge *bridge;
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struct mipi_dsi_host *host;
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struct msm_dsi_phy *phy;
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2015-07-31 08:36:10 +00:00
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/*
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* panel/external_bridge connected to dsi bridge output, only one of the
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* two can be valid at a time
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*/
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2015-03-31 18:36:33 +00:00
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struct drm_panel *panel;
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2015-07-31 08:36:10 +00:00
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struct drm_bridge *external_bridge;
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2015-05-15 17:04:05 +00:00
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2015-05-15 17:04:06 +00:00
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struct device *phy_dev;
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2015-03-31 18:36:33 +00:00
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bool phy_enabled;
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2017-01-16 04:12:03 +00:00
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/* the encoder we are hooked to (outside of dsi block) */
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struct drm_encoder *encoder;
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2015-03-31 18:36:33 +00:00
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int id;
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};
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/* dsi manager */
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struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
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void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
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struct drm_connector *msm_dsi_manager_connector_init(u8 id);
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2015-07-31 08:36:10 +00:00
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struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
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2015-03-31 18:36:33 +00:00
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int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
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2015-10-13 06:50:47 +00:00
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bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
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2019-06-17 20:12:58 +00:00
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void msm_dsi_manager_setup_encoder(int id);
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2015-03-31 18:36:33 +00:00
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int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
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void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
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2018-04-18 19:45:15 +00:00
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bool msm_dsi_manager_validate_current_config(u8 id);
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2015-03-31 18:36:33 +00:00
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/* msm dsi */
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2015-08-03 08:38:33 +00:00
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static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi)
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{
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2015-07-31 08:36:10 +00:00
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return msm_dsi->panel || msm_dsi->external_bridge;
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2015-08-03 08:38:33 +00:00
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}
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2015-03-31 18:36:33 +00:00
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struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
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2015-05-15 17:04:05 +00:00
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/* dsi pll */
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struct msm_dsi_pll;
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#ifdef CONFIG_DRM_MSM_DSI_PLL
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struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
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enum msm_dsi_phy_type type, int dsi_id);
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void msm_dsi_pll_destroy(struct msm_dsi_pll *pll);
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int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
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struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
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2015-07-03 14:09:46 +00:00
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void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
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int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
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2017-01-03 14:15:43 +00:00
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int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
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enum msm_dsi_phy_usecase uc);
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2015-05-15 17:04:05 +00:00
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#else
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static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
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enum msm_dsi_phy_type type, int id) {
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return ERR_PTR(-ENODEV);
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}
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static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
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{
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}
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static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
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struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
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{
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return -ENODEV;
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}
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2015-07-03 14:09:46 +00:00
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static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
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{
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}
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static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
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{
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return 0;
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}
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2017-01-03 14:15:43 +00:00
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static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
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enum msm_dsi_phy_usecase uc)
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{
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return -ENODEV;
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}
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2015-05-15 17:04:05 +00:00
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#endif
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2015-03-31 18:36:33 +00:00
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/* dsi host */
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2018-05-29 14:20:31 +00:00
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struct msm_dsi_host;
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2015-03-31 18:36:33 +00:00
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int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
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2015-10-13 06:50:47 +00:00
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u32 dma_base, u32 len);
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2015-03-31 18:36:33 +00:00
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int msm_dsi_host_enable(struct mipi_dsi_host *host);
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int msm_dsi_host_disable(struct mipi_dsi_host *host);
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2017-01-07 08:54:38 +00:00
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int msm_dsi_host_power_on(struct mipi_dsi_host *host,
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2018-04-18 19:45:14 +00:00
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struct msm_dsi_phy_shared_timings *phy_shared_timings,
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bool is_dual_dsi);
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2015-03-31 18:36:33 +00:00
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int msm_dsi_host_power_off(struct mipi_dsi_host *host);
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int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
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2018-04-06 14:39:01 +00:00
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const struct drm_display_mode *mode);
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2019-06-17 20:12:52 +00:00
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struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host);
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unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host);
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2015-07-31 08:36:10 +00:00
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struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
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2015-03-31 18:36:33 +00:00
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int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
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void msm_dsi_host_unregister(struct mipi_dsi_host *host);
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2015-05-15 17:04:05 +00:00
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int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
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struct msm_dsi_pll *src_pll);
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2015-07-29 16:14:12 +00:00
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void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
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2017-01-07 08:54:38 +00:00
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void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host,
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2018-04-18 19:45:14 +00:00
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struct msm_dsi_phy_clk_request *clk_req,
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bool is_dual_dsi);
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2015-03-31 18:36:33 +00:00
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void msm_dsi_host_destroy(struct mipi_dsi_host *host);
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int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
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struct drm_device *dev);
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int msm_dsi_host_init(struct msm_dsi *msm_dsi);
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2017-07-28 10:47:04 +00:00
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int msm_dsi_runtime_suspend(struct device *dev);
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int msm_dsi_runtime_resume(struct device *dev);
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2019-06-30 14:18:31 +00:00
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int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host);
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int dsi_link_clk_set_rate_v2(struct msm_dsi_host *msm_host);
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2018-05-29 14:20:32 +00:00
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int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
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int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
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void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
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void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
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int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
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int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
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void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
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void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
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void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
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int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
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int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
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int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
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int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
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2018-04-18 19:45:14 +00:00
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int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi);
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int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host, bool is_dual_dsi);
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2015-03-31 18:36:33 +00:00
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/* dsi phy */
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struct msm_dsi_phy;
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2016-09-15 09:04:49 +00:00
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struct msm_dsi_phy_shared_timings {
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u32 clk_post;
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u32 clk_pre;
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bool clk_pre_inc_by_2;
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};
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2017-01-07 08:54:38 +00:00
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struct msm_dsi_phy_clk_request {
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unsigned long bitclk_rate;
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unsigned long escclk_rate;
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};
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2015-05-15 17:04:06 +00:00
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void msm_dsi_phy_driver_register(void);
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void msm_dsi_phy_driver_unregister(void);
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2015-06-10 17:18:17 +00:00
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int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
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2017-01-07 08:54:38 +00:00
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struct msm_dsi_phy_clk_request *clk_req);
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2015-08-13 21:45:51 +00:00
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void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
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2016-09-15 09:04:49 +00:00
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void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
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struct msm_dsi_phy_shared_timings *shared_timing);
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2015-05-15 17:04:05 +00:00
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struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
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2016-09-15 09:14:22 +00:00
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void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
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enum msm_dsi_phy_usecase uc);
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2015-05-15 17:04:05 +00:00
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2015-03-31 18:36:33 +00:00
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#endif /* __DSI_CONNECTOR_H__ */
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