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1280 Commits

Author SHA1 Message Date
Ryan Kurtz
c8e117736c Merge remote-tracking branch 'origin/GT-3011_ghidorahrex_PR-659_roblabla_AARCH64_volatile_system_registers' 2019-07-17 14:35:32 -04:00
Ryan Kurtz
305cb0f1cb Merge remote-tracking branch 'origin/GT-3009_ghidorahrex_PR-724_pmnxis_AARCH64_index' 2019-07-17 12:41:29 -04:00
ghidorahrex
b61f8c29ff GT-3009: Accepting pull request 
Pulled-from: pmnxis <pmnxis@users.noreply.github.com>
 2019-07-17 12:37:14 -04:00
Ryan Kurtz
a4f7cdc414 Merge remote-tracking branch 'origin/GT-2940_GhidorahRex_PR_Support_for_RD_WR_FS_GS_BASE' 2019-07-17 12:33:49 -04:00
ghidra1
a7345527c9 BitFields - added preliminary support for composite bitfields 2019-07-17 11:55:29 -04:00
mumbel
f36d7a29da prime 1E, OCTEON/DSP, and cleanup 
- The EVA instructions have prime=0x1E, this should be 0x1F. These
  instructions are used to access user mode virtual address from
  kernel mode, so probably not used often.

- General cleanup in the bit pattern.  There was mixed used of
  decimal and hex values for the same token, converted >9 to hex

- Added OCTEON instructions: lbx, blux, ldx, lhx, lhux, lwx, and lwux

- Implemented the multiple accumulator found in DSP for:
  madd, maddu, mfhi, mflo, msub, msubu, mthi, mtlo, mult, and multu

  These changes convert '00' to ac in the bit pattern and attach to
  the original lo/hi pair and now lo1/hi1, lo2/hi2, and lo3/hi3 pairs.
  The value of ac can range from 0 to 3.  When ac=0, this refers to
  the original HI/LO register pair of the architecture.

- some minor whitespace cleanup
 2019-07-17 10:59:37 -04:00
Ryan Kurtz
7a696dd6c2 Merge remote-tracking branch 'origin/GT-3007_ryanmkurtz_PR-719_williballenthin_patterncontraints' 2019-07-17 09:21:43 -04:00
Ryan Kurtz
c6f0bbc614 Merge remote-tracking branch 'origin/GT-3006_ryanmkurtz_PR-671_marpie_implement_callfixup_chkstk' 2019-07-17 09:01:23 -04:00
Ryan Kurtz
a4b9304cd8 Merge remote-tracking branch 'origin/GT-3004_ryanmkurtz_PR-771_GregoryMorse_x86_16_ida' 2019-07-17 08:19:50 -04:00
Ryan Kurtz
7617f30756 GT-2845: Removing MemoryConflictHandler. 2019-07-16 14:08:25 -04:00
ghidra1
12af9291c9 GT-2845 - updated ELF Loader to utilize FileBytes and eliminated its use 
of MemoryBlockUtil

Conflicts:
	Ghidra/Features/Base/src/main/java/ghidra/app/util/opinion/ElfLoader.java
 2019-07-16 12:34:19 -04:00
dragonmacher
83d85daabc Fixed tools unable to restore Listing location information; fixed 
warning getting printed to console for non-Java binaries
 2019-07-15 17:25:02 -04:00
caheckman
f38bd221b5 Merge branch 'caheckman_AARCH64neon' 2019-07-15 15:21:17 -04:00
caheckman
ab7e57c521 Merge remote-tracking branch 'github/Github-732_caheckman_x64cspec' 2019-07-15 15:20:40 -04:00
caheckman
be177cb39b Refactor macros for zero extending into AARCH64 z registers 2019-07-15 15:17:58 -04:00
caheckman
12d3da029b Refactor ParamEntry look-up allowing "contained by" discovery 2019-07-15 15:15:37 -04:00
caheckman
ef12c20829 Fix for "Unknown function tag: scope" error 2019-07-15 15:13:11 -04:00
Ryan Kurtz
1cc8de3e67 Merge remote-tracking branch 'origin/GT-2999_ryanmkurtz_PR-775_redfast00_aarch64-relocation-jump26' 2019-07-15 12:49:18 -04:00
ghidra1
e0e2c58eb7 Merge remote-tracking branch 'origin/ghidra1_Emulator' 
Conflicts:
	gradle/root/eclipse.gradle
 2019-07-12 16:14:17 -04:00
emteere
c96d2f09ce emteere re-re-fixing compile errors. 2019-07-11 16:29:38 -04:00
redfast00
70ce145292
Add R_AARCH64_JUMP26 relocation handler 2019-07-11 19:24:51 +02:00
James
e3ae5a0370 GT_2757 fixed java stream decompile bug 2019-07-10 15:34:26 -04:00
Gregory Morse
70a7d03099
Update x86.ldefs 
x86 16-bit in IDA Pro >= 7.0 and probably earlier uses the metapc processor type and not any of those listed anymore.  I am not sure how many others should also be included but probably all of them.  The bit size is the primary selection, not the processor type anymore so although metapc is confirmed, perhaps the following should also be added as they are under 32-bit:
	<external_name tool="IDA-PRO" name="80686p"/>
	<external_name tool="IDA-PRO" name="k62"/>
	<external_name tool="IDA-PRO" name="p2"/>
	<external_name tool="IDA-PRO" name="p3"/>
	<external_name tool="IDA-PRO" name="athlon"/>
	<external_name tool="IDA-PRO" name="p4"/>

Though this is certainly a legacy IDA 5.x and maybe 6.x issue mainly.  AFAIK, all the >= 7.0 IDA versions use metapc for all x86.  Specific processors were any early feature that was consolidated there.
 2019-07-10 01:57:16 +02:00
Piruzzolo
b549c0d8fc
removes unneeded == 1 2019-07-09 17:42:29 +02:00
Piruzzolo
d98290061d
Fix AAA, AAM, DAA, DAS x86 intructions + typo fix 
According to Intel manual, the AAM instruction has a MOD, not an AND. Likely a typo. More, (AF == 1) added instead of AF (but I think it's pretty much the same)
+ bonus typo fix
 2019-07-04 01:02:55 +02:00
Ryan Kurtz
037060d124 GT-2967: 8051 needs Base dependency. 2019-07-03 10:10:32 -04:00
Ryan Kurtz
11f1a824a7 GT-2967: Fixing 8051 build.gradle to be a proper Java project (might fix 
#736).
 2019-07-02 12:17:51 -04:00
Ryan Kurtz
eadf39e6e4 GT-2902: Fixing compilation problem in PA-RISC. 2019-06-27 13:14:36 -04:00
Ryan Kurtz
c8ae78ee59 Merge remote-tracking branch 'origin/emteere_GT-2902' 2019-06-26 14:01:53 -04:00
pmnxis
bdbb644a92 aarch64(ARMv8A) index added 
Refereced this DDI08487D by ARM.
https://static.docs.arm.com/ddi0487/db/DDI0487D_b_armv8_arm.pdf
Detail things is from this repo https://github.com/pmnxis/gen_ghidra_aarch64_idx
 2019-06-26 12:02:45 +09:00
pmnxis
41119e3f7a Revert "Added Aarch64 (ARMv8) manul index" 
This reverts commit 8a400b0d77.
 2019-06-26 12:00:57 +09:00
pmnxis
8a400b0d77 Added Aarch64 (ARMv8) manul index 
Refereced this DDI08487D by ARM.
https://static.docs.arm.com/ddi0487/db/DDI0487D_b_armv8_arm.pdf
Detail things is from this repo https://github.com/pmnxis/gen_ghidra_aarch64_idx
 2019-06-26 11:58:29 +09:00
ghidra1
dd15435371 Added P-Code Test framework to facilitate semantic verification through 
emulation
 2019-06-25 09:37:15 -04:00
Willi Ballenthin
b0f6af4930
x86/data/patterns/patternconstraints: remove extra text node 
removing a line that appears to be superfluous. also, fix indentation.

unfortunately, i have *not* tested this, as i noticed this apparent extra line during a visual inspection. i don't have a build environment currently configured.
 2019-06-24 15:04:37 -06:00
paramjot@gmail.com
8cdf270847 Initial SuperH SH-1/SH-2 Processor Support 2019-06-23 17:58:32 -04:00
Ryan Kurtz
a1574d3154 Merge remote-tracking branch 'origin/GT-2876_ghidorahrex_PR-520_brakhane_z80_fix_alternate_regs' 2019-06-20 15:01:36 -04:00
Ryan Kurtz
a1d68852ca Merge remote-tracking branch 'origin/GT-2943_GhidorahRex_PR-kreeblah_Update_x86_manual_index' 2019-06-20 07:59:03 -04:00
GhidorahRex
9f3c6a604b Removed unused qRegPair tokens and attach vars. 2019-06-11 10:44:22 -04:00
emteere
6ea9e0a93f emteere_GT-2902 minor syntax changes to sleigh file. No effect to 
languages.
 2019-06-10 17:44:49 -04:00
Markus Piéton
dce4f0a074 Implement Callfixup for x64 __chkstk function. 2019-06-10 17:02:41 +02:00
Michael Huebler
c2d798cbb2 renamed WREG to W so that the decompiler can use it properly as a function parameter. 2019-06-07 22:34:22 +02:00
Robin Lambertz
96804c6c2c
[AArch64] Make the system registers volatile. 
Currently, reads and writes to system registers do not show up in the decompilation output. Fix this by marking them as volatile.
 2019-06-05 15:17:00 +02:00
Ryan Kurtz
08dbf35254 Merge remote-tracking branch 'origin/GT-2828_GhidorahRex_PR-346_ahroach_AVR8_add_ISA_manual_index_file' 2019-06-04 12:52:38 -04:00
GhidorahRex
da4b11981d GT-2828: Accepting pull request 
Pulled-from: Austin Roach <ahroach@gmail.com>
 2019-06-04 12:49:44 -04:00
Ryan Kurtz
ba2226a239 Merge remote-tracking branch 'origin/GT-2896_ryanmkurtz_PR-649_bonbom1_update8051' 2019-06-04 12:12:31 -04:00
Philip Pemberton
a4c4b5f7c7 Add noddy definition of the TEQ<cc>P instruction. 
Note that this doesn't take into account the subtleties of what TEQP
does -- for more information on this, see
https://www.heyrick.co.uk/armwiki/The_Status_register#Legacy_processors_.2826_bit.29

It will, however, stop Ghidra from completely freaking out when it sees
this instruction in old RISC OS 26bit-PC code.

TODO, make this behave (in SLEIGH) like a PSR update (MSR CPSR, ...) but
note that the PSR bit order is different to the 26bit ARM PSR so fudging
will be needed.
 2019-06-04 14:20:31 +01:00
Ryan Kurtz
a9d50254d2 GT-2896 (closes #649): Certified. 
Pulled-from: Tommi <tommi.karppa@gmail.com>
 2019-06-04 09:12:43 -04:00
Ryan Kurtz
b8f042da80 GT-2343: New DYLD shared cache loader. 2019-06-04 08:47:51 -04:00
Tommi
981c283a54
Update Update8051.java 2019-06-02 23:39:27 +03:00
Tommi
ad5534a7cb
Update Update8051.java 
flaw in logic
 2019-06-02 23:16:51 +03:00
Marcus Comstedt
45cfc3cfc2 Add processor implementation for 8048 (MCS-48) 2019-05-30 19:34:44 +02:00
GhidorahRex
67301a9013 GT-2876: Updated Z80 slaspec for additional issues. 
Pulled-from: Dennis Brakhane <brakhane@gmail.com>
 2019-05-17 15:20:37 -04:00
Markus Piéton
508c9a7ea0 Updating MIPS Processor Manuals to latest version. 
* MIPS Architecture For Programmers Volume II-A:
      MD00087-2B-MIPS64BIS-AFP-6.06.pdf
  * MIPS Architecture for Programmers Volume II-B: microMIPS64
      MD00594-2B-microMIPS64-AFP-6.05.pdf
  * MIPS Architecture for Programmers Volume II-B: microMIPS32
      MIPS_Architecture_microMIPS32_InstructionSet_AFP_P_MD00582_06.04.pdf

Document Source:

  * https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf
  * https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00594-2B-microMIPS64-AFP-6.05.pdf
  * https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MIPS_Architecture_microMIPS32_InstructionSet_AFP_P_MD00582_06.04.pdf
 2019-05-11 11:45:05 +02:00
Ryan Kurtz
79509193dd Merge remote-tracking branch 'origin/GT-2860_ryanmkurtz_PR-415_neutralinsomniac_remove-dup-code' 2019-05-10 13:47:10 -04:00
ghidra1
16a7aa5b85 Merge remote-tracking branch 'origin/GT-2826_GhidorahRex_PR-469_agatti_Correct_6502_index_flag_bit' 2019-05-09 17:51:50 -04:00
ghidra1
0fc0250762 Merge remote-tracking branch 'origin/GT-2781_GhidorahRex_PR-387_aldelaro5_PowerPC_FLOAT_NEG' 2019-05-09 17:51:24 -04:00
ghidra1
7403e884a8 Merge remote-tracking branch 'origin/GT-2744_GhidorahRex_PR-362_ARM_THUMB' 2019-05-09 17:38:41 -04:00
ghidra1
ba4e6218ce Merge remote-tracking branch 'origin/ghidorahrex_GT-2768' 2019-05-09 16:59:56 -04:00
Andrew Cooper
28d473fed9 x86: Support for {RD,WR}{FS,GS}BASE instructions 
This was derived from the existing readPID instruction, whose encoding is very
similar.

Fixes #554
 2019-05-06 19:35:08 +01:00
Dennis Brakhane
416772c426 Z80: fix alternate registers 
The 8-bit alternate registers were swapped, the low part of BC'
was specified as being B' instead of C'
 2019-04-27 03:01:54 +02:00
ghidravore
f1e50fb079 Major refactoring of the gradle build system. 2019-04-23 15:20:26 -04:00
Alessandro Gatti
48150b1870 Use proper bit index for 6502 Interrupt flag. 2019-04-19 17:04:28 +02:00
ghidravore
8f9a8dd1b1 Merge remote-tracking branch 'origin/Ghidra_9.0.3' 2019-04-17 18:49:15 -04:00
ghidravore
aa7ba796fd Merge remote-tracking branch 'origin/emteere_GT-2759' into Ghidra_9.0.3 2019-04-17 18:42:06 -04:00
ghidravore
163da67799 Merge remote-tracking branch 'origin/GT-2807_emteere' into Ghidra_9.0.3 2019-04-17 18:39:55 -04:00
emteere
0859edf517 GT_2807_emteere Semantics for BCD arithmetic instructions in 68K 2019-04-17 12:19:07 -04:00
ghidorahrex
bc6f6ad927 GT-2768: Corrected spelling and index for mips reference manual. 2019-04-16 14:03:16 -04:00
emteere
008cf415b2 GT-2759 Fixed 6502 processor module Zero Page indexed addressing. 2019-04-15 16:42:57 -04:00
caheckman
53d9018f9e GT-2755: certified 
Pulled-from: Markus Piéton <marpie@a12d404.net>
 2019-04-15 11:22:55 -04:00
Markus Piéton
bdcbe2cf3a Callfixup for _guard_dispatch_icall on x86-64-win 
Change goto to call
As pointed out by @caheckman [here](https://github.com/NationalSecurityAgency/ghidra/pull/340#issuecomment-482248465) the `goto` should be a `call`.
 2019-04-15 11:15:12 -04:00
Jeremy O'Brien
8a1a70d7ba Remove duplicated options in MipsAddressAnalyzer 2019-04-12 13:43:25 -04:00
Dan
03258283d2 GT-2744 (closes #362): ARM and THUMB corrections. 
Pulled-from: mumbel <mumbel@localhost.localdomain>
 2019-04-10 12:19:15 -04:00
caheckman
c87adb2115 Fix for invalid UTF, fix for multiple anonymous function definitions 2019-04-09 14:51:37 -04:00
aldelaro5
e51128e46f Processors/PowerPC: Use FLOAT_NEG on fneg and fneg. instructions 
It was causing weird decompilation output.
 2019-04-09 01:09:38 -04:00
Kreeblah
b00852877c Updated x86 manual index 
Updated x86 manual indexes to the following:

Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2 (2A, 2B, 2C & 2D): Instruction Set Reference, A-Z, Sep 2016 (325383-060US), available at https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf

AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions, Rev 3.26 May 2018 (24594), available at https://www.amd.com/system/files/TechDocs/24594.pdf

AMD64 Architecture Programmer's Manual Volume 4: 128-Bit and 256-Bit Media Instructions, Rev 3.23 Feb 2019 (26568), available at https://www.amd.com/system/files/TechDocs/26568.pdf

AMD64 Architecture Programmer's Manual Volume 5: 64-Bit Media and x87 Floating-Point Instructions, Rev 3.15 May 2018 (26569), available at https://www.amd.com/system/files/TechDocs/26569_APM_v5.pdf

AMD64 Technology 128-Bit SSE5 Instruction Set, Rev 3.01 August 2007 (43479), which is unchanged from the provided .idx. I can't find a newer version of the publication (or a different publication) that lists the same instructions, so I left it as it was. The only copy of the actual publication that I can find is at http://www.cs.northwestern.edu/~pdinda/icsclass/doc/AMD_ARCH_MANUALS/AMD64_128_Bit_SSE5_Instrs.pdf but it looks to be incomplete, as it stops at ROUNDSS.
 2019-04-06 09:56:12 -07:00
mumbel
5028d3015d ARM and THUMB corrections 
ADD (SP plus register, T32) was incorrectly op11=0x1e (1 1 1 1 0),
but is supposed to be 0x1d (1 1 1 0 1)

ARM's CLREX matches THUMB's BL<c> <label>.  Added AMODE check to
CLREX
 2019-04-05 22:07:30 -05:00
Austin Roach
1aed26b4d3 AVR8: Add ISA manual index file 2019-04-04 20:32:23 -04:00
emteere
8cf5b0f2c6 GT-2722 updates for CMP.W and LSL instruction decodes 2019-04-02 10:45:18 -04:00
ghidra1
7179c6de81 GT-2667 added support for generating sleigh build.xml files 2019-03-29 17:24:31 -04:00
Dan
79d8f164f8 Candidate release of source code. 2019-03-26 13:46:51 -04:00