Commit Graph

3658 Commits

Author SHA1 Message Date
INAGAKI Hiroshi
77b9f2d6fd dt-bindings: leds: Add LED_FUNCTION_SPEED_* for link speed on LAN/WAN
Add LED_FUNCTION_SPEED_LAN and LED_FUNCTION_SPEED_WAN for LEDs that
indicate link speed of ethernet ports on LAN/WAN. This is useful to
distinguish those LEDs from LEDs that indicate link status (up/down).

example:

Fortinet FortiGate 30E/50E have LEDs that indicate link speed on each
of the ethernet ports in addition to LEDs that indicate link status
(up/down).

- 1000 Mbps: green:speed-(lan|wan)-N
-  100 Mbps: amber:speed-(lan|wan)-N
-   10 Mbps: (none, turned off)

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240323074326.1428-3-musashino.open@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
2024-04-12 09:47:13 +01:00
INAGAKI Hiroshi
7d36c35733 dt-bindings: leds: Add LED_FUNCTION_MOBILE for mobile network
Add LED_FUNCTION_MOBILE for LEDs that indicate status of mobile network
connection. This is useful to distinguish those LEDs from LEDs that
indicates status of wired "wan" connection.

example (on stock fw):

IIJ SA-W2 has "Mobile" LEDs that indicate status (no signal, too low,
low, good) of mobile network connection via dongle connected to USB
port.

- no signal: (none, turned off)
-   too low: green:mobile & red:mobile (amber, blink)
-       low: green:mobile & red:mobile (amber, turned on)
-      good: green:mobile (turned on)

Suggested-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240323074326.1428-2-musashino.open@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
2024-04-12 09:47:12 +01:00
Gabriel Fernandez
df5df1257c dt-bindings: clocks: stm32mp25: add description of all parents
RCC driver uses '.index' to define all parent clocks instead '.names'
because the use of a name to define a parent clock is discouraged. This
is an ABI change, but the RCC driver has not yet merged, unlike all
others drivers besides Linux.

Fixes: b5be49db3d ("dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240411092453.243633-3-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-04-11 23:19:57 -07:00
Binbin Zhou
0b1bfd15f3 dt-bindings: clock: Add Loongson-2K expand clock index
In the new Loongson-2K family of SoCs, more clock indexes are needed,
such as clock gates.
The patch adds these clock indexes

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/76844e0e4dae290425f7c8025f7f36810cb3a3a8.1712731524.git.zhoubinbin@loongson.cn
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-04-11 00:29:56 -07:00
Shreeya Patel
ca151fd56b dt-bindings: reset: Define reset id used for HDMI Receiver
Add reset id used for HDMI Receiver in RK3588 SoCs

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Link: https://lore.kernel.org/r/20240327225057.672304-2-shreeya.patel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-04-10 07:08:53 +02:00
Sascha Hauer
575bc7b477 dt-bindings: clock: rockchip: add USB480M_PHY mux
The USB480M clock can source from a MUX that selects the clock to come
from either of the USB-phy internal 480MHz PLLs. These clocks are
provided by the USB phy driver. This adds the define for it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-1-6c89de20a6ff@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-04-10 07:08:50 +02:00
Neil Armstrong
72bea132f3 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: document PHY AUX clock on SM8[456]50 SoCs
The PCIe Gen4x2 PHY found in the SM8[456]50 SoCs have a second clock named
"PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which
is muxed & gated then returned to the PHY as an input.

Document the clock IDs to select the PIPE clock or the AUX clock,
also enforce a second clock-output-names and a #clock-cells value of 1
for the PCIe Gen4x2 PHY found in the SM8[456]50 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-1-3ec0a966d52f@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-05 22:34:00 +05:30
Bjorn Andersson
bdfe9fd845 Merge branch 'drivers-for-6.10' onto 'v6.9-rc1'
Merge the patches that was picked up for v6.10 before v6.9-rc1 became
available onto v6.9-rc1 to reduce the risk for conflicts etc.
2024-03-28 08:58:03 -05:00
Geert Uytterhoeven
002b831076 dt-bindings: clock: r9a07g043-cpg: Annotate RZ/G2UL-only core clocks
The M2 (CRU main clock), M3 (LCDC Video Clock), and AT (Cortex-A55 Debug
clock) core clocks are only present on RZ/G2UL, not on RZ/Five.

Annotate this in the comments, like is already done for module clocks
and resets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/ffcdcd479c76b92f67481836a33ec86e97f85634.1708944903.git.geert+renesas@glider.be
2024-03-26 09:30:36 +01:00
Geert Uytterhoeven
ecc79ab919 ARM: dts: renesas: r8a73a4: Add TMU nodes
Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
and the clocks serving them.

Note that TMU channels 1 and 2 are not added, as their interrupts are
not wired to the interrupt controller for the AP-System Core (INTC-SYS),
only to the interrupt controller for the AP-Realtime Core (INTC-RT).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1a60832f3ba37afb4a5791f4e5db4610ab31beb3.1710864964.git.geert+renesas@glider.be
2024-03-26 09:22:41 +01:00
Krzysztof Kozlowski
4184e4912c dt-bindings: pinctrl: samsung: drop unused header with register constants
The bindings header for Samsung pin controller DTS pin values (holding
register values in fact) was deprecated in v6.1 kernel in
commit 9d92925768 ("dt-bindings: pinctrl: samsung: deprecate header
with register constants").  This was enough of time for users to switch
to in-DTS headers, so drop the bindings header.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240312164428.692552-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-03-25 11:50:27 +01:00
Linus Torvalds
bb41fe35dc Char/Misc and other driver subsystem updates for 6.9-rc1
Here is the big set of char/misc and a number of other driver subsystem
 updates for 6.9-rc1.  Included in here are:
   - IIO driver updates, loads of new ones and evolution of existing ones
   - coresight driver updates
   - const cleanups for many driver subsystems
   - speakup driver additions
   - platform remove callback void cleanups
   - mei driver updates
   - mhi driver updates
   - cdx driver updates for MSI interrupt handling
   - nvmem driver updates
   - other smaller driver updates and cleanups, full details in the
     shortlog
 
 All of these have been in linux-next for a long time with no reported
 issue, other than a build warning with some older versions of gcc for a
 speakup driver, fix for that will come in a few days when I catch up
 with my pending patch queues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZfwuLg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynKVACgjvR1cD8NYk9PcGWc9ZaXAZ6zSnwAn260kMoe
 lLFtwszo7m0N6ZULBWBd
 =y3yz
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver subsystem updates from Greg KH:
 "Here is the big set of char/misc and a number of other driver
  subsystem updates for 6.9-rc1. Included in here are:

   - IIO driver updates, loads of new ones and evolution of existing ones

   - coresight driver updates

   - const cleanups for many driver subsystems

   - speakup driver additions

   - platform remove callback void cleanups

   - mei driver updates

   - mhi driver updates

   - cdx driver updates for MSI interrupt handling

   - nvmem driver updates

   - other smaller driver updates and cleanups, full details in the
    shortlog

  All of these have been in linux-next for a long time with no reported
  issue, other than a build warning for the speakup driver"

The build warning hits clang and is a gcc (and C23) extension, and is
fixed up in the merge.

Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/

* tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits)
  binder: remove redundant variable page_addr
  uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion
  uio_pruss: UIO_MEM_DMA_COHERENT conversion
  cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT
  uio: introduce UIO_MEM_DMA_COHERENT type
  cdx: add MSI support for CDX bus
  pps: use cflags-y instead of EXTRA_CFLAGS
  speakup: Add /dev/synthu device
  speakup: Fix 8bit characters from direct synth
  parport: sunbpp: Convert to platform remove callback returning void
  parport: amiga: Convert to platform remove callback returning void
  char: xillybus: Convert to platform remove callback returning void
  vmw_balloon: change maintainership
  MAINTAINERS: change the maintainer for hpilo driver
  char: xilinx_hwicap: Fix NULL vs IS_ERR() bug
  hpet: remove hpets::hp_clocksource
  platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH
  char: xilinx_hwicap: drop casting to void in dev_set_drvdata
  greybus: move is_gb_* functions out of greybus.h
  greybus: Remove usage of the deprecated ida_simple_xx() API
  ...
2024-03-21 13:21:31 -07:00
Linus Torvalds
78c3925c04 ARM: late SoC changes for 6.9
These are changes that for some reason ended up not making it into the
 first four branches but that should still make it into 6.9:
 
  - A rework of the omap clock support that touches both drivers and
    device tree files
 
  - The reset controller branch changes that had a dependency on late
    bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
    drivers branch
 
  - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
    changes that got delayed and needed some extra time in linux-next
    for wider testing.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmX5vYcACgkQYKtH/8kJ
 UiemkhAAu2lYNpttx+qVlEzQvPKyID5Y+E0cVRmM5e79/fOumNomSzFwtKztCbz2
 PV1CHwmDYANKsI8tl91PAe8PzD+9Er+8xa6YYVSMG5bLC2aGdF4k5hzMnRmfhlDe
 uRT/9iNH0w+S1p44+wXI9Y++uZhxJtCqa6kytxybl6YrG2/l3Wm0PVcMAD/MWT1l
 OULRg5gv3+7qHLKE0ffd0J7I7zCvKA5cEqnieGSO8+k1jsOE3BvgLttfPUuUsi3x
 8yWAJ2cEv293Cao8x8rw39TYIHQOznLMNzK/GCIemL4k9TafbGbuVPUGQZ6oX1SQ
 +/biiUV8CMLzanw2Ds7piQ/4J8EoJjh7jCf9pETORlHLaCMQaYUk4I2KnBWmjxuO
 QBy6Py68EkyT1zv7YFkpdxeABkwkrObMmVsjfyltd2lCF6oC+xbIw5IOVPgnUiTc
 WANL3y+hS5zv+ABmpkRhDPe9KrcoO95sJgGaoMPatwD1/2JkdV7EkvbXWdnipb1w
 REYk4xuRlJcAgyjc5nrQXR8FuPX63c08NFkOw+AInFV8ipyH+8nkesb0w54aegsR
 Tihhl0WUxk/e9FLFVlPiYRNdyqOb2HKteRwRxsA1LqqcWdpYjplBrkZhHb3+ESnP
 lQaQ7AtZRoIjwsImYen3M2W1cFS214BAqoonLLYSd0ponCB05Ng=
 =IzoE
 -----END PGP SIGNATURE-----

Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more ARM SoC updates from Arnd Bergmann:
 "These are changes that for some reason ended up not making it into the
  first four branches but that should still make it into 6.9:

   - A rework of the omap clock support that touches both drivers and
     device tree files

   - The reset controller branch changes that had a dependency on late
     bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
     drivers branch

   - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
     changes that got delayed and needed some extra time in linux-next
     for wider testing"

* tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  soc: fsl: dpio: fix kcalloc() argument order
  bus: ts-nbus: Improve error reporting
  bus: ts-nbus: Convert to atomic pwm API
  riscv: dts: starfive: jh7110: Add camera subsystem nodes
  ARM: bcm: stop selecing CONFIG_TICK_ONESHOT
  ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
  ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
  clk: ti: Improve clksel clock bit parsing for reg property
  clk: ti: Handle possible address in the node name
  dt-bindings: pwm: opencores: Add compatible for StarFive JH8100
  dt-bindings: riscv: cpus: reg matches hart ID
  reset: Instantiate reset GPIO controller for shared reset-gpios
  reset: gpio: Add GPIO-based reset controller
  cpufreq: do not open-code of_phandle_args_equal()
  of: Add of_phandle_args_equal() helper
  reset: simple: add support for Sophgo SG2042
  dt-bindings: reset: sophgo: support SG2042
  riscv: dts: microchip: add specific compatible for mpfs pdma
  riscv: dts: microchip: add missing CAN bus clocks
  ARM: brcmstb: Add debug UART entry for 74165
  ...
2024-03-19 11:57:26 -07:00
Abel Vesa
734364d0dd dt-bindings: arm: qcom,ids: Add SoC ID for X1E80100
Add the ID for the Qualcomm X1E80100 SoC.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240223-x1e80100-socinfo-v1-1-be581ca60f27@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-03-16 13:07:49 -05:00
Linus Torvalds
ab522e1478 Devicetree updates for v6.9:
DT core:
 
 - Add cleanup.h based auto release of struct device_node pointers via
   __free marking and new for_each_child_of_node_scoped() iterator to use
   it.
 
 - Always create a base skeleton DT when CONFIG_OF is enabled. This
   supports several usecases of adding DT data on non-DT booted systems.
 
 - Move around some /reserved-memory code in preparation for further
   improvements
 
 - Add a stub for_each_property_of_node() for !OF
 
 - Adjust the printk levels on some messages
 
 - Fix __be32 sparse warning
 
 - Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
   (currently orphaned)
 
 - Add Saravana Kannan and drop Frank Rowand as DT maintainers
 
 DT bindings:
 
 - Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
   fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
   xlnx,sd-fec to DT schemas
 
 - Add existing, but undocumented fsl,imx-anatop binding
 
 - Add bunch of undocumented vendor prefixes used in compatible strings
 
 - Drop obsolete brcm,bcm2835-pm-wdt binding
 
 - Drop obsolete i2c.txt which as been replaced with schema in dtschema
 
 - Add DPS310 device and sort trivial-devices.yaml
 
 - Enable undocumented compatible checks on DT binding examples
 
 - More QCom maintainer fixes/updates
 
 - Updates to writing-schema.rst and DT submitting-patches.rst to cover
   some frequent review comments
 
 - Clean-up SPDX tags to use 'OR' rather than 'or'
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmX0foEACgkQ+vtdtY28
 YcOkUg//T5Q+ZudVn/oJGre3crfPU4O/RHbG+brbwpBZEdiwTGlIjI8ceThjumCO
 MY25yRewCIZtS8MLlRb/lNPUjQxPeyYWnpO3KZHbOJhU8bJCl2M5P0CQOYJNp0fl
 fMFhFU5bKVoXyK6y3qx7ivZTXSBCz9KzB1HxY3LueMHVgWiO1Oi++XjLfcos86Mh
 7dKZKNbpcnBFkXiESMksQS+asZkoRtZloFg4iFjniSLa8AgYJLsZXd7iW4s0IXy+
 Xj+5IcIRcPv2xQoXfCvlcKMheJyePDA1coYpO8pmOYOpjCQzsCnnbzoNERW6hc9u
 0DF2IWnq9WLlQ8RVijbECRPgwW6zuU+aklUZLz2q0AiwCVySHaMdC9iYe+KK/7GH
 m0F21x5mpfK0LVfOMWLsmuqKWn9J164VAeTY9zHqcWuvCohD5ulftvQgRBEiSDtv
 V3l668t6v67iMkYa8SncbuMkV/NSShWPGne+yP3smvL0pe0P0MJYb1XSstlbNXuK
 whTDaCydEHx3JPJ6VS/1aJnELFm+uZVl8wjhfrgbWo2hIC83qjN3k0yV+vFNdFzT
 5PUfI858fvgYOrGsswYCCJXmb/s37NImCnIF/sjqvj50BA468261KYAFtapa2Vlj
 uvpKgIZHJEDOK6TPlk5n7+aaOwoLMYzm+yov/0gyRpRKqsXu52U=
 =YzNN
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Add cleanup.h based auto release of struct device_node pointers via
     __free marking and new for_each_child_of_node_scoped() iterator to
     use it.

   - Always create a base skeleton DT when CONFIG_OF is enabled. This
     supports several usecases of adding DT data on non-DT booted
     systems.

   - Move around some /reserved-memory code in preparation for further
     improvements

   - Add a stub for_each_property_of_node() for !OF

   - Adjust the printk levels on some messages

   - Fix __be32 sparse warning

   - Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
     (currently orphaned)

   - Add Saravana Kannan and drop Frank Rowand as DT maintainers

  DT bindings:

   - Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
     fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
     xlnx,sd-fec to DT schemas

   - Add existing, but undocumented fsl,imx-anatop binding

   - Add bunch of undocumented vendor prefixes used in compatible
     strings

   - Drop obsolete brcm,bcm2835-pm-wdt binding

   - Drop obsolete i2c.txt which as been replaced with schema in
     dtschema

   - Add DPS310 device and sort trivial-devices.yaml

   - Enable undocumented compatible checks on DT binding examples

   - More QCom maintainer fixes/updates

   - Updates to writing-schema.rst and DT submitting-patches.rst to
     cover some frequent review comments

   - Clean-up SPDX tags to use 'OR' rather than 'or'"

* tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits)
  dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators
  of: unittest: Use for_each_child_of_node_scoped()
  of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling
  of: Add cleanup.h based auto release via __free(device_node) markings
  of: Move all FDT reserved-memory handling into of_reserved_mem.c
  of: Add KUnit test to confirm DTB is loaded
  of: unittest: treat missing of_root as error instead of fixing up
  x86/of: Unconditionally call unflatten_and_copy_device_tree()
  um: Unconditionally call unflatten_device_tree()
  of: Create of_root if no dtb provided by firmware
  of: Always unflatten in unflatten_and_copy_device_tree()
  dt-bindings: timer: mediatek: Convert to json-schema
  dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support
  soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage
  dt-bindings: fsl-imx-sdma: fix HDMI audio index
  dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6
  dt-bindings: soc: imx: fsl,imx-anatop: add binding
  dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML
  dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML
  of: make for_each_property_of_node() available to to !OF
  ...
2024-03-15 12:37:59 -07:00
Linus Torvalds
6dff52b828 Not a ton of stuff happening in the clk framework in this pull request. We got
some more devm helpers and we seem to be going in the direction of "just turn
 this stuff on already and leave me alone!" with the addition of a
 devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that into a
 genpd that drivers attach instead, but this API should help drivers simplify in
 the meantime.
 
 Outside of the devm wrappers, we've got the usual clk driver updates that are
 dominated by the major phone SoC vendors (Samsung and Qualcomm) and the
 non-critical driver fixes for things like incorrect topology descriptions and
 wrong registers or bit fields. More details are below, but I'd say that it
 looks pretty ordinary. The only thing that really jumps out at me is the
 Renesas clk driver that's ignoring clks that are assigned to remote processors
 in DeviceTree. That's a new feature that they're using to avoid marking clks as
 CLK_IGNORE_UNUSED based on the configuration of the system.
 
 Core:
  - Increase dev_id len for clkdev lookups
  - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
    for a device
  - Add a devm variant of clk_rate_exclusive_get()
 
 New Drivers:
  - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1 Elite SoC
  - Google GS101 PERIC0 and PERIC1 clock controllers
  - Exynos850 PDMA clocks
  - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock controllers
 
 Removed Drivers:
  - Remove the unused Qualcomm sc7180 modem clk driver
 
 Updates:
  - Fix some static checker errors in the Hisilicon clk driver
  - Polarfire MSSPLL hardware has 4 output clocks (the driver supported
    previously only one output); each of these 4 outputs feed dividers and the
    output of each divider feed individual hardware blocks (e.g. CAN, Crypto,
    eMMC); individual hardware block drivers need to control their clocks thus
    clock driver support was added for all MSSPLL output clocks
  - Typo fixes in the Qualcomm IPQ5018 GCC driver
  - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
  - Properly terminate frequency tables in different Qualcomm clk drivers
  - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
  - Add missing UFS CLKREF clks on Qualcomm SC8180X
  - Avoid significant delays during boot by adding a softdep on rpmhpd to
    Qualcomm SDM845 gcc driver
  - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC driver
  - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC driver
  - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk driver
  - Switch display, GPU, video, and camera Qualcomm clk drivers to
    module_platform_driver()
  - Set a longer delay for Venus resets on many Qualcomm SoCs
  - Correct the GDSC wait times in the Qualcomm SDM845 display clk driver
  - Fix clock listing Oops on Amlogic axg
  - New pll-rate for Rockchip rk3568
  - i2s rate improvements for Rockchip rk3399
  - Rockchip rk3588 syscon clock fixes and removal of overall clock-number from
    the rk3588 binding header
  - A prerequisite for later improvements to the Rockchip rk3588 linked clocks
  - Minor clean-ups and error handling improvements in both composite-8m and SCU
    i.MX clock drivers
  - Fix for SAI_MCLK_SEL definition for i.MX8MP
  - Register the Samsung CMU MISC clock controller earlier, so the Multi Core
    Timer clocksource can use it on Google GS101
  - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI will get
    proper clock rates
  - Refactor the generic Samsung CPU clock controllers code, preparing it for
    supporting Exynos850 CPU clocks
  - Fix some clk kerneldoc warnings
  - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on Renesas
    R-Car V4M
  - Ignore all clocks which are assigned to a non-Linux system in the Renesas
    clk driver
  - Add watchdog clock on Renesas RZ/G3S
  - Add camera (CRU) clock and reset on Renesas RZ/G2UL
  - Add support for the Renesas R-Car V4M (R8A779H0) SoC
  - Convert some clk bindings to YAML so they can be validated
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmXzUpURHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXEvQ/+K0Llv6Jgs/VJkg086qE7z82KvIQRUasi
 Rhxtq8P9DS4KYBd1BB0Wwsrh2CyW9ZWUn0unQ1ZtbxCHKE1lweYb4UkafNamRynT
 cKlXR5wGNtbHUF6Gmdjw+lkuF6pxj3ZcmV47bQyhLMctndWn434sIn3gpv2pTYF2
 Q/ZwhhiS2ZQU1hdpgHwe9iIRJ7QcGlWKyhRx9m5QSRIL7eZFiUvBcYNAdoSa1ovr
 FZOSUAUaxxDu16VrC8mPjaMQ3lDqz8DVSw3i1cDsMdYHbBidzlNLzBH9L+qFgXng
 cYqYR3dlJ6HuXr9wwwe5X3Pm01VZ6Askl16h9tUnZgtZuSuxMPeWMw2brZZPNFOn
 L0SvHdLFj4MzyhgXWtQughttzdOwaRP9lNZNZwchMU5aEU0e3GDeBUBeJ0CRAAqD
 DHRYQW3vDlIG4mhrr54GgQ5XjeHqj9W5OrGU/dWmBp+/e1wB3MB47UJf0GJ7F9kA
 BNvMFtk9hRJkmqsKY93mWpKOe3su2Fl/1vlhK9Tw5V8h/GzBnEsVDUNRYaRaN+wd
 gYTEo73T2FJ4OSYncRDeSPXTmKeI2+4sa1XJKx8rasEZNOR2V3DH/8bMXZhjSbzL
 nZDh+eu0uyS6+xVReE6349ivSPyNDEXO0IbI7yq7jjSYB+LxW49O2xMeoYuNSjtz
 RxKHQr0skqs=
 =rRIa
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Not a ton of stuff happening in the clk framework. We got some more
  devm helpers and we seem to be going in the direction of "just turn
  this stuff on already and leave me alone!" with the addition of a
  devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that
  into a pmdomain that drivers attach instead, but this API should help
  drivers simplify in the meantime.

  Outside of the devm wrappers, we've got the usual clk driver updates
  that are dominated by the major phone SoC vendors (Samsung and
  Qualcomm) and the non-critical driver fixes for things like incorrect
  topology descriptions and wrong registers or bit fields. More details
  are below, but I'd say that it looks pretty ordinary. The only thing
  that really jumps out at me is the Renesas clk driver that's ignoring
  clks that are assigned to remote processors in DeviceTree. That's a
  new feature that they're using to avoid marking clks as
  CLK_IGNORE_UNUSED based on the configuration of the system.

  Core:
   - Increase dev_id len for clkdev lookups
   - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
     for a device
   - Add a devm variant of clk_rate_exclusive_get()

  New Drivers:
   - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1
     Elite SoC
   - Google GS101 PERIC0 and PERIC1 clock controllers
   - Exynos850 PDMA clocks
   - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock
     controllers

  Removed Drivers:
   - Remove the unused Qualcomm sc7180 modem clk driver

  Updates:
   - Fix some static checker errors in the Hisilicon clk driver
   - Polarfire MSSPLL hardware has 4 output clocks (the driver supported
     previously only one output); each of these 4 outputs feed dividers
     and the output of each divider feed individual hardware blocks
     (e.g. CAN, Crypto, eMMC); individual hardware block drivers need to
     control their clocks thus clock driver support was added for all
     MSSPLL output clocks
   - Typo fixes in the Qualcomm IPQ5018 GCC driver
   - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
   - Properly terminate frequency tables in different Qualcomm clk
     drivers
   - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
   - Add missing UFS CLKREF clks on Qualcomm SC8180X
   - Avoid significant delays during boot by adding a softdep on rpmhpd
     to Qualcomm SDM845 gcc driver
   - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC
     driver
   - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC
     driver
   - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk
     driver
   - Switch display, GPU, video, and camera Qualcomm clk drivers to
     module_platform_driver()
   - Set a longer delay for Venus resets on many Qualcomm SoCs
   - Correct the GDSC wait times in the Qualcomm SDM845 display clk
     driver
   - Fix clock listing Oops on Amlogic axg
   - New pll-rate for Rockchip rk3568
   - i2s rate improvements for Rockchip rk3399
   - Rockchip rk3588 syscon clock fixes and removal of overall
     clock-number from the rk3588 binding header
   - A prerequisite for later improvements to the Rockchip rk3588 linked
     clocks
   - Minor clean-ups and error handling improvements in both
     composite-8m and SCU i.MX clock drivers
   - Fix for SAI_MCLK_SEL definition for i.MX8MP
   - Register the Samsung CMU MISC clock controller earlier, so the
     Multi Core Timer clocksource can use it on Google GS101
   - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI
     will get proper clock rates
   - Refactor the generic Samsung CPU clock controllers code, preparing
     it for supporting Exynos850 CPU clocks
   - Fix some clk kerneldoc warnings
   - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on
     Renesas R-Car V4M
   - Ignore all clocks which are assigned to a non-Linux system in the
     Renesas clk driver
   - Add watchdog clock on Renesas RZ/G3S
   - Add camera (CRU) clock and reset on Renesas RZ/G2UL
   - Add support for the Renesas R-Car V4M (R8A779H0) SoC
   - Convert some clk bindings to YAML so they can be validated"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  clk: zynq: Prevent null pointer dereference caused by kmalloc failure
  clk: fractional-divider: Use bit operations consistently
  clk: fractional-divider: Move mask calculations out of lock
  clk: Fix clk_core_get NULL dereference
  clk: starfive: jh7110-vout: Convert to platform remove callback returning void
  clk: starfive: jh7110-isp: Convert to platform remove callback returning void
  clk: imx: imx8-acm: Convert to platform remove callback returning void
  clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
  clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
  clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
  clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
  clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
  clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
  clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
  clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
  clk: Add a devm variant of clk_rate_exclusive_get()
  ...
2024-03-15 11:48:01 -07:00
Linus Torvalds
f5c31bcf60 - Core Frameworks
- Introduce ExpressWire library
 
  - New Drivers
    - Add support for ON Semiconductor NCP5623 RGB LED Driver
 
  - New Device Support
    - Add support for PM660L to Qualcomm's LPG driver
 
  - New Functionality
    - Dynamically load modules required for the default-trigger
    - Add some support for suspend and resume
    - Allow LEDs to remain lit during suspend
 
  - Fix-ups
    - Device Tree binding adaptions/conversions/creation
    - Fix include lists; alphabetise, remove unused, explicitly add used
    - Add new led_match_default_trigger to avoid duplication
    - Add module alias' to aid auto-loading
    - Default to hw_control if no others are specified
    - De-bloat the supported link speed attribute lists
    - Remove superfluous code and simplify overall
    - Constify some variables
 
  - Bug Fixes
    - Prevent kernel panic when renaming the net interface
    - Fix Kconfig related build errors
    - Ensure mutexes are unlocked prior to destroying them
    - Provide clean-up between state changes to avoid invalid state
    - Fix some broken kernel-doc headers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmXzCvUACgkQUa+KL4f8
 d2Fh0A/+KQiuzluglEsnyG7gfb2771x9dQ9pIwaR68UkCwThNH8ico+NqUDs8Jur
 6jtfYfKcWIz3i5kbnWBDGJfEEiVuDGu8Zv9UFxzQViyWQqawkJWNMsYqL3KtfI4i
 Ujj2Ja1MsoqO7COngry9I+3sT6rEwdQJMrVfNAdvOYjlXwr3O8Z2NipPACEqutUr
 0gxKAEEbGOj3+s3UGInrGi9RGuOVBe9UNA2etmtie1kxkdowTxCNY94ukUf9tnvC
 WVXF8iOByUgVAxMh1ugSc27CTCV+VcDMYKKr9ABVhskI/pT3zMFoUCYY1EqhaOTF
 Q40+yFX8ERomNTgy1tbNf06PkzaN+NJ4P/SHFU79madfy4OM6QobpTSt7bBpaSEP
 gm3zuI1a353NPfAUZiIsTgv8jCh18w/adphTNsXY/4PnmkKF0+Pm57PJf8BDhlY3
 KiScK7WXhGS9G3wNpLH+7QBdWiON3oWYJhVK4ijEfgRpEDofv+W16GzcETkUsyQ1
 5DLu/W8wHN9zxHj1YXaitmnRjX3IMoltcIix8FI3YUKrx3m3twm2Vj5ZLziaPm83
 7rBBPyePXwIamLokiTPCfXOxygO7Qv6VAp1aCR6400R/rtjykziboqvT2o6OMpkS
 W/88631VIuL9jAaP/zdUHrle1NpKDiHs2MF0Rtj+0OOoMJyOC7k=
 =m2vY
 -----END PGP SIGNATURE-----

Merge tag 'leds-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds

Pull LED updates from Lee Jones:
 "Core Framework:
   - Introduce ExpressWire library

  New Drivers:
   - Add support for ON Semiconductor NCP5623 RGB LED Driver

  New Device Support:
   - Add support for PM660L to Qualcomm's LPG driver

  New Functionality:
   - Dynamically load modules required for the default-trigger
   - Add some support for suspend and resume
   - Allow LEDs to remain lit during suspend

  Fix-ups:
   - Device Tree binding adaptions/conversions/creation
   - Fix include lists; alphabetise, remove unused, explicitly add used
   - Add new led_match_default_trigger to avoid duplication
   - Add module alias' to aid auto-loading
   - Default to hw_control if no others are specified
   - De-bloat the supported link speed attribute lists
   - Remove superfluous code and simplify overall
   - Constify some variables

  Bug Fixes:
   - Prevent kernel panic when renaming the net interface
   - Fix Kconfig related build errors
   - Ensure mutexes are unlocked prior to destroying them
   - Provide clean-up between state changes to avoid invalid state
   - Fix some broken kernel-doc headers"

* tag 'leds-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (41 commits)
  leds: ncp5623: Add MS suffix to time defines
  leds: Add NCP5623 multi-led driver
  dt-bindings: leds: Add NCP5623 multi-LED Controller
  leds: mlxreg: Drop an excess struct mlxreg_led_data member
  leds: leds-mlxcpld: Fix struct mlxcpld_led_priv member name
  leds: lm3601x: Fix struct lm3601_led kernel-doc warnings
  leds: Fix ifdef check for gpio_led_register_device()
  dt-bindings: leds: qcom-lpg: Narrow nvmem for other variants
  dt-bindings: leds: qcom-lpg: Drop redundant qcom,pm8550-pwm in if:then:
  dt-bindings: leds: Add LED_FUNCTION_WAN_ONLINE for Internet access
  leds: sgm3140: Add missing timer cleanup and flash gpio control
  leds: expresswire: Don't depend on NEW_LEDS
  Revert "leds: Only descend into leds directory when CONFIG_NEW_LEDS is set"
  leds: aw2013: Unlock mutex before destroying it
  leds: qcom-lpg: Add QCOM_PBS dependency
  leds: rgb: leds-group-multicolor: Allow LEDs to stay on in suspend
  leds: trigger: netdev: Fix kernel panic on interface rename trig notify
  leds: qcom-lpg: Add PM660L configuration and compatible
  leds: spi-byte: Use devm_led_classdev_register_ext()
  leds: pca963x: Add support for suspend and resume
  ...
2024-03-14 10:38:25 -07:00
Stephen Boyd
3066c521be Merge branches 'clk-samsung', 'clk-imx', 'clk-rockchip', 'clk-clkdev' and 'clk-rate-exclusive' into clk-next
- Increase dev_id len for clkdev lookups

* clk-samsung: (25 commits)
  clk: samsung: Add CPU clock support for Exynos850
  clk: samsung: Pass mask to wait_until_mux_stable()
  clk: samsung: Keep register offsets in chip specific structure
  clk: samsung: Keep CPU clock chip specific data in a dedicated struct
  clk: samsung: Pass register layout type explicitly to CLK_CPU()
  clk: samsung: Pass actual CPU clock registers base to CPU_CLK()
  clk: samsung: Group CPU clock functions by chip
  clk: samsung: Use single CPU clock notifier callback for all chips
  clk: samsung: Reduce params count in exynos_register_cpu_clock()
  clk: samsung: Pull struct exynos_cpuclk into clk-cpu.c
  clk: samsung: Improve clk-cpu.c style
  dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1
  clk: samsung: gs101: add support for cmu_peric1
  clk: samsung: gs101: drop extra empty line
  dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
  clk: samsung: exynos850: Propagate SPI IPCLK rate change
  clk: samsung: gs101: gpio_peric0_pclk needs to be kept on
  clk: samsung: exynos850: Add PDMA clocks
  dt-bindings: clock: tesla,fsd: Fix spelling mistake
  clk: samsung: gs101: add support for cmu_peric0
  ...

* clk-imx:
  clk: imx: imx8mp: Fix SAI_MCLK_SEL definition
  clk: imx: scu: Use common error handling code in imx_clk_scu_alloc_dev()
  clk: imx: composite-8m: Delete two unnecessary initialisations in __imx8m_clk_hw_composite()
  clk: imx: composite-8m: Less function calls in __imx8m_clk_hw_composite() after error detection

* clk-rockchip:
  clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent
  clk: rockchip: rk3588: use linked clock ID for GATE_LINK
  clk: rockchip: rk3588: fix indent
  clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
  dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
  dt-bindings: clock: rk3588: drop CLK_NR_CLKS
  clk: rockchip: rk3588: fix CLK_NR_CLKS usage
  clk: rockchip: rk3568: Add PLL rate for 128MHz

* clk-clkdev:
  clkdev: Update clkdev id usage to allow for longer names

* clk-rate-exclusive:
  clk: Add a devm variant of clk_rate_exclusive_get()
2024-03-13 12:36:21 -07:00
Stephen Boyd
68e4ebd542 Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and 'clk-microchip' into clk-next
* clk-remove:
  clk: starfive: jh7110-vout: Convert to platform remove callback returning void
  clk: starfive: jh7110-isp: Convert to platform remove callback returning void
  clk: imx: imx8-acm: Convert to platform remove callback returning void

* clk-amlogic:
  clk: meson: Add missing clocks to axg_clk_regmaps

* clk-qcom: (62 commits)
  clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
  clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
  clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
  clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
  clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
  clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
  clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
  clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times
  dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller
  clk: qcom: drop the SC7180 Modem subsystem clock driver
  clk: qcom: Use qcom_branch_set_clk_en()
  clk: qcom: branch: Add a helper for setting the enable bit
  clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const
  clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks
  clk: qcom: gcc-msm8953: add more resets
  clk: qcom: videocc-*: switch to module_platform_driver
  ...

* clk-parent:
  clk: Fix clk_core_get NULL dereference

* clk-microchip:
  clk: microchip: mpfs: convert MSSPLL outputs to clk_divider
  clk: microchip: mpfs: add missing MSSPLL outputs
  clk: microchip: mpfs: setup for using other mss pll outputs
  clk: microchip: mpfs: split MSSPLL in two
  dt-bindings: can: mpfs: add missing required clock
  dt-bindings: clock: mpfs: add more MSSPLL output definitions
2024-03-13 12:34:10 -07:00
Stephen Boyd
ee2d2a4e9c Merge branches 'clk-aspeed', 'clk-keystone', 'clk-mobileye' and 'clk-allwinner' into clk-next
* clk-aspeed:
  clk: ast2600: Add FSI parent clock with correct rate
  dt-bindings: clock: ast2600: Add FSI clock

* clk-keystone:
  clk: keystone: sci-clk: Adding support for non contiguous clocks

* clk-mobileye:
  dt-bindings: reset: mobileye,eyeq5-reset: add bindings
  dt-bindings: clock: mobileye,eyeq5-clk: add bindings
  clk: fixed-factor: add fwname-based constructor functions
  clk: fixed-factor: add optional accuracy support

* clk-allwinner:
  clk: sunxi: usb: fix kernel-doc warnings
  clk: sunxi: sun9i-cpus: fix kernel-doc warnings
  clk: sunxi: a20-gmac: fix kernel-doc warnings
2024-03-13 12:34:04 -07:00
Stephen Boyd
cf5f06c8ee Merge branches 'clk-renesas', 'clk-cleanup', 'clk-hisilicon', 'clk-mediatek' and 'clk-bulk' into clk-next
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
   for a device
 - Fix some static checker errors in the hisilicon clk driver

* clk-renesas: (25 commits)
  clk: renesas: r8a779h0: Add RPC-IF clock
  clk: renesas: r8a779h0: Add SYS-DMAC clocks
  clk: renesas: r8a779h0: Add SDHI clock
  clk: renesas: r8a779h0: Add EtherAVB clocks
  clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable
  clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux
  clk: renesas: r8a779f0: Correct PFC/GPIO parent clock
  clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
  clk: renesas: r8a779h0: Add I2C clocks
  clk: renesas: r8a779h0: Add watchdog clock
  clk: renesas: r8a779h0: Add PFC/GPIO clocks
  clk: renesas: r8a779g0: Fix PCIe clock name
  clk: renesas: cpg-mssr: Add support for R-Car V4M
  clk: renesas: rcar-gen4: Add support for FRQCRC1
  clk: renesas: r9a07g043: Add clock and reset entries for CRU
  clk: renesas: r9a08g045: Add clock and reset support for watchdog
  dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
  dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support
  dt-bindings: power: Add r8a779h0 SYSC power domain definitions
  dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support
  ...

* clk-cleanup:
  clk: zynq: Prevent null pointer dereference caused by kmalloc failure
  clk: fractional-divider: Use bit operations consistently
  clk: fractional-divider: Move mask calculations out of lock
  clk: ti: dpll3xxx: use correct function names in kernel-doc
  clk: clocking-wizard: Remove redundant initialization of pointer div_addr
  clk: keystone: sci-clk: match func name comment to actual
  clk: cdce925: Remove redundant assignment to variable 'rate'
  MAINTAINERS: drop Sekhar Nori

* clk-hisilicon:
  clk: hisilicon: Use devm_kcalloc() instead of devm_kzalloc()
  clk: hisilicon: hi3559a: Fix an erroneous devm_kfree()
  clk: hisilicon: hi3519: Release the correct number of gates in hi3519_clk_unregister()

* clk-mediatek:
  clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
  clk: mediatek: add infracfg reset controller for mt7988
  dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
  dt-bindings: clock: mediatek: convert SSUSBSYS to the json-schema clock
  dt-bindings: clock: mediatek: convert PCIESYS to the json-schema clock
  dt-bindings: clock: mediatek: convert hifsys to the json-schema clock
  clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical
  clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF
  clk: mediatek: mt7622-apmixedsys: Fix an error handling path in clk_mt8135_apmixed_probe()
  clk: mediatek: mt8135: Fix an error handling path in clk_mt8135_apmixed_probe()

* clk-bulk:
  clk: Provide managed helper to get and enable bulk clocks
2024-03-13 12:33:44 -07:00
Linus Torvalds
a070a08d00 Core:
- Log a message when unused PM domains gets disabled
  - Scale down parent/child performance states in the reverse order
 
 Providers:
  - qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO, PMA8084
    and PM8841
  - renesas: rcar-gen4-sysc: Reduce atomic delays
  - renesas: rcar-sysc: Adjust the waiting time to cover the worst case
  - renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains
  - imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains
  - imx: imx8mp-blk-ctrl: Error out if domains are missing in DT
 
 Improve support for multiple PM domains:
  - Add two helper functions to attach/detach multiple PM domains
  - Convert a couple of drivers to use the new helper functions
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmXvJJIXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjClQDQ/+JNgDl9Kq0hTid2wWyL498flc
 bB7kuaIdjkConPUNZ5gP0usirOGoGomHuCP4X5Ms2tWf/ZODkFDoyRhDK2sYUhlY
 wN7msCaQdMbaXXu+uglsxOKttu7N4lbJ1TwgMNgDiwt5CYirJa7GpRH96/3sIW2B
 vf8hADeWKZsuJ/2ikLPB4WFOHio5/HxqDp6zq2yCnw4rwG4zF209V3JAx/mMcUhd
 hXxxhBNVcqngqP8oJUvg6eKY6pWlRnPLvQOOMUFEgxtoCEUda3pw+SXO2JVUgI1x
 x81FneC2kPSu7/kg9G9hjWfRHs3j3eXz4fXn9C8yPvla0DFDT0jbgnJOqSZBQMd8
 4vOLaaeEcVArYg60VC13ez+vldUGAtSfcclzEPOmqQH+cihkbPeRvpve4c0YJkGy
 kEv2/fIFIJdDBxlg9vrTCczQnaYxou5jYiMkSBec1HBPnntwqQ2ji1hx3n1C+LwQ
 0AAQMldz+57oJlhso0iWDwidPairn6NprscaEINiOHdRKyrOJGr7s5vQaXy23bIc
 U7XHJLZ5cho4YECymLd7oyh30HyPz0Ya4E+NE0pf/Dj8ZZOpiUYnvs4sQuxhX9Fi
 i/3/cbyZrdSy4bQ2ld1sQV4BM+eYVAOT9l4zNFXbdhMpAjpAbSiStaEHrczhrnGI
 Fc9BvaDowjufngzhgd8=
 =KslH
 -----END PGP SIGNATURE-----

Merge tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "Core:
   - Log a message when unused PM domains gets disabled
   - Scale down parent/child performance states in the reverse order

  Providers:
   - qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO,
     PMA8084 and PM8841
   - renesas: rcar-gen4-sysc: Reduce atomic delays
   - renesas: rcar-sysc: Adjust the waiting time to cover the worst case
   - renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains
   - imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains
   - imx: imx8mp-blk-ctrl: Error out if domains are missing in DT

  Improve support for multiple PM domains:
   - Add two helper functions to attach/detach multiple PM domains
   - Convert a couple of drivers to use the new helper functions"

* tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (22 commits)
  pmdomain: renesas: rcar-gen4-sysc: Reduce atomic delays
  pmdomain: renesas: Adjust the waiting time to cover the worst case
  pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains
  pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains
  pmdomain: core: constify of_phandle_args in add device and subdomain
  pmdomain: core: constify of_phandle_args in xlate
  media: venus: Convert to dev_pm_domain_attach|detach_list() for vcodec
  remoteproc: qcom_q6v5_adsp: Convert to dev_pm_domain_attach|detach_list()
  remoteproc: imx_rproc: Convert to dev_pm_domain_attach|detach_list()
  remoteproc: imx_dsp_rproc: Convert to dev_pm_domain_attach|detach_list()
  PM: domains: Add helper functions to attach/detach multiple PM domains
  pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain
  pmdomain: mediatek: Use devm_platform_ioremap_resource() in init_scp()
  pmdomain: renesas: r8a779h0-sysc: Add r8a779h0 support
  pmdomain: imx8mp-blk-ctrl: Error out if domains are missing in DT
  pmdomain: ti: Add a null pointer check to the omap_prm_domain_init
  pmdomain: renesas: rcar-gen4-sysc: Remove unneeded includes
  pmdomain: core: Print a message when unused power domains are disabled
  pmdomain: qcom: rpmpd: Keep one RPM handle for all RPMPDs
  pmdomain: core: Scale down parent/child performance states in reverse order
  ...
2024-03-13 11:33:10 -07:00
Linus Torvalds
2184dbcde4 ARM: SoC drivers for 6.9
This is the usual mix of updates for drivers that are used on (mostly
 ARM) SoCs with no other top-level subsystem tree, including:
 
  - The SCMI firmware subsystem gains support for version 3.2 of the
    specification and updates to the notification code.
 
  - Feature updates for Tegra and Qualcomm platforms for added
    hardware support.
 
  - A number of platforms get soc_device additions for identifying newly
    added chips from Renesas, Qualcomm, Mediatek and Google.
 
  - Trivial improvements for firmware and memory drivers amongst
    others, in particular 'const' annotations throughout multiple
    subsystems.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXvgbsACgkQYKtH/8kJ
 UieH8Q/+LRzESrScIwFq0/V7lE1AadmhwMwcEf1Fsq8aMrelvPm/SWvHgIWIHTvV
 IZ/g3XS/CnBxr1JG3nbyMMe/2otEY7JxsUOOqixIuZ2gdzJvzZOBHMi54xDwbFRx
 4NbP0CRTy8K35XNnOkJO3TnwBFP+q2Fu6qHY90as8M2GIxQpWb8OONJHh8N2qPq+
 Hi3H0jjKXMInnOKpNIEQI60N4F2djGMHWkDySwFtHu40RaJjCIfmVd3PWQGz7RHl
 WQHjZ6CB+/BDgqfG0ccQ7Cikc4BLorZsjKCn8bsaLtdp4HvRCTp2ZpuFFTRq6vay
 IxqJCXrgpKjM1k9plehObEhMv4lNMbD1djG8Y6hqC+PPKbDfOLvlcat3xUK2AGgb
 ROJtKDQMXfAeSnLpw9n4Ox+BZRmwMIOcTU/20N72hlcZKY1jq/KuSqQn+LPVKIrW
 pJIhWd1B8R+2O1TewuIe3fjvfQwgATMBHBUVNRkSrzqkpcZNGQ3M5koMpClVvY6T
 Z/+hdAg58EQw0K6ukJLyrevxs1pHHhYXLCECIoU/xPs4NX4hDk7rKTFv6fdLS4Y2
 24qzjhIGYdhRXmhRQdVq+06cr3cvtm1z7Fqna3tW1+J6wtBnHO/xZ63M9n5saPcm
 NgKMAN7YLLMYuUNrd39W7U2wLGQCgknjhrbH8ZmxPypk467v08k=
 =bV/K
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "This is the usual mix of updates for drivers that are used on (mostly
  ARM) SoCs with no other top-level subsystem tree, including:

   - The SCMI firmware subsystem gains support for version 3.2 of the
     specification and updates to the notification code

   - Feature updates for Tegra and Qualcomm platforms for added hardware
     support

   - A number of platforms get soc_device additions for identifying
     newly added chips from Renesas, Qualcomm, Mediatek and Google

   - Trivial improvements for firmware and memory drivers amongst
     others, in particular 'const' annotations throughout multiple
     subsystems"

* tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  tee: make tee_bus_type const
  soc: qcom: aoss: add missing kerneldoc for qmp members
  soc: qcom: geni-se: drop unused kerneldoc struct geni_wrapper param
  soc: qcom: spm: fix building with CONFIG_REGULATOR=n
  bus: ti-sysc: constify the struct device_type usage
  memory: stm32-fmc2-ebi: keep power domain on
  memory: stm32-fmc2-ebi: add MP25 RIF support
  memory: stm32-fmc2-ebi: add MP25 support
  memory: stm32-fmc2-ebi: check regmap_read return value
  dt-bindings: memory-controller: st,stm32: add MP25 support
  dt-bindings: bus: imx-weim: convert to YAML
  watchdog: s3c2410_wdt: use exynos_get_pmu_regmap_by_phandle() for PMU regs
  soc: samsung: exynos-pmu: Add regmap support for SoCs that protect PMU regs
  MAINTAINERS: Update SCMI entry with HWMON driver
  MAINTAINERS: samsung: gs101: match patches touching Google Tensor SoC
  memory: tegra: Fix indentation
  memory: tegra: Add BPMP and ICC info for DLA clients
  memory: tegra: Correct DLA client names
  dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support
  firmware: arm_scmi: Update the supported clock protocol version
  ...
2024-03-12 10:35:24 -07:00
Rafał Miłecki
64e558500d dt-bindings: leds: Add LED_FUNCTION_WAN_ONLINE for Internet access
It's common for routers to have LED indicating link on the WAN port.

Some devices however have an extra LED that's meant to be used if WAN
connection is actually "online" (there is Internet access available).

It was suggested to add #define for such use case.

Link: https://lore.kernel.org/linux-devicetree/80e92209-5578-44e7-bd4b-603a29053ddf@collabora.com/T/#u
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240223112223.1368-1-zajec5@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
2024-03-07 08:48:12 +00:00
Rafał Miłecki
ec18a2a83b dt-bindings: leds: Add FUNCTION defines for per-band WLANs
Most wireless routers and access points can operate in multiple bands
simultaneously. Vendors often equip their devices with per-band LEDs.

Add defines for those very common functions to allow cleaner & clearer
bindings.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240117151736.27440-1-zajec5@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
2024-03-07 08:48:00 +00:00
Arnd Bergmann
b74638bbda Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM
from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X.
 Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and
 rk356x video-decoder (missing interrupt-names).
 
 Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi
 R2 Pro (discussed with DT-maintainers beforehand of course).
 
 The VO1-GRF syscon needs its clock to work, and that clock also needed to
 be actually exported forst, so we're sharing a branch with the Rockchip
 clock-tree (that already got merged into the main clock-tree for 6.9) for
 this small shared code.
 
 And as another step on the long road to graphics output on rk3588, 6.9 will
 get the hdmi-phy via the phy-tree, so here the dts node is added.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmXjFSEQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgZ12CACL8EGrdL32f+Yg+4pgKiC79C0WFh05F56I
 KAgK4nRs3IjOR8zRUx5Wez3uKd7vbH/3GhqSurJQ894FNqpOKYJ48cnokaG/hUV3
 dimEr5dPcSZGVdRcaQRH+B7Pe5hFmw98dZxIDfWOZzZ4XwShcfDYFx6xlGmcba+e
 KyMwjrVHyjh3M384yDx14oJw8bqn2b+oFFaZxCoz93zX9g1FUFbF6IuOsJ0KXXDR
 SRHP+s2jGxUyBltsXyQc4sa4e9i8hDbAZuBwgozLReSgTy+GJqxj87pcsc/4uCAE
 w8MW9RW/xwuFrU+BLs0UNOtdSn8BdHjEyEFc0SEtFAW9HVtoCozP
 =awlr
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXleR4ACgkQYKtH/8kJ
 UifN5w//dcJ1v6HXK31S0Egneku8WUV4ytQuLXvYeg41zIIIEv36sBeqDQxd5taa
 z2/Vy4plHCECvXWjZFEGfK44Hn/0KevrG3rHOzhNUhZV10M1KBHP5uxUYVtrmcYr
 crZsLGy90ZLnZqdKjep1bSxMv1o5QdU9LUjBZmclZEeMky4CH3ZB+sMY9shN6YZM
 wWewSwsLSoa2pAxP9g3izJjFKcwALDjNapmuXe/KFWOIOfJrm3kvASu993sfILYA
 /Wx3IRMerM9tsxAz1/KfKyKYnfT4HbF2RlNTf8OaYdypXU4eLpMboL31k8jCBoTT
 TNVkY5M722r9rbg5hTM4LTRRuEC4rfuDJEyEdHWEgqPIdXK4pwMncQDBVwimunIN
 sEG5TajVI34e9ZInptJQ/ZBCKCllC5gpAPcLw9GrRw7guuCfIbpQj0F+2lDFR9Ob
 FtYW7Ua6Nbw7jPbOCW6qrF/ujnbG3X317aYugpuqiakPW/G+kv11CtRsWZV+OBTv
 SXgRqtYTKprFJxOY5nMnlkG7+ps/B2ctgOGuq1mjcoodsZDF8WW6q00U9Jf9IbVF
 f78ed9DOJ+M70NKJ1QLBIXDLhcZ/Mlv2m9akG8YqmVvBs9efRPQc0mnFQUvWiMDq
 7xFXZRl2i2xe5IX0JIE7Ujvox/APZARrHhQldHfkC9S5jSlCi0E=
 =SbMB
 -----END PGP SIGNATURE-----

Merge tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM
from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X.
Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and
rk356x video-decoder (missing interrupt-names).

Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi
R2 Pro (discussed with DT-maintainers beforehand of course).

The VO1-GRF syscon needs its clock to work, and that clock also needed to
be actually exported forst, so we're sharing a branch with the Rockchip
clock-tree (that already got merged into the main clock-tree for 6.9) for
this small shared code.

And as another step on the long road to graphics output on rk3588, 6.9 will
get the hdmi-phy via the phy-tree, so here the dts node is added.

* tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433
  arm64: dts: rockchip: Add basic support for QNAP TS-433
  dt-bindings: arm: rockchip: Add QNAP TS-433
  arm64: dts: rockchip: add Haikou baseboard with RK3588-Q7 SoM
  arm64: dts: rockchip: add RK3588-Q7 (Tiger) SoM
  dt-bindings: arm: rockchip: Add Theobroma-Systems RK3588 Q7 with baseboard
  arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2s
  arm64: dts: rockchip: fix reset-names for rk356x i2s2 controller
  arm64: dts: rockchip: add missing interrupt-names for rk356x vdpu
  arm64: dts: rockchip: add clock to vo1-grf syscon on rk3588
  dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X
  arm64: dts: rockchip: Add devicetree support for TB-RK3588X board
  arm64: dts: rockchip: adjust vendor on orangepi rk3399 board
  arm64: dts: rockchip: adjust vendor on Banana Pi R2 Pro board
  dt-bindings: arm: rockchip: Correct vendor for Banana Pi R2 Pro
  dt-bindings: arm: rockchip: Correct vendor for Orange Pi RK3399 board
  arm64: dts: rockchip: Add HDMI0 PHY to rk3588
  dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
  dt-bindings: clock: rk3588: drop CLK_NR_CLKS
  clk: rockchip: rk3588: fix CLK_NR_CLKS usage

Link: https://lore.kernel.org/r/3695004.ElGaqSPkdT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-03-04 08:32:45 +01:00
Arnd Bergmann
f011770485 STM32 DT for v6.9, round 1
Highlights:
 ----------
 
 - MCU:
   - Add DSI support on stm32f769.
   - Add display support on stm32f769-disco.
   - Add stm32f769-disco-mb1166-reva09 board support which belongs to
     the novatek NT35510 panel.
 
 - MPU:
   - STM32MP13:
     - Add CRC support an enable it on stm32mp135f-dk.
     - Enable CRYP on stm32mp135f-dk.
 
   - STMP32MP15:
    - Fix DSI peripheral clock: use bus clock instead of kernel clock
      for pclk.
 
    - LXA: driver powerboard lines as open drain.
    - LXA: reduce RGMII drive strenght to reduce EMI emmissions.
 
   - STM32MP25:
     - Add video encoder / video decoder support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmXgVQ8dHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIXNVA/+PqcJRmO1aWmj/1HY
 DSwmCZ9W8kIVuUT1X/oAcb2UwiDOvNNSelAKARs4KWmc54sH7LW7xek7iEes127a
 xaqdnCShFdHYtqfrVsiPTncRjplNzKrvINvKDdkPvFHp0qgQ7IjwWlkZY2JOssya
 9iorKAu846fxD8/1QJUDmnJOpXY4lvl4XczMICw5NKEAV5L6oIf4jiND59h/jd0d
 5vYO99wy5f4Gf0uSJSgGPDJxtyJwjff2HaNZJGL5dHstd7VF8gUV/Nvd6rMhaAEv
 dpkITRnmS7aF3+BBXDM3pa8zVuXwnNd/6w5OWSUJNRL+LQEmeS3aUSJ3BxrsGXtL
 75drVHdLhqHtxYrEJlRSWnAUNJMrG/SDN6nfcTPV5F0Mlj8B790K6E9c5YA5iYAH
 9yeGaOPj3EcTo2nzfvZMdpuO6Dw0wn3ahzGjBWg24F4QfSqKvfuok0A6FgXQEKvj
 b98HLiywy3hBZGnupxHzGRFp+LO41o1uVzCMMoSZoXSNH0JIm/3de3lFcpmxlkmG
 p0/+5scL1f3Jfc9x4D6Xa7pwZOrfZiZ8JM8DOCVEO2LQ5d/p0mcR4zMLVCYS8LQA
 6GQseDUR+egEpRpnejIPvWm06CSKBm5PuZLByWPKmkEXMMPQM07wQfMeyIwWJ/cO
 MGwMoAU2qaerBYlhSb87d2eFJ44=
 =CSVX
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXlblUACgkQYKtH/8kJ
 UieUzw//VkCNYTje/5+dZ19wa9Rw5upL9awkgKvIfzs7lwmVivPRVUHoCpGNSsNc
 AFHc+AdLFynwowShOR4oMDyT4f50b4+1OXfUXIRI6vDkg42vbqBoMrYrSFqtMJRt
 RbRaMRm9QrInHzoQzJgKIvq+Jo57TCXuEeE7tPMVhR48h2yB8rlwkP74oEnvVFgl
 iLtU9ScXZe0dS/inBadKF7tSv57I7FTFMCQ5wSqvwPF3QAT21EaXdp5daE0Vf71f
 r1Jgy1AAm4JWrMexAtDJCuSx2stYMK7n8VKZBB6AZ4321TFlrIGnY4GGVU5vJXRS
 X2sfWKK/YHucfSC1w+Mwr8pVGicjZy+4izNDyqDcTivkSohLDsf74UDNZqjzs0gT
 yvzH1MwIqKHgkcjWo5ZP/Sf2M8DU8L65IwFn9Yf5l7LaEIT9ZZGGLDgosz4gTR2b
 aRiz5g1S2gsodJgsFQhFFebjtI5cxmnZC9rRxdDMT8KHS8RE2h7WuJt102NkFKNO
 pReg5RPEcJ6JYoQk/4lBN6L4ls5o8txu1YMeS9uxq5kt8tiejz1ZzT97FfD+yWBg
 sizT6AW+FojLsWiSeRUtsTjvzfkI0/gCGx8AorzG8nWJCDWSq1qIxUoucqTk0naM
 vTQDLi4Lf6g2USSwl/cXaaTOVJ8QYVzCbwqwDjgNceReP9FEpkE=
 =p/sn
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.9, round 1

Highlights:
----------

- MCU:
  - Add DSI support on stm32f769.
  - Add display support on stm32f769-disco.
  - Add stm32f769-disco-mb1166-reva09 board support which belongs to
    the novatek NT35510 panel.

- MPU:
  - STM32MP13:
    - Add CRC support an enable it on stm32mp135f-dk.
    - Enable CRYP on stm32mp135f-dk.

  - STMP32MP15:
   - Fix DSI peripheral clock: use bus clock instead of kernel clock
     for pclk.

   - LXA: driver powerboard lines as open drain.
   - LXA: reduce RGMII drive strenght to reduce EMI emmissions.

  - STM32MP25:
    - Add video encoder / video decoder support.

* tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: add video encoder support to stm32mp255
  arm64: dts: st: add video decoder support to stm32mp255
  ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
  ARM: dts: stm32: enable CRC on stm32mp135f-dk
  ARM: dts: stm32: add CRC on stm32mp131
  ARM: dts: add stm32f769-disco-mb1166-reva09
  ARM: dts: stm32: add display support on stm32f769-disco
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
  ARM: dts: stm32: add DSI support on stm32f769
  dt-bindings: mfd: stm32f7: Add binding definition for DSI
  dt-bindings: nt35510: document 'port' property
  ARM: dts: stm32: lxa-tac: reduce RGMII interface drive strength
  ARM: dts: stm32: fix DSI peripheral clock on stm32mp15 boards
  ARM: dts: stm32: lxa-tac: drive powerboard lines as open-drain

Link: https://lore.kernel.org/r/a7ae1058-e24d-4a6b-900f-401f0e3ae17c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-03-04 07:46:45 +01:00
Arnd Bergmann
aefe054f2c Qualcomm ARM64 DeviceTree updates for v6.9
Four variants of Samsung Galaxy Core Prime and Grand Prime, built on
 MSM8916, and the Hardware Development Kit (HDK) for SM8550, are
 introduced.
 
 On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P,
 TCSR, USB, display, audio, and soundwire support is introduced, and
 enabled across the CRD and QCP devices.
 
 For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is
 defined. Missing qlink-logging reserved-memory region is added for the
 modem remoteproc. FastRPC compute contexts are marked dma-coherent.
 Audio, USB Type-C and PM8010 support is introduced across MTP and QRD
 devices.
 
 GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X,
 SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550.
 
 UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP,
 SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650.
 
 PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450,
 SM8550, SM8650, SC7280, and SC8180X
 
 On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline
 Crypto Engine (ICE) is enabled for IPQ9574.
 
 On MSM8953 the GPU and its IOMMU is introduced, the reset for the
 display subsystem is also wired up.
 
 VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and
 SM6115.
 
 USB Type-C port management is enabled on QRB4210 RB2.
 
 On the SA8295P ADP the MAX20411 regulator powering the GPU rails is
 introduced and the GPU is enabled. The first PCI instance on SA8540P
 Ride is disabled for now, as a fix for the interrupt storm produced here
 has not been presented.
 
 On SA8775P the firmware memory map has changed and is updated. Safety
 IRQ is added to the Ethernet controller.
 
 On SC7180 UFS support is introduced and the cros-ec-spi is marked as
 wakeup source.
 
 For SC7280 capacity and DPC properties are added, cryptobam definition
 is improved to work in more firmware environments, more Chrome-specific
 properties are moved out from main dtsi, and cros-ec-spi is maked as a
 wakeup source. Slimbus definition is added to the platform.
 
 A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK
 and Venus are enabled. LEDs are introduced and voltage settings
 corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes
 and GCC protected clocks are introduced to make the board boot properly.
 
 RPMh sleep stats and a variety of cleanups and fixes are introduced for
 SC8180X.
 
 On SC8280XP the additional tsens instances are introduced. Camera
 Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp
 vadc channels are introduced on the CRD, to allow ADC channels to be
 tied to the shared PMIC temp-alarms, to actually report temperature.
 
 On SDM630 USB QMP PHY support is introduced and enabled on the Inforce
 IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled
 and configured.
 
 On SM6350 display subsystem interconnects and tsens-based thermal zones
 are added. On SM7125 UFS support is added.
 
 On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware
 paths are corrected.
 
 SM8150 PCIe controller definitions are corrected.
 
 As with SM8650, the SM8550 the fastrpc compute contexts are marked
 dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS
 controller frequency definition is moved to the generic opp-table.
 Touchscreen is enabled on the QRD device.
 
 As usual, a variety of smaller cleanups and corrections to match
 DeviceTree bindings and style guidelines are introduced across the
 various files.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmXayZYVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FtLcQAJyCQ/wRZ2BVVr3afFqWaAIQQ4+X
 mTywp/1dtWDbLMew2WIcv1KLHVDynsPWYr/AWM3w0kjgbiqr+EzZl18GVAqf53QB
 CCkgbLClEKl8NyGQGKWRfp0PF5K/ujv50+6WxwJ+46Sm63odAHe1MZFQQsyuMACn
 uP7R9yiKt39ztwXp24KbbS6OKNnxtvqeI2OTYFiQV6kR/AqTONrIedqNhvMfgAw9
 jOF5ZkqDTlTqJhcszOkzfBC18bnTLvhKP0TG4YhlUpDwJVIaGVp3vzIzX7PJgVIA
 XxbWqc6I91PIPTHCu4gCcklQXLdu3Uc1cBqufiE70+GgDo4+P4nJkSDNeSrOUuQA
 NXUULnFyum7U0S3yIQHD2wiUIqRwgwfLJeKe7Z8kya4cCWkcvUBWBw+e8GCADlEI
 R22pY4bpJwJYO66TCHT/5A05HjnSh/wY1O56fLepJ5ywGQKX7U71mZsGehSgwp4u
 /OuWgRqnMmcyNAZKE/NMFfGUCRLRWwzWTl4VQ1Fiq+JN3jcySFyAm+cW8NXQ3q6y
 oDcxx8TyWn+nBS/oErNZ9Q0I7jQun4DzUyYszeBEzffyWPie3KI6KtqlkJGSmK/y
 Z1kCOnlJSfDNnRYHR82fNFSuHpIpBYhdSWUduweLwiX36ZfFcZ8QA8eTsDANNgf4
 TZflGJSXL8YMBucn
 =LM9R
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXhqwQACgkQYKtH/8kJ
 Uie8thAAk7/ASn/Q8PcHAEamCk34HFADaVnUpU6OTtQwiBDr3amRx8IfrGqxbW6e
 BVZOFnasehDLl68433XrFTQfaRLFxRJEoY5sZ1PFOCZvqoO8IfjawokpjzKzq6PK
 0HprU82+CVl9UwYjcAEWD2y/alQ4Q48YUF971q7dzBCTey8gXUZtyW2fk7ZptzR1
 utq3rE3zK+WRvijTdHNsjw3qdwoM3K8QrryocKqYqzQM9RKNu2JfJgH1VL+8W70x
 eZvASON8wYgByaKke5WrK9k1ZGCj01Qy7bfdv/hzz+DZ+KkvvJce+/gy1zB5klzV
 fP6qSP5BP8zTzaQx/pqK3TDb/QMXNndwmWYufAtQ4LE0c5AwDnd9ZJN29yb4ASME
 cSUfc0cfrL/JrWlk17FWPo94z9InWBurZg/L8ljS3ms6MWUQcaZjIPrUYz+scAdF
 dVlJJrX1eJVNj95q/79DfjNeRgMOzj8E5dm/qGDEM/XxQvCLo3pEWAiauIYRkGFE
 NsG1uZsW833gx3M0ZEtGtP9Nl2Mai5gyZjXFa+P5Of9TQ1/FYWghyn7hmfajGqlJ
 gQzsBwbJSQv9H40X907NbLE9fULHHfAfTY0SFHaH1U6LmxrGfXpKm44+KKoEABAH
 Lkx4k8da0ALK+YsYbXtPkd95zdIUx2567GwJaAZg46QKaBAjk9o=
 =+uiX
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DeviceTree updates for v6.9

Four variants of Samsung Galaxy Core Prime and Grand Prime, built on
MSM8916, and the Hardware Development Kit (HDK) for SM8550, are
introduced.

On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P,
TCSR, USB, display, audio, and soundwire support is introduced, and
enabled across the CRD and QCP devices.

For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is
defined. Missing qlink-logging reserved-memory region is added for the
modem remoteproc. FastRPC compute contexts are marked dma-coherent.
Audio, USB Type-C and PM8010 support is introduced across MTP and QRD
devices.

GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X,
SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550.

UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP,
SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650.

PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450,
SM8550, SM8650, SC7280, and SC8180X

On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline
Crypto Engine (ICE) is enabled for IPQ9574.

On MSM8953 the GPU and its IOMMU is introduced, the reset for the
display subsystem is also wired up.

VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and
SM6115.

USB Type-C port management is enabled on QRB4210 RB2.

On the SA8295P ADP the MAX20411 regulator powering the GPU rails is
introduced and the GPU is enabled. The first PCI instance on SA8540P
Ride is disabled for now, as a fix for the interrupt storm produced here
has not been presented.

On SA8775P the firmware memory map has changed and is updated. Safety
IRQ is added to the Ethernet controller.

On SC7180 UFS support is introduced and the cros-ec-spi is marked as
wakeup source.

For SC7280 capacity and DPC properties are added, cryptobam definition
is improved to work in more firmware environments, more Chrome-specific
properties are moved out from main dtsi, and cros-ec-spi is maked as a
wakeup source. Slimbus definition is added to the platform.

A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK
and Venus are enabled. LEDs are introduced and voltage settings
corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes
and GCC protected clocks are introduced to make the board boot properly.

RPMh sleep stats and a variety of cleanups and fixes are introduced for
SC8180X.

On SC8280XP the additional tsens instances are introduced. Camera
Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp
vadc channels are introduced on the CRD, to allow ADC channels to be
tied to the shared PMIC temp-alarms, to actually report temperature.

On SDM630 USB QMP PHY support is introduced and enabled on the Inforce
IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled
and configured.

On SM6350 display subsystem interconnects and tsens-based thermal zones
are added. On SM7125 UFS support is added.

On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware
paths are corrected.

SM8150 PCIe controller definitions are corrected.

As with SM8650, the SM8550 the fastrpc compute contexts are marked
dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS
controller frequency definition is moved to the generic opp-table.
Touchscreen is enabled on the QRD device.

As usual, a variety of smaller cleanups and corrections to match
DeviceTree bindings and style guidelines are introduced across the
various files.

* tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (176 commits)
  arm64: dts: qcom: sm6115: fix USB PHY configuration
  arm64: dts: sm8650: Add msi-map-mask for PCIe nodes
  arm64: dts: qcom: replace underscores in node names
  dt-bindings: arm: qcom: Add Samsung Galaxy Tab 4 10.1 LTE
  arm64: dts: qcom: pm4125: define USB-C related blocks
  arm64: dts: qcom: sa8540p-ride: disable pcie2a node
  arm64: dts: qcom: sc7280: add slimbus DT node
  arm64: dts: qcom: sc7280: Add capacity and DPC properties
  arm64: dts: qcom: pmi632: Add PBS client and use in LPG node
  arm64: dts: qcom: sm8550: Use GIC-ITS for PCIe0 and PCIe1
  arm64: dts: qcom: sm8150: correct PCIe wake-gpios
  arm64: dts: qcom: sdm845-db845c: correct PCIe wake-gpios
  arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
  arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
  arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add fuel gauge
  arm64: dts: qcom: sm6350: Add interconnect for MDSS
  arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add initial device trees
  arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2
  arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts
  arm64: dts: qcom: minor whitespace cleanup
  ...

Link: https://lore.kernel.org/r/20240225050146.484422-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-03-01 11:16:36 +01:00
Georgi Djakov
d1c1649113 Merge branch 'icc-sm7150' into icc-next
Add dt-bindings and interconnect driver support for the Qualcomm SM7150 SoC.

* icc-sm7150
  dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
  interconnect: qcom: Add SM7150 driver support

Link: https://lore.kernel.org/r/20240222174250.80493-1-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-02-29 22:43:01 +02:00
Danila Tikhonov
9c4058493b dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
The Qualcomm SM7150 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240222174250.80493-2-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-02-29 22:42:19 +02:00
Arnd Bergmann
1422eb8585 Samsung DTS ARM64 changes for v6.9
Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
 support for:
 
 1. Multi Core Timer (MCT) clocksource.
 2. Several clock controllers (DTS and DT bindings) and use new clocks in
    several other device nodes.
 3. More serial-interface instances: USI8 and USI12 with I2C.
 
 Exynos850:
 1. SPI and DMA controllers (PL330).
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmXSSV8QHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1xrKD/sHdEhe+Ry7KJs4TanYYHDJUq7I1x5K7xYd
 M1A1TAsdU+YegESN9JSxYO+p/zCmjvlS3yeoWSEKFokRUDxNQNZeCVN2tGeRQvzK
 uZyj1D6n31taDAA6zVneeZ7Xn3C5Zh0eNMy3+j6ZhqeTyW85ECdxEN+KwbrQ324r
 00+9FUH42RYNqXF8pxAMmWEEwtzdwzeQ+dU7RkcL4LZaY3HOsesX0ZxHzprVpzOo
 vQYtwoLcQ1Q4sEPOYNtDflUv33y8vfX04BUnXliNHBmgHT7XGRk35vfAnDjGEmBr
 UiDkLFs1xlaTjJCOSqmto8cQToRvX58DSEBBtGO4jPe/F1ZxYTyYymSB1ygDlz+a
 hSRRdlS5MeeV2kc1yO1uXMAI5UfNM1zXbV3fsuWjquXki/kdl7l5uj/3/UL8Jgvf
 j9G6MuNFCUcho6uXtgEf9G5FsEIW6yBtoCoSX/izIM/5o3wUy0u9DT6hnjIjnemN
 L0dahtgyrSPDKAh9yoAWhlkcs5em0LN8bPi9tLCuVAEhmcgiqlHyK9tFzwQkIJGa
 7Eq9jx2BDFJADCPXD9jWDhsNyHMZZOwK41TuSFH6i3EgLlwpUfN1TbGfUrgw5iAx
 hT7t0ecaN8xJYOb7xI6f8fO0qDYHqcxSon5b1iKr2w+7t4XLEEEMrq6B0uLsCZib
 PcBFBYsm0A==
 =Qz5k
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXgnmwACgkQYKtH/8kJ
 Uidu5A//Q7tpYouP0tKMESalkZoKYx32hCMs7ldp1TRZ11M2RxWKvxdayMiW7WNG
 8/YMOJ74VyFjVdQp7uO9V3d2brHjX4SzUucD+UX2cHSdg7ccfMuVnUo6xEtKvxX9
 OQPZwZ8iG9jQmi5MtxNqdP8c+7lk+SScVFzdZ0rJWL/OBGdTtFFct9lrXZg8Wctg
 dXBiiqBiZnBWQIvkGm5zbdM+u6/8lQuISa7xSgJfIiTEqtgR6Y5pByGpTrGVeFMW
 sCdkVFOnz4v5whNkkRPxZy1IJhkW2OqSooReIuPqo0zqcEnFEEKQfoifZWarvXqr
 wpyk6prVDi8698ebUTacyHKoaMtraXC7AVEQiEobjR136ZdTBR+Eze4fCzQJQTs4
 cAcjD49qbJJPgarM8z/zU+VUa4PQfN1x2TRrvx/8BdqXd0nACxLWrHuRwgtKgfIK
 1Ytycw3FnNUrBZ1mARWX+LmZzypzcPJ5bbn6BUxdV+w6m3lwbos3SoyFzLyO3k5W
 r6dr++vNBWLJYHkia6i0Ft/YnbUMmRe2UrfibFvaS8LJSCxQkobfDTWpvFeA8k8q
 cqZWc+bBQ3CZxat7DD3L4aFBwAnlFFokoKf8M6JVBFfyxpiikZFBfK+xcD7uR8oV
 SzbyJY2g44xoGEbVAub7fe4QH6xcgpj3mSJDnHqkzRks8jf7Jcs=
 =KV1f
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.9

Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
support for:

1. Multi Core Timer (MCT) clocksource.
2. Several clock controllers (DTS and DT bindings) and use new clocks in
   several other device nodes.
3. More serial-interface instances: USI8 and USI12 with I2C.

Exynos850:
1. SPI and DMA controllers (PL330).

* tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: fsd: Add fifosize for UART in Device Tree
  arm64: dts: exynos: gs101: minor whitespace cleanup
  arm64: dts: exynos: gs101: enable i2c bus 12 on gs101-oriole
  arm64: dts: exynos: gs101: define USI12 with I2C configuration
  arm64: dts: exynos: gs101: enable cmu-peric1 clock controller
  dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
  arm64: dts: exynos: Add SPI nodes for Exynos850
  arm64: dts: exynos: Add PDMA node for Exynos850
  arm64: dts: exynos: gs101: use correct clocks for usi_uart
  arm64: dts: exynos: gs101: use correct clocks for usi8
  arm64: dts: exynos: gs101: sysreg_peric0 needs a clock
  arm64: dts: exynos: gs101: enable eeprom on gs101-oriole
  arm64: dts: exynos: gs101: define USI8 with I2C configuration
  arm64: dts: exynos: gs101: update USI UART to use peric0 clocks
  arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
  arm64: dts: exynos: gs101: remove reg-io-width from serial
  arm64: dts: exynos: gs101: define Multi Core Timer (MCT) node
  dt-bindings: clock: exynos850: Add PDMA clocks
  dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit

Link: https://lore.kernel.org/r/20240218182141.31213-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-29 16:10:36 +01:00
Dario Binacchi
55e963738a dt-bindings: mfd: stm32f7: Add binding definition for DSI
Add binding definition for MIPI DSI Host controller.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-02-29 09:50:09 +01:00
Sebastian Reichel
c81798cf9d dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed
for HDMI support.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27 17:04:58 +01:00
Sebastian Reichel
11a29dc2e4 dt-bindings: clock: rk3588: drop CLK_NR_CLKS
CLK_NR_CLKS should not be part of the binding. Let's drop it, since
the kernel code no longer uses it either.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27 17:04:58 +01:00
Georgi Djakov
6025a81ae6 Merge branch 'icc-cleanup' into icc-next
* icc-cleanup
  interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes
  dt-bindings: interconnect: Remove bogus interconnect nodes
  interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes
  interconnect: qcom: sa8775p: constify pointer to qcom_icc_node
  interconnect: qcom: sm8250: constify pointer to qcom_icc_node
  interconnect: qcom: sm6115: constify pointer to qcom_icc_node
  interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm
  interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm
  dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address
  interconnect: constify of_phandle_args in xlate

Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-02-26 00:42:03 +02:00
Sam Protsenko
76dedb9c0b dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1
Document CPU clock management unit compatibles and add corresponding
clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each
containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks
for each cluster, and there are alternate ("switch") clocks that can be
used temporarily while re-configuring the PLL for the new rate. ACLK,
ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses.
CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to
change CPU rates. Also some CoreSight clocks can be derived from
DBG_USER (debug clock).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-02-25 16:48:45 +01:00
Théo Lebrun
4a85e82658 dt-bindings: clock: mobileye,eyeq5-clk: add bindings
Add DT schema bindings for the EyeQ5 clock controller driver.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-3-31d4ce3630c3@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-21 22:14:28 -08:00
Eddie James
692678b69c dt-bindings: clock: ast2600: Add FSI clock
Add a definition for the FSI clock.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240215220759.976998-2-eajames@linux.ibm.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-21 21:45:45 -08:00
Frank Wunderlich
c9d9bea92c dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
Add reset constants for using as index in driver and dts.

Value is starting again from 0 because resets are used in another device
than existing constants.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240201182409.39878-2-linux@fw-web.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-21 21:03:17 -08:00
Chen Wang
41197eb5f9 dt-bindings: reset: sophgo: support SG2042
Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-02-21 11:51:39 +01:00
Danila Tikhonov
307b7d8f70 dt-bindings: arm: qcom,ids: Add IDs for SM8475 family
Add Qualcomm SM8475/SM8475P/SM8475_2 (cape) SoC IDs.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240212201428.87151-2-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-13 23:43:11 -06:00
Krzysztof Kozlowski
6e71647145 dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR".  Correct it
to keep consistent format and avoid copy-paste issues.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
2024-02-13 12:12:28 -06:00
Geert Uytterhoeven
abb3fa662b clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the
parent clock of the Pin Function (PFC/GPIO) module clocks is the CP
clock.

Fix this by adding the missing CP clock, and correcting the PFC parents.

Fixes: f2afa78d5a ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions")
Fixes: 36ff366033 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be
2024-02-13 17:10:26 +01:00
Luca Weiss
05d1039503 dt-bindings: power: rpmpd: Add MSM8974 power domains
Add the compatibles and indexes for the rpmpd in MSM8974, both with the
standard PM8841+PM8941 PMICs but also devices found with PMA8084.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240210-msm8974-rpmpd-v2-1-595e2ff80ea1@z3ntu.xyz
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-02-13 13:16:49 +01:00
Bjorn Andersson
286ffaafa6 Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into clk-for-6.9
Merge the two SC8180X reset defines through a topic branch, to allow
them being picked up in the DeviceTree source tree as well.
2024-02-07 12:14:48 -06:00
Bjorn Andersson
d3b2afb925 Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into clk-for-6.9
Merge MSM8953 GCC DeviceTree binding update through topic branch, to
allow it to be merged into DeviceTree source tree as well.
2024-02-07 12:14:48 -06:00
André Draszik
455061eb32 dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity
Peripheral 1 (PERIC1) clock management unit.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-02-07 16:27:13 +01:00
Bjorn Andersson
cc2bc7a7ab Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into HEAD
Merge clock topic branch that introduces the SC8180X CLK_REF enable
clocks.
2024-02-06 17:54:05 -06:00
Manivannan Sadhasivam
26447dad81 dt-bindings: clock: qcom: Add missing UFS QREF clocks
Add missing QREF clocks for UFS MEM and UFS CARD controllers.

Fixes: 0fadcdfdcf ("dt-bindings: clock: Add SC8180x GCC binding")
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 16:11:03 -06:00
Bjorn Andersson
5ca4cd8eaa Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into arm64-for-6.9
Merge MSM8953 GCC DeviceTree binding update from topic branch, to get
access to newly introduced MDSS reset constants.
2024-02-06 16:04:25 -06:00
Vladimir Lypak
18ba9974b8 dt-bindings: clock: gcc-msm8953: add more resets
Add new defines for some more BCRs found on MSM8953.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message, add more resets]
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 16:03:26 -06:00
Bjorn Andersson
78654850f7 Merge branch '20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org' into clk-for-6.9
Merge X1E clock bindings through a topic branch, to make the defines
available for inclusion in DeviceTree branches as well.
2024-02-06 11:11:24 -06:00
Rajendra Nayak
7180f3685d dt-bindings: clock: qcom: Document the X1E80100 Camera Clock Controller
Add bindings documentation for the X1E80100 Camera Clock Controller.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Abel Vesa
80de9d9dfb dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock Controller
Add bindings documentation for the X1E80100 TCSR Clock Controller.

Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Rajendra Nayak
bb213e13ce dt-bindings: clock: qcom: Document the X1E80100 GPU Clock Controller
Add bindings documentation for the X1E80100 Graphics Clock Controller.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Rajendra Nayak
4f70a09bde dt-bindings: clock: qcom: Document the X1E80100 Display Clock Controller
Add bindings documentation for the X1E80100 Display Clock Controller.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-2-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Conor Dooley
c886b7297e dt-bindings: clock: mpfs: add more MSSPLL output definitions
There are 3 undocumented outputs of the MSSPLL that are used for the CAN
bus, "user crypto" module and eMMC. Add their clock IDs so that they can
be hooked up in DT.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-02-06 14:07:18 +00:00
Konrad Dybcio
e92c932674 dt-bindings: interconnect: Remove bogus interconnect nodes
The downstream kernel has infrastructure for passing votes from different
interconnect nodes onto different RPMh RSCs. This neither implemented, not
is going to be implemented upstream (in favor of a different solution
using ICC tags through the same node).

Unfortunately, as it happens, meaningless (in the upstream context) parts
of the vendor driver were copied, ending up causing havoc - since all
"per-RSC" (in quotes because they all point to the main APPS one) BCMs
defined within the driver overwrite the value in RPMh on every
aggregation.

To both avoid keeping bogus code around and possibly introducing
impossible-to-track-down bugs (busses shutting down for no reason), get
rid of the duplicated ICC node definitions.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240102-topic-x1e_fixes-v1-2-70723e08d5f6@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-01-31 15:48:19 +02:00
Adam Skladowski
47878b4512 dt-bindings: interconnect: Add Qualcomm MSM8909 DT bindings
Add bindings for Qualcomm MSM8909 Network-On-Chip interconnect devices.

[Stephan: Drop separate mm-snoc that exists downstream since it's
 actually the same NoC as SNoC in hardware]

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Link: https://lore.kernel.org/r/20231220-icc-msm8909-v2-1-3b68bbed2891@kernkonzept.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-01-31 15:08:46 +02:00
Duy Nguyen
3bbdf8c3d3 dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
2024-01-31 11:04:14 +01:00
Duy Nguyen
8923149ffc dt-bindings: power: Add r8a779h0 SYSC power domain definitions
Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/c5cbef71178cada761e9da7bcbb6f21334f93ef8.1706194617.git.geert+renesas@glider.be
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-01-30 13:53:14 +01:00
Satya Priya Kakitapalli
4b3dbd706a dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150
Add gcc video axic, axi0 and axi1 resets for the global clock controller
on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-01-28 11:54:09 -06:00
Tengfei Fan
3019d8f7ea dt-bindings: arm: qcom,ids: add SoC ID for QCM8550 and QCS8550
Add the ID for the Qualcomm QCM8550 and QCS8550 SoC, QCS8550 is a QCS
version of QCM8550.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240119100621.11788-3-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-01-27 21:44:37 -06:00
Sam Protsenko
bc8cc7fb55 dt-bindings: clock: exynos850: Add PDMA clocks
Add constants for Peripheral DMA (PDMA) clocks in CMU_CORE controller:
  - PDMA_ACLK: clock for PDMA0 (regular DMA)
  - SPDMA_ACLK: clock for PDMA1 (secure DMA)

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240120012948.8836-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-01-23 13:23:11 +01:00
Tudor Ambarus
f80c43887a dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0)
clock management unit.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240119111132.1290455-2-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-01-23 10:46:55 +01:00
Linus Torvalds
65163d16fc dmaengine fixes for v6.8-rc1
Driver fixes for:
  - Xilinx xdma driver operator precedence and initialization fix
  - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
  - format-overflow warning fix for rz-dmac, sh usb dmac drivers
  - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmWsHdgACgkQfBQHDyUj
 g0efvxAAm/oQdH9z5bVC/C3qzP89YB5z1yOKb/xCMfa+vAfJtikKPin3NK0auSD1
 Cx3xNWD6FFWmtJvYJ+d3eqbC1KDO8bXhICTGYOA68DGX06vzYfhYqsKucGFc7SoC
 V4x+XTBlj9x/V6cbqdDLTIurxFtZCGnAks0uCC+jaKmqfS9+oa5/NQgWuUwds7Mb
 jUGPEgJsqKxxbCwuXAYsu+fv0zkWrUNTIN6alIFs1GR+TidmD0x906/P8B+TL4l/
 nEEOi/NRw/ZMQjkjsRdj6V0G1K/0LZRvEa2sM2DunwMN+WxJ4ghWHLMxw/yUQYkI
 IA0RUADNqxDdH9HAb53trtGKQh/60QsjvKrIaEFbIm99TNgfcvqNTVTk77WB1/S/
 llQVYNap9k7hvFTu+l757U9jp2rEzV4XiaClk191+NyCS7CszlqpQ02pFrVo1FS2
 j/369AjVNRpBUDa20uxbeDRZ0naoUKnJnJPoCqaG2JvRzWmJnHtuSIxFYzmXINtB
 t/2sdunY/bcGdaqLmxC80idMy5QNwxJ8oA8U9o8KBcLsCMJXdCTXQVN+P3t5ZeON
 q0oEPFayFlIiqqYsffCwjMAk/sNqpoGOp+127O5yiFtmgY5hZhoLgoGWC3HnAy2U
 mDGetqNO0JfVEEcKRvzLS6y8MiUTznASTq2Z2ZBK7/mXRVAx28s=
 =OhF6
 -----END PGP SIGNATURE-----

Merge tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "New support:
   - Loongson LS2X APB DMA controller
   - sf-pdma: mpfs-pdma support
   - Qualcomm X1E80100 GPI dma controller support

  Updates:
   - Xilinx XDMA updates to support interleaved DMA transfers
   - TI PSIL threads for AM62P and J722S and cfg register regions
     description
   - axi-dmac Improving the cyclic DMA transfers
   - Tegra Support dma-channel-mask property
   - Remaining platform remove callback returning void conversions

 Driver fixes for:
   - Xilinx xdma driver operator precedence and initialization fix
   - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
   - format-overflow warning fix for rz-dmac, sh usb dmac drivers
   - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma
     drivers"

* tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits)
  dmaengine: dw-edma: increase size of 'name' in debugfs code
  dmaengine: fsl-qdma: increase size of 'irq_name'
  dmaengine: shdma: increase size of 'dev_id'
  dmaengine: xilinx: xdma: Fix kernel-doc warnings
  dmaengine: usb-dmac: Avoid format-overflow warning
  dmaengine: sh: rz-dmac: Avoid format-overflow warning
  dmaengine: imx-sdma: fix Excess kernel-doc warnings
  dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr()
  dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma()
  dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma
  dmaengine: xilinx: xdma: Workaround truncation compilation error
  dmaengine: pl330: issue_pending waits until WFP state
  dmaengine: xilinx: xdma: Implement interleaved DMA transfers
  dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers
  dmaengine: xilinx: xdma: Add transfer error reporting
  dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr()
  dmaengine: xilinx: xdma: Rework xdma_terminate_all()
  dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
  dmaengine: xilinx: xdma: Add necessary macro definitions
  dmaengine: xilinx: xdma: Get rid of unused code
  ...
2024-01-20 15:03:25 -08:00
Linus Torvalds
0c4b09cb54 Core:
- Move the generic PM domain and its governor to the pmdomain subsystem
  - Drop the unused pm_genpd_opp_to_performance_state()
 
 Providers:
  - Convert some providers to let the ->remove() callback return void
  - amlogic: Add support for G12A ISP power domain
  - arm: Move the SCPI power-domain driver to the pmdomain subsystem
  - arm: Move Kconfig options to the pmdomain subsystem
  - qcom: Update part number to X1E80100 for the rpmhpd
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmWhIk8XHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCnvBBAAslgbFE31AthRFjRizsIhLD4+
 WXYbuAEWUGOV0VKbcs6JLGqMmgqZ8caPieNWNDPz18M2BpJ3MguS7k5YW6G12QIb
 7nmL/DCYrObO+Q8hMqPaHMRuV6+KjJ+y6UbZrKHKq+ROE+Pk5vfMk1x68nA+J5mO
 rmsDv6eAsBggo4ubDcQ79bJf4t7RdWAcNz6IY8fwZ9HkNbbaC6db6BT0t9f1aTX7
 yeZWxdy317y174xdwPTtQ5dnXQmC3FEBCuG4M0J4gb6nvLtbpoeYqlGrxkNGKxqv
 1IfMl45uu7OuGSq1f3LSpuQluAQs99KG8Y9vTG6kXKC5Xu3sIijciaGTJsCao91e
 af9pjLeX3DWl0RaLUtOB0h78meCHxf79kFUkGUv89FzIWh8iQMWcdwePeXXSNXag
 AklV/gpodCj501Dk1wjs2/3eVI5YUsEcqhLvu9Q3gzDqXy4px8Keut8AollNsfg8
 nZ9P3Kr0eHV2xqtTGYKheebLj5IDWGPC6XS+L60piij52gN6QWnywX/8Kjdms1l6
 2CclTrJ1YZG+I6tLTnrsdy0m9U2w5V2DP/rf+m/lQTRG2d9ZWdKQ+qzakQ7va4Pz
 hokLrm1cC0Wcx/ldwV1wC62WkTnRBmtA4ONMzibAFUCboay8xU7p0OaRmBJcOaPF
 +Nw7Mt3tt4Qn7iE8Fd4=
 =xSMR
 -----END PGP SIGNATURE-----

Merge tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "Core:
   - Move the generic PM domain and its governor to the pmdomain
     subsystem
   - Drop the unused pm_genpd_opp_to_performance_state()

  Providers:
   - Convert some providers to let the ->remove() callback return void
   - amlogic: Add support for G12A ISP power domain
   - arm: Move the SCPI power-domain driver to the pmdomain subsystem
   - arm: Move Kconfig options to the pmdomain subsystem
   - qcom: Update part number to X1E80100 for the rpmhpd"

* tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
  PM: domains: Move genpd and its governor to the pmdomain subsystem
  PM: domains: Drop redundant header for genpd
  PM: domains: Drop the unused pm_genpd_opp_to_performance_state()
  PM: domains: fix domain_governor kernel-doc warnings
  pmdomain: xilinx/zynqmp: Convert to platform remove callback returning void
  pmdomain: qcom-cpr: Convert to platform remove callback returning void
  pmdomain: imx93-pd: Convert to platform remove callback returning void
  pmdomain: imx93-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx8m-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx-gpcv2: Convert to platform remove callback returning void
  pmdomain: imx-gpc: Convert to platform remove callback returning void
  pmdomain: imx-pgc: Convert to platform remove callback returning void
  pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain
  dt-bindings: power: meson-g12a-power: document ISP power domain
  firmware: arm_scpi: Move power-domain driver to the pmdomain dir
  pmdomain: arm_scmi: Move Kconfig options to the pmdomain subsystem
  pmdomain: qcom: rpmhpd: Update part number to X1E80100
  dt-bindings: power: rpmpd: Update part number to X1E80100
2024-01-12 13:54:25 -08:00
Linus Torvalds
c736c9a955 Only a couple new SoCs have support added this time, primarily for Qualcomm
SM8650 based on the diffstat. Otherwise this is a collection of non-critical
 fixes and cleanups to various clk drivers and their DT bindings. Nothing is
 changed in the core clk framework this time, although there's a patch to fix a
 basic clk type initialization function. In general, this pile looks to be on
 the smaller side.
 
 New Drivers:
  - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
  - Mediatek MT7988 SoC clocks
 
 Updates:
  - Update Zynqmp driver for Versal NET platforms
  - Add clk driver for Versal clocking wizard IP
  - Support for stm32mp25 clks
  - Add glitch free PLL setting support to si5351 clk driver
  - Add DSI clocks on Amlogic g12/sm1
  - Add CSI and ISP clocks on Amlogic g12/sm1
  - Document bindings for i.MX93 ANATOP clock driver
  - Free clk_node in i.MX SCU driver for resource with different owner
  - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
  - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
  - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
  - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S
  - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
  - Reuse reset functionality in the Renesas RZ/G2L clock driver
  - Global and RPMh clock support for the Qualcomm X1E80100 SoC
  - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
  - Add a new type of branch clock, with support for controlling separate
    memory control bits, to the Qualcomm clk driver
  - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and
    QRU1000
  - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
  - Add support for the camera clock controller on Qualcomm SC8280XP
  - Correct PLL configuration in GPU and video clock controllers for
    Qualcomm SM8150
  - Add runtime PM support and a few missing resets to Qualcomm SM8150
    video clock controller
  - Fix configuration of various GCC GDSCs on Qualcomm SM8550
  - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
  - Fix up GPU and display clock controllers PLL configuration settings
    on Qualcomm SM8550
  - Cleanup variable init in Allwinner nkm module
  - Convert various DT bindings to YAML
  - A few kernel-doc fixes for Samsung SoC clock controllers
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmWdydURHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXvtQ//eoF6kwlLT9knQIE9sYQAPJrHytObVpSl
 3htHQBvSMKwJNTmzWbKWIUw9T7JliYU+aho768zKqVMVLd6PWk1eOL0NIKB/jSSz
 /OIWxS9hrcTXm/GAKX+0jyAxw97pq0Qb82PNpD+QuLAcVw/5rMVl/+pMNqeVeqjK
 2aN4QfaL7B1F1vV/rBtniG1//Hwwr7IMIT3wIBE6W4jlw84N2gayqEl/EaXabF6F
 +9Wh8bPS1ny206XGtI8KNcFkv/uFoqWjO7g/hPgXMQcVSd50oV02iJPf6HaWBx4L
 9podF3uhNuNk5v02fp1nCygzRn2YDa4eMwMjJtSxU0Inq9s01u8dWNkIgwuCJMjv
 jSKMMgxa9rHhJ7+xiYi1pQ23fHG1tx600u1zKWMkO1a0U80KeeynGFpdfhUzsD6E
 ZNUkEee2Ehw1nDMfrUqUt9dWLnRutCXa5jTvgKBWFM7hs9W+ErudAKwP0x2hNl3Z
 q8Z6RpCoGNnb1e0nw407j3AsXJkbzg9D4KGMlNNEVmuP0iZY3IsVIWrhszx0Zmi4
 M3sNNtTskbD4nX42JADhZgVpql2rSikxjfnaBsSXYSJu9SGkCF9clOSb1lKGgKmk
 gCWcGpmxdmVbTNYCgsZ/jUBs8QDgOxcyFJYLys7/tkjDec9IuxeB37vkaXv2rqU8
 t0VzUVWUqYw=
 =t0CI
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Only a couple new SoCs have support added this time, primarily for
  Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
  of non-critical fixes and cleanups to various clk drivers and their DT
  bindings.

  Nothing is changed in the core clk framework this time, although
  there's a patch to fix a basic clk type initialization function. In
  general, this pile looks to be on the smaller side.

  New Drivers:
   - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
   - Mediatek MT7988 SoC clocks

  Updates:
   - Update Zynqmp driver for Versal NET platforms
   - Add clk driver for Versal clocking wizard IP
   - Support for stm32mp25 clks
   - Add glitch free PLL setting support to si5351 clk driver
   - Add DSI clocks on Amlogic g12/sm1
   - Add CSI and ISP clocks on Amlogic g12/sm1
   - Document bindings for i.MX93 ANATOP clock driver
   - Free clk_node in i.MX SCU driver for resource with different owner
   - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
   - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
   - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
   - Add interrupt controller and Ethernet clocks and resets on Renesas
     RZ/G3S
   - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
   - Reuse reset functionality in the Renesas RZ/G2L clock driver
   - Global and RPMh clock support for the Qualcomm X1E80100 SoC
   - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
   - Add a new type of branch clock, with support for controlling
     separate memory control bits, to the Qualcomm clk driver
   - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
     and QRU1000
   - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
   - Add support for the camera clock controller on Qualcomm SC8280XP
   - Correct PLL configuration in GPU and video clock controllers for
     Qualcomm SM8150
   - Add runtime PM support and a few missing resets to Qualcomm SM8150
     video clock controller
   - Fix configuration of various GCC GDSCs on Qualcomm SM8550
   - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
   - Fix up GPU and display clock controllers PLL configuration settings
     on Qualcomm SM8550
   - Cleanup variable init in Allwinner nkm module
   - Convert various DT bindings to YAML
   - A few kernel-doc fixes for Samsung SoC clock controllers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  ...
2024-01-12 13:42:35 -08:00
Linus Torvalds
cf65598d59 drm-next for 6.8:
new drivers:
 - imagination - new driver for Imagination Technologies GPU
 - xe - new driver for Intel GPUs using core drm concepts
 
 core:
 - add CLOSE_FB ioctl
 - remove old UMS ioctls
 - increase max objects to accomodate AMD color mgmt
 
 encoder:
 - create per-encoder debugfs directory
 
 edid:
 - split out drm_eld
 - SAD helpers
 - drop edid_firmware module parameter
 
 format-helper:
 - cache format conversion buffers
 
 sched:
 - move from kthread to workqueue
 - rename some internals
 - implement dynamic job-flow control
 
 gpuvm:
 - provide more features to handle GEM objects
 
 client:
 - don't acquire module reference
 
 displayport:
 - add mst path property documentation
 
 fdinfo:
 - alignment fix
 
 dma-buf:
 - add fence timestamp helper
 - add fence deadline support
 
 bridge:
 - transparent aux-bridge for DP/USB-C
 - lt8912b: add suspend/resume support and power regulator support
 
 panel:
 - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
 - chromebook panel support
 - elida-kd35t133: rework pm
 - powkiddy RK2023 panel
 - himax-hx8394: drop prepare/unprepare and shutdown logic
 - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
 - Evervision VGG644804, SDC ATNA45AF01
 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158
 - st7701: Anbernic RG-ARC support
 - r63353 panel controller
 - Ilitek ILI9805 panel controller
 - AUO G156HAN04.0
 
 simplefb:
 - support memory regions
 - support power domains
 
 amdgpu:
 - add new 64-bit sequence number infrastructure
 - add AMD specific color management
 - ACPI WBRF support for RF interference handling
 - GPUVM updates
 - RAS updates
 - DCN 3.5 updates
 - Rework PCIe link speed handling
 - Document GPU reset types
 - DMUB fixes
 - eDP fixes
 - NBIO 7.9/7.11 updates
 - SubVP updates
 - XGMI PCIe state dumping for aqua vanjaram
 - GFX11 golden register updates
 - enable tunnelling on high pri compute
 
 amdkfd:
 - Migrate TLB flushing logic to amdgpu
 - Trap handler fixes
 - Fix restore workers handling on suspend/resume
 - Fix possible memory leak in pqm_uninit()
 - support import/export of dma-bufs using GEM handles
 
 radeon:
 - fix possible overflows in command buffer checking
 - check for errors in ring_lock
 
 i915:
 - reorg display code for reuse in xe driver
 - fdinfo memory stats printing
 - DP MST bandwidth mgmt improvements
 - DP panel replay enabling
 - MTL C20 phy state verification
 - MTL DP DSC fractional bpp support
 - Audio fastset support
 - use dma_fence interfaces instead of i915_sw_fence
 - Separate gem and display code
 - AUX register macro refactoring
 - Separate display module/device parameters
 - Move display capabilities debugfs under display
 - Makefile cleanups
 - Register cleanups
 - Move display lock inits under display/
 - VLV/CHV DPIO PHY register and interface refactoring
 - DSI VBT sequence refactoring
 - C10/C20 PHY PLL hardware readout
 - DPLL code cleanups
 - Cleanup PXP plane protection checks
 - Improve display debug msgs
 - PSR selective fetch fixes/improvements
 - DP MST fixes
 - Xe2LPD FBC restrictions removed
 - DGFX uses direct VBT pin mapping
 - more MTL WAs
 - fix MTL eDP bug
 - eliminate use of kmap_atomic
 
 habanalabs:
 - sysfs entry to identify a device minor id with debugfs path
 - sysfs entry to expose device module id
 - add signed device info retrieval through INFO ioctl
 - add Gaudi2C device support
 - pcie reset prepare/done hooks
 
 msm:
 - Add support for SDM670, SM8650
 - Handle the CFG interconnect to fix the obscure hangs / timeouts
 - Kconfig fix for QMP dependency
 - use managed allocators
 - DPU: SDM670, SM8650 support
 - DPU: Enable SmartDMA on SM8350 and SM8450
 - DP: enable runtime PM support
 - GPU: add metadata UAPI
 - GPU: move devcoredumps to GPU device
 - GPU: convert to drm_exec
 
 ivpu:
 - update FW API
 - new debugfs file
 - a new NOP job submission test mode
 - improve suspend/resume
 - PM improvements
 - MMU PT optimizations
 - firmware profile frequency support
 - support for uncached buffers
 - switch to gem shmem helpers
 - replace kthread with threaded irqs
 
 rockchip:
 - rk3066_hdmi: convert to atomic
 - vop2: support nv20 and nv30
 - rk3588 support
 
 mediatek:
 - use devm_platform_ioremap_resource
 - stop using iommu_present
 - MT8188 VDOSYS1 display support
 
 panfrost:
 - PM improvements
 - improve interrupt handling as poweroff
 
 qaic:
 - allow to run with single MSI
 - support host/device time sync
 - switch to persistent DRM devices
 
 exynos:
 - fix potential error pointer dereference
 - fix wrong error checking
 - add missing call to drm_atomic_helper_shutdown
 
 omapdrm:
 - dma-fence lockdep annotation fix
 
 tidss:
 - dma-fence lockdep annotation fix
 - support for AM62A7
 
 v3d:
 - BCM2712 - rpi5 support
 - fdinfo + gputop support
 - uapi for CPU job handling
 
 virtio-gpu:
 - add context debug name
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmWeLcQACgkQDHTzWXnE
 hr54zg//dtPiG9nRA3OeoQh/pTmbFO26uhS8OluLiXhcX/7T/c1e6ck4dA3De5kB
 wgaqVH6/TFuMgiBbEqZSFuQM6k2X3HLCgHcCRpiz7iGse2GODLtFiUE/E4XFPrSP
 VhycI64and9XLBmxW87yGdmezVXxo6KZNX4nYabgZ7SD83/2w+ub6rxiAvd0KfSO
 gFmaOrujOIYBjFYFtKLZIYLH4Jzsy81bP0REBzEnAiWYV5qHdsXfvVgwuOU+3G/B
 BAVUUf++SU046QeD3HPEuOp3AqgazF4uNHQH5QL0UD2144uGWsk0LA4OZBnU0qhd
 oM4Oxu9V+TXvRfYhHwiQKeVleifcZBijndqiF7rlrTnNqS4YYOCPxuXzMlZO9aEJ
 6wQL/0JX8d5G6lXsweoBzNC76jeU/gspd1DvyaTFt7I8l8YqWvR5V8l8KRf2s14R
 +CwwujoqMMVmhZ4WhB+FgZTiWw5PaWoMM9ijVFOv8QhXOz21rj718NPdBspvdJK3
 Lo3obSO5p4lqgkMEuINBEXzkHjcSyOmMe1fG4Et8Wr+IrEBr1gfG9E4Twr+3/k3s
 9Ok9nOPykbYmt4gfJp/RDNCWBr8QGZKznP6Nq8EFfIqhEkXOHQo9wtsofVUhyW7P
 qEkCYcYkRa89KFp4Lep6lgDT5O7I+32eRmbRg716qRm9nn3Vj3Y=
 =nuw0
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "This contains two major new drivers:

   - imagination is a first driver for Imagination Technologies devices,
     it only covers very specific devices, but there is hope to grow it

   - xe is a reboot of the i915 GPU (shares display) side using a more
     upstream focused development model, and trying to maximise code
     sharing. It's not enabled for any hw by default, and will hopefully
     get switched on for Intel's Lunarlake.

  This also drops a bunch of the old UMS ioctls. It's been dead long
  enough.

  amdgpu has a bunch of new color management code that is being used in
  the Steam Deck.

  amdgpu also has a new ACPI WBRF interaction to help avoid radio
  interference.

  Otherwise it's the usual lots of changes in lots of places.

  Detailed summary:

  new drivers:
   - imagination - new driver for Imagination Technologies GPU
   - xe - new driver for Intel GPUs using core drm concepts

  core:
   - add CLOSE_FB ioctl
   - remove old UMS ioctls
   - increase max objects to accomodate AMD color mgmt

  encoder:
   - create per-encoder debugfs directory

  edid:
   - split out drm_eld
   - SAD helpers
   - drop edid_firmware module parameter

  format-helper:
   - cache format conversion buffers

  sched:
   - move from kthread to workqueue
   - rename some internals
   - implement dynamic job-flow control

  gpuvm:
   - provide more features to handle GEM objects

  client:
   - don't acquire module reference

  displayport:
   - add mst path property documentation

  fdinfo:
   - alignment fix

  dma-buf:
   - add fence timestamp helper
   - add fence deadline support

  bridge:
   - transparent aux-bridge for DP/USB-C
   - lt8912b: add suspend/resume support and power regulator support

  panel:
   - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
   - chromebook panel support
   - elida-kd35t133: rework pm
   - powkiddy RK2023 panel
   - himax-hx8394: drop prepare/unprepare and shutdown logic
   - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
   - Evervision VGG644804, SDC ATNA45AF01
   - nv3052c: register docs, init sequence fixes, fascontek FS035VG158
   - st7701: Anbernic RG-ARC support
   - r63353 panel controller
   - Ilitek ILI9805 panel controller
   - AUO G156HAN04.0

  simplefb:
   - support memory regions
   - support power domains

  amdgpu:
   - add new 64-bit sequence number infrastructure
   - add AMD specific color management
   - ACPI WBRF support for RF interference handling
   - GPUVM updates
   - RAS updates
   - DCN 3.5 updates
   - Rework PCIe link speed handling
   - Document GPU reset types
   - DMUB fixes
   - eDP fixes
   - NBIO 7.9/7.11 updates
   - SubVP updates
   - XGMI PCIe state dumping for aqua vanjaram
   - GFX11 golden register updates
   - enable tunnelling on high pri compute

  amdkfd:
   - Migrate TLB flushing logic to amdgpu
   - Trap handler fixes
   - Fix restore workers handling on suspend/resume
   - Fix possible memory leak in pqm_uninit()
   - support import/export of dma-bufs using GEM handles

  radeon:
   - fix possible overflows in command buffer checking
   - check for errors in ring_lock

  i915:
   - reorg display code for reuse in xe driver
   - fdinfo memory stats printing
   - DP MST bandwidth mgmt improvements
   - DP panel replay enabling
   - MTL C20 phy state verification
   - MTL DP DSC fractional bpp support
   - Audio fastset support
   - use dma_fence interfaces instead of i915_sw_fence
   - Separate gem and display code
   - AUX register macro refactoring
   - Separate display module/device parameters
   - Move display capabilities debugfs under display
   - Makefile cleanups
   - Register cleanups
   - Move display lock inits under display/
   - VLV/CHV DPIO PHY register and interface refactoring
   - DSI VBT sequence refactoring
   - C10/C20 PHY PLL hardware readout
   - DPLL code cleanups
   - Cleanup PXP plane protection checks
   - Improve display debug msgs
   - PSR selective fetch fixes/improvements
   - DP MST fixes
   - Xe2LPD FBC restrictions removed
   - DGFX uses direct VBT pin mapping
   - more MTL WAs
   - fix MTL eDP bug
   - eliminate use of kmap_atomic

  habanalabs:
   - sysfs entry to identify a device minor id with debugfs path
   - sysfs entry to expose device module id
   - add signed device info retrieval through INFO ioctl
   - add Gaudi2C device support
   - pcie reset prepare/done hooks

  msm:
   - Add support for SDM670, SM8650
   - Handle the CFG interconnect to fix the obscure hangs / timeouts
   - Kconfig fix for QMP dependency
   - use managed allocators
   - DPU: SDM670, SM8650 support
   - DPU: Enable SmartDMA on SM8350 and SM8450
   - DP: enable runtime PM support
   - GPU: add metadata UAPI
   - GPU: move devcoredumps to GPU device
   - GPU: convert to drm_exec

  ivpu:
   - update FW API
   - new debugfs file
   - a new NOP job submission test mode
   - improve suspend/resume
   - PM improvements
   - MMU PT optimizations
   - firmware profile frequency support
   - support for uncached buffers
   - switch to gem shmem helpers
   - replace kthread with threaded irqs

  rockchip:
   - rk3066_hdmi: convert to atomic
   - vop2: support nv20 and nv30
   - rk3588 support

  mediatek:
   - use devm_platform_ioremap_resource
   - stop using iommu_present
   - MT8188 VDOSYS1 display support

  panfrost:
   - PM improvements
   - improve interrupt handling as poweroff

  qaic:
   - allow to run with single MSI
   - support host/device time sync
   - switch to persistent DRM devices

  exynos:
   - fix potential error pointer dereference
   - fix wrong error checking
   - add missing call to drm_atomic_helper_shutdown

  omapdrm:
   - dma-fence lockdep annotation fix

  tidss:
   - dma-fence lockdep annotation fix
   - support for AM62A7

  v3d:
   - BCM2712 - rpi5 support
   - fdinfo + gputop support
   - uapi for CPU job handling

  virtio-gpu:
   - add context debug name"

* tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits)
  drm/amd/display: Allow z8/z10 from driver
  drm/amd/display: fix bandwidth validation failure on DCN 2.1
  drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well
  drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm
  drm/amd/display: Fix recent checkpatch errors in amdgpu_dm
  Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"
  drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings()
  drm/amd/display: Fix power_helpers.c codestyle
  drm/amd/display: Fix hdcp_log.h codestyle
  drm/amd/display: Fix hdcp2_execution.c codestyle
  drm/amd/display: Fix hdcp_psp.h codestyle
  drm/amd/display: Fix freesync.c codestyle
  drm/amd/display: Fix hdcp_psp.c codestyle
  drm/amd/display: Fix hdcp1_execution.c codestyle
  drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init
  drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()'
  drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()'
  drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c
  drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()'
  drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()'
  ...
2024-01-12 11:32:19 -08:00
Linus Torvalds
f6597d1706 SoC: driver updates for 6.8
A new drivers/cache/ subsystem is added to contain drivers for abstracting
 cache flush methods on riscv and potentially others, as this is needed for
 handling non-coherent DMA but several SoCs require nonstandard hardware
 methods for it.
 
 op-tee gains support for asynchronous notification with FF-A, as well
 as support for a system thread for executing in secure world.
 
 The tee, reset, bus, memory and scmi subsystems have a couple of minor
 updates.
 
 Platform specific soc driver changes include:
 
  - Samsung Exynos gains driver support for Google GS101 (Tensor G1)
    across multiple subsystems
 
  - Qualcomm Snapdragon gains support for SM8650 and X1E along with
    added features for some other SoCs
 
  - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and MT8195,
    and driver support for MT8188 along with some code refactoring.
 
  - Microchip Polarfire FPGA support for "Auto Update" of the FPGA bitstream
 
  - Apple M1 mailbox driver is rewritten into a SoC driver
 
  - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and hisilicon
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWeypsACgkQYKtH/8kJ
 UifCpxAA0CMZRXKZOuTw9we2eS9rCy5nBrJsDiEAi9UPgQYUIrD7BVng+PAMN5UD
 AeEDEjUEmZ+a4hyDDPxwdlhI2qIvIITAZ1qbwcElXvt41MTIyo+1BK+kI6A7oxHd
 oPh9kG0yRjb5tNc6utrHbXpEb6AxfXYcdAOzA2YRonqKohYUJlGqHtAub2Dqd6FD
 nuYXGXSZKWMpd0L1X7nuD8+uBj8DbQgq0HfhiAj3vUgzwkYk/SlTo/DYByJOQeMA
 HE1X/vG7qwrdHC4VNXaiJJ/GQ6ZXAZXdK+F97v+FtfClPVuxAffMlTbb6t/CyiVb
 4HrVzduyNMlIh8OqxLXabXJ0iJ970wkuPlOZy2pZmgkV5oKGSXSGxXWAwMvOmCVO
 RSgetXYHX3gDGQ59Si+LsEQhORdChMMik5nBPdyxj1UK3QsObV40qLpHBae7GWnA
 Qb6+3FrtnbiHfOMxGmhC4lqDfgSfByW1BspxsFyy33wb+TPfYJzOnXYe8aYTZ1iw
 GSuWNa/uHF61Q2v0d3Lt09GhUh9wWradnJ+caxpB0B0MHG2QQqFI8EVwIEn1/spu
 bWpItLT8UUDgNx+F9KRzP3HqwqbDzd9fnojSPescTzudpvpP9MC5X3w05pQ6iA1x
 HFJ+2J/ENvDAHWSAySn7Qx4JKSeLxm1YcquXQW2sVTVwFTkqigw=
 =4bKY
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "A new drivers/cache/ subsystem is added to contain drivers for
  abstracting cache flush methods on riscv and potentially others, as
  this is needed for handling non-coherent DMA but several SoCs require
  nonstandard hardware methods for it.

  op-tee gains support for asynchronous notification with FF-A, as well
  as support for a system thread for executing in secure world.

  The tee, reset, bus, memory and scmi subsystems have a couple of minor
  updates.

  Platform specific soc driver changes include:

   - Samsung Exynos gains driver support for Google GS101 (Tensor G1)
     across multiple subsystems

   - Qualcomm Snapdragon gains support for SM8650 and X1E along with
     added features for some other SoCs

   - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and
     MT8195, and driver support for MT8188 along with some code
     refactoring.

   - Microchip Polarfire FPGA support for "Auto Update" of the FPGA
     bitstream

   - Apple M1 mailbox driver is rewritten into a SoC driver

   - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and
     hisilicon"

* tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits)
  memory: ti-emif-pm: Convert to platform remove callback returning void
  memory: ti-aemif: Convert to platform remove callback returning void
  memory: tegra210-emc: Convert to platform remove callback returning void
  memory: tegra186-emc: Convert to platform remove callback returning void
  memory: stm32-fmc2-ebi: Convert to platform remove callback returning void
  memory: exynos5422-dmc: Convert to platform remove callback returning void
  memory: renesas-rpc-if: Convert to platform remove callback returning void
  memory: omap-gpmc: Convert to platform remove callback returning void
  memory: mtk-smi: Convert to platform remove callback returning void
  memory: jz4780-nemc: Convert to platform remove callback returning void
  memory: fsl_ifc: Convert to platform remove callback returning void
  memory: fsl-corenet-cf: Convert to platform remove callback returning void
  memory: emif: Convert to platform remove callback returning void
  memory: brcmstb_memc: Convert to platform remove callback returning void
  memory: brcmstb_dpfe: Convert to platform remove callback returning void
  soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset
  firmware: qcom: qseecom: fix memory leaks in error paths
  dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
  soc: qcom: llcc: Fix typo in kernel-doc
  dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel
  ...
2024-01-11 11:31:46 -08:00
Stephen Boyd
a4dcb2f84b Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next
- Update Zynqmp driver for Versal NET platforms
 - Add clk driver for Versal clocking wizard IP

* clk-zynq:
  drivers: clk: zynqmp: update divider round rate logic
  drivers: clk: zynqmp: calculate closest mux rate

* clk-xilinx:
  clocking-wizard: Add support for versal clocking wizard
  dt-bindings: clock: xilinx: add versal compatible

* clk-stm:
  dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
  clk: stm32mp1: use stm32mp13 reset driver
  clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
2024-01-09 11:55:06 -08:00
Stephen Boyd
23bd8c4ad1 Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next
* clk-imx:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module

* clk-qcom: (41 commits)
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
  clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
  clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
  clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
  clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
  clk: qcom: videocc-sm8150: Add runtime PM support
  clk: qcom: videocc-sm8150: Add missing PLL config property
  clk: qcom: videocc-sm8150: Update the videocc resets
  dt-bindings: clock: Update the videocc resets for sm8150
  clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
  clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
  dt-bindings: clock: qcom: Add X1E80100 GCC clocks
  clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
  clk: qcom: branch: Add mem ops support for branch2 clocks
  ...

* clk-amlogic:
  clk: meson: g12a: add CSI & ISP gates clocks
  clk: meson: g12a: add MIPI ISP clocks
  dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
  clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks
  dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids

* clk-mediatek:
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: brcm,kona-ccu: convert to YAML
  dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
  dt-bindings: Remove alt_ref from versal
2024-01-09 11:52:49 -08:00
Daniel Golle
5cfa3beb77 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
Add reset ID for ethwarp subsystem allowing to reset the built-in
Ethernet switch of the MediaTek MT7988 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/0c14bbacf471683af67ffa7572bfa1d5c45a0b5d.1702849494.git.daniel@makrotopia.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:55:15 -08:00
Sam Shih
8187e001de dt-bindings: clock: mediatek: add MT7988 clock IDs
Add MT7988 clock dt-bindings for topckgen, apmixedsys, infracfg,
ethernet and xfipll subsystem clocks.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/27f99db432e9ccc804cc5b6501d7d17d72cae879.1702849494.git.daniel@makrotopia.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:55:12 -08:00
Inochi Amaoto
5a72f07111 dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
Add definition for the clock controller of the CV1800 series SoC.

For CV181X, it has a clock that CV180X does not have. To avoid misuse,
also add a compatible string to identify CV181X series SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:52:52 -08:00
Arnd Bergmann
2d7123c7e1 Qualcomm ARM64 updates for v6.8
Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
 support for the MTP and QRD development devices, the new Snapdragon X
 Elite compute platform with QCP and CRD development/references devices,
 the QCS6590/QCM6490 platform with support for the IDP development device
 and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
 built on MSM8939, and Xiaomi Pad 6 on SM8250.
 
 On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
 additional QUP SPI controller is added.
 
 CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
 and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.
 
 Common elements of the IPQ9574 RDP boards are refactored into a common
 include file. IPQ9574 also gains description of its LEDs and WPS
 busttons.
 
 MSM8916 finally gets the DSP-based audio described, and this is enabled
 for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
 notification LED, battery and charger support is added to Loncheer
 L8150, and GPU is enabled for Samsung Galaxy Tab A.
 
 Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
 enabled as well. The Longcheer L9100 gains RGB notification LED support,
 and the wireless subsystem is enabled.
 
 Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
 enabled, to allow using wakeup interrupts. Interconnect providers, MPM
 and display are added to QCM2290.
 
 UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
 On Fairphone FP3 audio, WiFi and Bluetooth are enabled.
 
 On the Robotics RB1, HDMI and the CAN bus controller are added. On
 Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
 Bluetooth is enabled on the Robotics RB5.
 
 On SA8775P tsens and thermal is added, as well as the random number
 generator.
 
 Sound and RTC support is added for the Acer Aspire 1.
 
 On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
 to inherit the base dtsi. Support for UFS, crypto, TrustZone based
 remoteprocs, the Camera Control Interface (CCI) and random number
 generator support are added. Additionally a variety of smaller fixes are
 introduced.
 
 A variety of fixes are introduced for SC8180X, in particular missing
 power-domains and interconnects.
 
 On SC8280XP the camera clock controller is added, and a number of
 smaller fixes are introduced.
 
 The display subsystem in SDM670 is described.
 
 On SDX75 interconnect providers are added, as is USB3 and the related
 PHY, which is then enabled on the IDP device.
 
 On SM6115 interconnect providers are added and existing clients are
 wired up. A UART controller is added as well.
 
 The MPM is added, to provide wakeup interrutps, on SM6375. The modem
 subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
 supplies are corrected.
 
 On SM8150 the DisplayPort controller is added, for USB Type-C output,
 which together with the addition of HDMI is described on the HDK board.
 
 GPU and random number generator support are added to SM8450, and enabled
 on the HDK board.
 
 On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
 added, and enabled on both MTP and QRD devices.
 
 Additionally a large number of smaller functional and DeviceTree binding
 validation issues are corrected across a variety of platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmWBrVoVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fvz8P+gOomLgaY79YUJHjKnJ4ThQGske/
 RZFealz1ELsLCKcFMj9UMp4ldyQc6aNNyvTeE/GtO32IfYeA68THwOWvnrr+W84W
 PLFoS2yfEZpChZTz+IZpaYUblwD6psiJek3E1zSX4YyO4nkQtCUE9x1SfgpzY/Dr
 5NUjxIIlkPILSk6X2t9nwYTUZ7ZOr8EAMA39wYbweBCtHMh72aVC1XVQWfIUqAIq
 8jhFOhUuWZgs6hpgSJWjxEsEV02aC3dMunuoPEDvPQlrydvlKPAnYnTArDHS6vtW
 RjXFLmP9PfOSMjz5Sjg5/byEfsMCIulmTsGDZH6h+wc8VGP7IKhOdd9ANL4zPCkW
 WwF5NeW44ooBgODVYCi9I0kM30u2tJqRLPdJfcFqvL/fAdvmdJsTpKGI3GrdXtUi
 JqYX861ntTTXN4JlUJE5BRcGDoXXNAFNb/wfwxGNXMAzzs7bV5OxbxG7wmg6rwSa
 VqH2frDHdWH2FDLCUW0Tbaihmv0c30utbIMkHZOuO2BkFoIHjKVz+ISEFgALUCCF
 lCIJ4skoKy9dEsrBHDXYHiIA8dUy+zfBp3GQTI4OX3mO7kjUEQeGUrO1LtNeIUK4
 lt7Trf7h4TGw8obyR1PepzyaRO8XUSZEHSkunVh6TWtUSJawwMqFL1EH2b1nIcBd
 9Kg2DN82vjbeF4vh
 =WKon
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdtsACgkQYKtH/8kJ
 Uidw4BAAs/KrAQ/Pj3r80xyEQ+pL/Bz0X1g7uCmA/OtuHTvRBw8YirktJ3jaPe4i
 ex9XbEagPfR9fsjUBPLhrUubLECKDqpdokDvhgLTeXqTvAFWqt7BUfC3E2ompRHH
 E7mQFkg0vM68Al6JDsOVc2PtmGBvMMK9NK1855ggjJ3qbqD+C65xUd4JoHhgi0x6
 jpI31RWlyDFf0XBO7ucha9h2tbzWgv7sA04YlXhLcbCvovLXsPI9lP5UoN5U/AFw
 Z+bNBwNCcNlhLpYf5iXb2GN1RfTPmHDb+KvBjKAbFbUf2KcBEOCM0Jmr1a4mAR4U
 oesoEOJ6EQ89rBEJaH3s254FAF1CfcehpVbKU1Qu6xp9XDmdCI6oncBLZZRRqPjd
 cc6TjNPA6emFz13QLLQ8h1VrtkjE9iHWmtoTb3qJD7Bt+eXNqdlSYeH9fztq5aik
 /wjNdOzjvChmVWQizBL7u4riNTzYxLg1QqZ29RYdFMkqX75HqcvakbB+54koD2sO
 bpSN0eiReUxHAYKqPzs7e6rI+CSi/j0LppIMOAkwKckwWRPuajztwUCSZh2DQFvU
 73GLZwoxiCLLMliCcGV7rAGO+06YpxglXo7NOEaJoNj6f9mAhpufUTnmQZZgNJZD
 rzLyqzed3qlbp5HzvRy+pKYz5yUo1eACxrXCsK1o+u++o4UyXWw=
 =leqb
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 updates for v6.8

Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.

On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.

CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.

Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.

MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.

Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.

Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.

UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.

On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.

On SA8775P tsens and thermal is added, as well as the random number
generator.

Sound and RTC support is added for the Acer Aspire 1.

On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.

A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.

On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.

The display subsystem in SDM670 is described.

On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.

On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.

The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.

On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.

GPU and random number generator support are added to SM8450, and enabled
on the HDK board.

On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.

Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.

* tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits)
  arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
  arm64: dts: qcom: sc8180x: Describe the GIC redistributor
  arm64: dts: qcom: sc8180x: Add interconnects to UFS
  arm64: dts: qcom: sc8180x: Add missing MDP clocks
  arm64: dts: qcom: sc8180x: Add UFS GDSC
  arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
  arm64: dts: qcom: sc7280: Rename reserved-memory nodes
  arm64: dts: qcom: sc7280: Remove unused second MPSS reg
  arm64: dts: qcom: sdm670: add display subsystem
  arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode
  arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host
  arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY
  arm64: dts: qcom: sm8150: add DisplayPort controller
  arm64: dts: qcom: sm8150-hdk: fix SS USB regulators
  arm64: dts: qcom: sm8150-hdk: enable HDMI output
  arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX
  arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes
  arm64: dts: qcom: sm8550-qrd: add PM8010 regulators
  arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators
  arm64: dts: qcom: qcm2290: Hook up MPM
  ...

Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:45:31 +00:00
Arnd Bergmann
feb69ea40a Reset controller updates for v6.8
Make use of devm_platform_get_and_ioremap_resource() and
 device_get_match_data() in several drivers, support the Amlogic C3 reset
 controller, and improve various device tree binding documents.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCZXnObhcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwK/cAQDfkw0rO9u3T5gdsbbEWBFaHoMc
 /R7fBR1e9u+zqdW2SgD/X9Jszc2zOVzZuuG7uyidscCz9+UkM4HAMqlOip8j/gM=
 =3iPp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdLAACgkQYKtH/8kJ
 UifxBxAAiJ8JgLPKhGSWVAPQCkGzfJl9ONDjGWxH4j3U0vdnlfBkjzlVFy9yQoK5
 QG+IzLNoaLlLh17x6Sy12fFDaQErFHeWL3a9sTBlCT2csrBMrle10XRCbVFBYn+j
 0RfgcIBbj3BBJlNXlvAk1mpdwuRTkRbQJPDeBNiCoJArFYb1GV4Kqxy840+jfICZ
 FpEDttL+7OSLKItDgVwImGqCBdfsPOzL+GY4Rvj7lE9FMsfrYbUxA+61kSBSPwbO
 JIsQ52LFpO8KvheeXEt71oS57jO0lAKGx0nM1mqe7gxED69bff1G8QjRojzYIDul
 mC0DQtG0cFjsGO4GuTHUQd1/5H1uCjjJKDwynDpXLG8rl+3GFCpwYxSYbKF+RCqJ
 R2SSVP0pCkiW9F8svDyK5h1NgoUZdoXptUYxzufJpnc+wwYuAPVV+zMhOnUlsSjg
 XOCQu29ql7N2SugIhLsNzcgOHCsxCOvki0yOt96kYKwtRGBv+1UX5oJzdE/XpjZn
 ATs08gcpK45rJfcFOYZ1kjmS0nSi95hsY+IvUNfSPs5ttBhbid8EEdZc73U1db/Y
 tlkqO4OKqqAcmpk0CJg3mwU1jX04/OAlNv9ifxzfUUR4tiONspk5rfp+klf5YbiR
 Qs1GGNt5N8hlBuiU3SqClayl3Lr3NKRqLiDeREdiDBaRzvJxqLw=
 =hbni
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux into soc/drivers

Reset controller updates for v6.8

Make use of devm_platform_get_and_ioremap_resource() and
device_get_match_data() in several drivers, support the Amlogic C3 reset
controller, and improve various device tree binding documents.

* tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux:
  dt-bindings: reset: hisilicon,hi3660-reset: Drop providers and consumers from example
  dt-bindings: reset: imx-src: Simplify compatible schema and drop unneeded quotes
  dt-bindings: reset: qcom: drop unneeded quotes
  dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/Five SoC
  reset: Use device_get_match_data()
  reset: reset-meson: add support for Amlogic C3 SoC Reset Controller
  dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
  reset: uniphier-glue: Use devm_platform_get_and_ioremap_resource()
  reset: sunplus: Use devm_platform_get_and_ioremap_resource()
  reset: simple: Convert to devm_platform_get_and_ioremap_resource()
  reset: qcom: Convert to devm_platform_ioremap_resource()
  reset: qcom-aoss: Convert to devm_platform_ioremap_resource()
  reset: meson-audio-arb: Convert to devm_platform_ioremap_resource()
  reset: brcmstb: Use devm_platform_get_and_ioremap_resource()

Link: https://lore.kernel.org/r/20231213153313.278867-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:36:16 +00:00
Arnd Bergmann
ec5b7be617 Samsung SoC driver changes for v6.8
1. Add support for Google GS101 SoC to different drivers: clock
    controller, serial and watchdog.
 
    The clock driver changes depend on few bindings headers, which I put
    in a topic branch with the bindings refactoring and GS101 support,
    therefore this this pull request includes that bindings topic branch.
 
    The rest of the bindings topic branch is not necessary here, however
    keeping everything together makes it easier to share between
    branches.  The bindings topic branch is mostly refactoring all the
    compatibles to add SoC-specific compatible followed by fallback.
 
 2. Exynos ChipID: recognize ExynosAutov920.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmWCp0MQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD13d5D/9jRfyTX36FvmGsRaHZieXFT2TzhLKtnpsP
 7xdP34HLWjY5ig4Gd4gWwaS3skLxlMa1Ilc8177vHaDSbWGnqFmWJgO600Yr66BR
 zBc0RKiujMTpBIEseOAltzAkKfp2TJ4LGFEokqB/LAU1SqE7tiPR9PzeKMi0yqLg
 7bio5yRSSp0PpoX60vYHR5whcJV6uJUMC8IGdT9arslW/9UNndi+KtFcbdxqiuWS
 VOXHHpPjcedY1TliaeHxKVUhQe+J1Vsfr5QCYYgkJY5KuH4cGx9DVPdAJ6zSn6Ti
 qBMu4x6xKI+317i2bY6vFy2+kzAQCsYG0L3RV94zrWlkuDx04CHbsHKkchhQbfOV
 23Kge0qcIgO09r+EEj2MyUtXfYAJl4RDVGMOALdGAn2Kd4iSprfAJ9icxcmrOufe
 0x4RWjoo9xlLG5cszgSbqOE55o8GfDS6XZOI0X+aBURpj9wg8EEJpUiSVz9JBR4M
 smsBU/nLGenhuPx62L30YZZRc081Ut59Gpd3u4/VQjHgsvVowsgEai7D/a4cNBr5
 aYpKBQE4qJyqFLOCvIVnhIaEKOvDAMqLi3+nh9b6Fn5cIkZxAIgObaXy8fmcmYJu
 VmVNGwLyYoDVEBvPIBLL4asRC6l7xmqiO8uDhvF+wFVKtJyGv0eD7fAgEvIh/M6x
 UokSkwMH+A==
 =65h3
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFcLgACgkQYKtH/8kJ
 Uid6RQ/6A+RY+lxqaPAs8g4q/yDWvJpuAgeGEFhO9ZYtCZx1NCPKuQQ77KHmZP0Q
 +p95CNmuyPYWEPdr0c+qS6Mvd6UlotarXl0T+TyH7DjQwnNf42sjHvB0bS3/llck
 SZn0azWo1ms2G1SdvGY9A/l8Efj5NzdYLx8IomlDtorxaAibXZk62i0+RxJVpni5
 0e6C4f/tUee8INk6teNg74aUmZNesHthj8lmuVO8pJoExwBG4HLxBaDi/gDFqhn1
 qnILr3a3J2I7y2xYD9TllbfYaZl4bufmiWyQpD2Mis92us6BiSGjJ2HuBfQf10IC
 0ywd1mjPxQxYBN3Lvpg2htW5+6U31V7cLXneLeH75uE+G4uQkd5asegKPIx1E15m
 eHn0psifzNejRy0e9E/136Gh4PY0xBXD5YpS0xdVq+8Dd9gjiawq0Sg4/C3TOqV6
 Fc2eArnesXqWs8AqWaY948MZyqnEAR2FFJtpAaRBs3vw8zkW8NnlXesBoC7f0sO3
 maLNA7druharcCSF1PPOPOMMgqtXNxXuczgD5NqLr2BB/Jp+Y63y/Yh6iaeBmDWQ
 ocs9PDFvITknXDYYDHzBYjUd3q7kR35XHNHMNb0U1/de9q9mNR5AuPmLj9xEjqpC
 VGtBl+aZ37PCV1TTF+GhqPs0b461mTMRgP6ypDbG3SxOnokio5w=
 =UEZb
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC driver changes for v6.8

1. Add support for Google GS101 SoC to different drivers: clock
   controller, serial and watchdog.

   The clock driver changes depend on few bindings headers, which I put
   in a topic branch with the bindings refactoring and GS101 support,
   therefore this this pull request includes that bindings topic branch.

   The rest of the bindings topic branch is not necessary here, however
   keeping everything together makes it easier to share between
   branches.  The bindings topic branch is mostly refactoring all the
   compatibles to add SoC-specific compatible followed by fallback.

2. Exynos ChipID: recognize ExynosAutov920.

* tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits)
  dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
  watchdog: s3c2410_wdt: Add support for Google gs101 SoC
  watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro
  watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit
  tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data
  clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support
  clk: samsung: clk-pll: Add support for pll_{0516,0517,518}
  dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
  dt-bindings: soc: samsung: usi: add google,gs101-usi compatible
  dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property
  dt-bindings: serial: samsung: Add google-gs101-uart compatible
  dt-bindings: watchdog: Document Google gs101 watchdog bindings
  dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum
  dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101
  dt-bindings: clock: Add Google gs101 clock management unit bindings
  dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible
  dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD
  dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD
  dt-bindings: serial: samsung: add specific compatible for Tesla FSD
  dt-bindings: pwm: samsung: add specific compatible for Tesla FSD
  ...

Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:19:20 +00:00
Frank Li
1e9b052582 dt-bindings: dma: fsl-edma: Add fsl-edma.h to prevent hardcoding in dts
Introduce a common dt-bindings header file, fsl-edma.h, shared between
the driver and dts files. This addition aims to eliminate hardcoded values
in dts files, promoting maintainability and consistency.

DTS header file not support BIT() macro yet. Directly use 2^n number.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231114154824.3617255-3-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-21 21:41:06 +05:30
Arnd Bergmann
76955bc85b MediaTek ARM64 DeviceTree updates for v6.8
This adds devicetree bindings and nodes for:
  - Media Data Path 3 (MDP3) bindings and enablement on MT8195
  - Smart Voltage Scaling (SVS) on MT8195
  - LVTS SoC thermal on MT8192
  - MT8188 SoC along with its resets, display bindings, and more
  - MT8183 hardware video decoder (mtk-vcodec-dec)
 
 Adds the following new machines:
  - MT8188 Evaluation Board (EVB)
  - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6
 
 Performs cleanups for various MediaTek SoCs and PMICs, and also
 includes some spare fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZXhCnigcYW5nZWxvZ2lv
 YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4z/MA+QEF
 perQb8WaodkzI8h7ENStPr/OSMAOp9VFSebIK5XfAP409tC9+Pue2BroIW+CN6ok
 556iGXdWS+1U5NtpA0q2CQ==
 =x4gT
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEXZEACgkQYKtH/8kJ
 UidbJA/7BHLNX6We69IW+PVoEG29Ex3zMFXNDPxa3DUquoPmm0jy/FnMb6l31CDB
 l4qLXp/4hsnvt/4TZjMhbblmmK+JG1iEj9wVNQANLynrErQLJZhqBeyYHr9DShM6
 A4JJu/EeXXvcIXBmAHr/rLFKNe0xVix53aMm1lAzPUs6MaoVSrLhvmFckDiVQuZg
 sFVfPgvzZC4qzRJFqHoQWi7gNJtgM8/YxyCWHizhv4jms50pfuNWFiSDnc8fES5M
 30gg7mmyJ/Hp+05BvT7ZRLhGAcQTIK5FJJLupzSzsShIiNTxDtku/S5JFd34Hv3a
 kstj3//pCI62gO8L4foJWS+5olR1THnb2unWd85hI24Uowg8QXwKdA53533ISj5A
 wdBufRu4RFVwu74u0h9tU6WmhYnEDehgmjw7cYqmYtPoTe3asReNx2UC8H5ggs/p
 cv82FVHKXscSaAW/LUqunW/YLe+1MLSsgV5aFYi0bQ4tICOeBEQzG8fBq1a9HAet
 xZMsNRmguQ8899l4VcnIk3Bur+zYqAYItClK4P+I7sqNoIPwJxRbpCKvx+AxnxRw
 P9JcsKnCcYvnoeJ4jvpntEySvdsl3hs1nMZIs/wkmV4/tX4gFET7bItm+P9ey6sG
 Q6wm3582y34mVodloNRLwlc6UfcJ6K7OeMOLXLQCQAGnIp0EzSM=
 =UohC
 -----END PGP SIGNATURE-----

Merge tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek ARM64 DeviceTree updates for v6.8

This adds devicetree bindings and nodes for:
 - Media Data Path 3 (MDP3) bindings and enablement on MT8195
 - Smart Voltage Scaling (SVS) on MT8195
 - LVTS SoC thermal on MT8192
 - MT8188 SoC along with its resets, display bindings, and more
 - MT8183 hardware video decoder (mtk-vcodec-dec)

Adds the following new machines:
 - MT8188 Evaluation Board (EVB)
 - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6

Performs cleanups for various MediaTek SoCs and PMICs, and also
includes some spare fixes.

* tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (60 commits)
  arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling node
  arm64: dts: mediatek: mt8195: Add SVS node and reduce LVTS_AP iospace
  arm64: dts: mediatek: mt8183: Change iospaces for thermal and svs
  arm64: dts: mediatek: mt8186: fix address warning for ADSP mailboxes
  arm64: dts: mediatek: mt8186: Fix alias prefix for ovl_2l0
  arm64: dts: mt6358: Drop bogus "regulator-fixed" compatible properties
  arm64: dts: mt8183: kukui-jacuzzi: Drop bogus anx7625 panel_flag property
  arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile
  dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188
  dt-bindings: arm: mediatek: Add mt8188 pericfg compatible
  dt-bindings: arm: Add compatible for MediaTek MT8188
  arm64: dts: mediatek: mt8195: add DSI and MIPI DPHY nodes
  dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195
  arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulators
  dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yaml
  arm64: dts: mediatek: mt8195: add MDP3 nodes
  arm64: dts: mediatek: mt8195: revise VDOSYS RDMA node name
  arm64: dts: mediatek: mt8183: correct MDP3 DMA-related nodes
  dt-bindings: display: mediatek: padding: add compatible for MT8195
  dt-bindings: display: mediatek: split: add compatible for MT8195
  ...

Link: https://lore.kernel.org/r/20231212114515.121695-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-21 15:45:21 +00:00
Tudor Ambarus
35f32e39b4 dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
The gs101 clock defines from the bindings header are derived from the
clock register names found in the datasheet under some certain rules.

The CMU TOP gate clock defines missed to include the required "CMU"
differentiator which will cause collisions with the gate clock defines
of other clock units. Rename the TOP gate clock defines to include "CMU".

Update the clock driver to use the new defines in order to not break
compilation and bisect-ability. There are no device trees that use the
previous defines.

Fixes: 0a910f1606 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20231218064333.479885-1-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-18 09:59:20 +01:00
Gabriel Fernandez
b5be49db3d dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
Adds clock and reset binding entries for STM32MP25 SoC family

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231208143700.354785-4-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:33:26 -08:00
Bjorn Andersson
ea0b1a4c5a Merge branch 'icc-sm6115' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD
Merge the SM6115 interconnect binding to allow referecing the
interconnect header files and the ports defined in these.
2023-12-16 23:18:16 -06:00
Bjorn Andersson
d00e87f0e2 Merge branch '20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com' into clk-for-6.8
Merge SM8150 Video clock controller through a topic branch, to allow
constants to be made available in the DeviceTree branch as well.
2023-12-15 22:59:48 -06:00
Satya Priya Kakitapalli
3185f96968 dt-bindings: clock: Update the videocc resets for sm8150
Add all the available resets for the video clock controller
on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15 22:59:38 -06:00
Andy Yan
dc7226acac dt-bindings: rockchip,vop2: Add more endpoint definition
There are 2 HDMI, 2 DP, 2 eDP on rk3588, so add
corresponding endpoint definition for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115907.1785377-1-andyshrk@163.com
2023-12-13 15:37:27 +01:00
Peter Griffin
5b02a863ba dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
166 was skipped by mistake and two clocks:
* CLK_MOUT_CMU_HSI0_USBDPDGB
* CLK_GOUT_HSI0_USBDPDGB

Have an incorrect DGB ending instead of DBG.

This is an ABI break, but as the patch was only applied yesterday this
header has never been in an actual release so it seems better to fix
this early than ignore it.

Fixes: 0a910f1606 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20231211162331.435900-7-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-12 20:22:43 +01:00
Hsiao Chien Sung
3526cfaed2
dt-bindings: reset: mt8188: Add VDOSYS reset control bits
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11 11:12:59 +01:00
Peter Griffin
0a910f1606 dt-bindings: clock: Add Google gs101 clock management unit bindings
Provide dt-schema documentation for Google gs101 SoC clock controller.
Currently this adds support for cmu_top, cmu_misc and cmu_apm.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-10 14:59:40 +01:00
Bjorn Andersson
779266b127 Merge branch 'icc-x1e80100' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the X1E80100 interconnect binding to get access to the
interconnect port constants.
2023-12-07 20:24:09 -08:00
Bjorn Andersson
d64254b46a Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into arm64-for-6.8
Merge the X1E80100 clock bindings to get access to the clock constants.
2023-12-07 20:22:50 -08:00
Bjorn Andersson
12c4ffcd3b Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into clk-for-6.8
Merge the X1E80100 DeviceTree bindings through a topic branch, to allow
the clock constants to be shared with the DeviceTree branch.
2023-12-07 20:19:15 -08:00
Rajendra Nayak
4dc7e7d2ee dt-bindings: clock: qcom: Add X1E80100 GCC clocks
Add device tree bindings for global clock controller on X1E80100 SoCs.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 20:18:21 -08:00
Bjorn Andersson
5ceab14eb6 Merge branch 'icc-sm8650' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the SM8650 interconnect binding, to gain access to the
interconnect port constants.
2023-12-07 19:18:08 -08:00
Bjorn Andersson
40d9c6ea64 Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into arm64-for-6.8
Merge the SM8650 clock bindings, to gain access to the clock constants.
2023-12-07 19:16:43 -08:00
Bjorn Andersson
cdf1c63d23 Merge branch '20231123064735.2979802-2-quic_imrashai@quicinc.com' into clk-for-6.8
Merge the ECPI clock controller through a topic branch to make it
possible to merge the clock constants into the DeviceTree branch as
well.
2023-12-07 08:46:01 -08:00
Imran Shaik
d4a599c59d dt-bindings: clock: qcom: Add ECPRICC clocks for QDU1000 and QRU1000
Add device tree bindings for qcom ecpri clock controller on QDU1000 and
QRU1000 SoCs.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123064735.2979802-2-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:45:51 -08:00
Nia Espera
7bf421f445 dt-bindings: iio: adc: qcom: Add Qualcomm smb139x
Bindings for a charger controller chip found on sm8350

Signed-off-by: Nia Espera <nespera@igalia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231111-nia-sm8350-for-upstream-v4-1-3a638b02eea5@igalia.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:27:28 -08:00
Bjorn Andersson
6514b6efdd Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into clk-for-6.8
Merge SM8650 GCC, TCSRCC, DISPCC, GPUCC and RPMHCC bindings through a
topic branch to make it possible to also merge and use the constants in
the DeviceTree branch.
2023-12-07 08:08:54 -08:00
Neil Armstrong
a0aa7fa5c3 dt-bindings: clock: qcom: document the SM8650 GPU Clock Controller
Add bindings documentation for the SM8650 Graphics Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
c1120359d4 dt-bindings: clock: qcom: document the SM8650 Display Clock Controller
Add bindings documentation for the SM8650 Display Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-3-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
b69d932154 dt-bindings: clock: qcom: document the SM8650 General Clock Controller
Add bindings documentation for the SM8650 General Clock Controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-2-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
1a3b3bd142 dt-bindings: clock: qcom: document the SM8650 TCSR Clock Controller
Add bindings documentation for the SM8650 TCSR Clock Controller.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-1-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:46 -08:00
Vincent Knecht
3f373de6da dt-bindings: clock: qcom,gcc-msm8939: Add CSI2 related clocks
When adding in the indexes for this clock-controller we missed
GCC_CAMSS_CSI2_AHB_CLK, GCC_CAMSS_CSI2_CLK, GCC_CAMSS_CSI2PHY_CLK,
GCC_CAMSS_CSI2PIX_CLK and GCC_CAMSS_CSI2RDI_CLK.

Add them in now.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231029061948.505883-1-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:04:40 -08:00
Bjorn Andersson
7a56e64a56 Merge branch '20231026105345.3376-3-bryan.odonoghue@linaro.org' into arm64-for-6.8
Merge the SC8280XP Camera Clock Controller binding updates from the
topic branch, to gain access to clock defines to be used in DeviceTree
source.
2023-12-07 08:01:58 -08:00
Bryan O'Donoghue
206cd759fb dt-bindings: clock: Add SC8280XP CAMCC
Add device tree bindings for the camera clock controller on
Qualcomm SC8280XP platform.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231026105345.3376-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:00:51 -08:00
Neil Armstrong
216382b155 dt-bindings: arm: qcom,ids: Add SoC ID for SM8650
Add the ID for the Qualcomm SM8650 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-socinfo-v2-1-4751e7391dc9@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 07:55:36 -08:00
Konrad Dybcio
658902913c dt-bindings: interconnect: Add Qualcomm SM6115 NoC
Add bindings for Qualcomm SM6115 Network-On-Chip interconnect.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-12-06 17:16:07 +02:00
Luca Weiss
18c74d56fe iio: adc: Add PM7325 PMIC7 ADC bindings
Add the defines for the ADC channels found on the PM7325. The list is
taken from downstream msm-5.4 and adjusted for mainline.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-1-f14df01922e6@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02 17:24:58 -08:00
Neil Armstrong
f32f977fa8 dt-bindings: power: meson-g12a-power: document ISP power domain
Add MIPI ISP power domain ID to the G12A Power domains bindings header

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231123-topic-amlogic-upstream-isp-pmdomain-v2-1-61f2fcf709e5@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-11-30 12:01:12 +01:00
Zelong Dong
0c0ea61c9b dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
Add new compatible and DT bindings for Amlogic C3 Reset Controller

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230914064018.18790-2-zelong.dong@amlogic.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28 17:21:59 +01:00
Neil Armstrong
439d3404ad dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
Add MIPI ISP & CSI PHY clock ids to G12A clock bindings header

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-1-223958791501@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-11-24 18:03:00 +01:00
Neil Armstrong
bd5ef3f21d dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids
Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks
on G12A compatible SoCs.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-1-95256ed139e6@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-11-24 17:07:40 +01:00
Rajendra Nayak
dc84a76f05 dt-bindings: interconnect: Add Qualcomm X1E80100 SoC
The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled
and tuned dynamically according to the bandwidth demand.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-11-24 00:24:07 +02:00
Neil Armstrong
80abebd9bf dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC
Document the RPMh Network-On-Chip Interconnect of the SM8650 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-11-24 00:14:52 +02:00
Linus Torvalds
12418ece0d linux-watchdog 6.7-rc1 tag
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.14 (GNU/Linux)
 
 iEYEABECAAYFAmVL2nUACgkQ+iyteGJfRspY0gCgu/eCCZ1E/CU/xLQ7YtLQ7i7L
 qtYAn07XudrdaCkbSwW6MiBsiCA33ae4
 =NU1w
 -----END PGP SIGNATURE-----

Merge tag 'linux-watchdog-6.7-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add support for Amlogic C3 and S4 SoCs

 - add IT8613 ID

 - add MSM8226 and MSM8974 compatibles

 - other small fixes and improvements

* tag 'linux-watchdog-6.7-rc1' of git://www.linux-watchdog.org/linux-watchdog: (24 commits)
  dt-bindings: watchdog: Add support for Amlogic C3 and S4 SoCs
  watchdog: mlx-wdt: Parameter desctiption warning fix
  watchdog: aspeed: Add support for aspeed,reset-mask DT property
  dt-bindings: watchdog: aspeed-wdt: Add aspeed,reset-mask property
  watchdog: apple: Deactivate on suspend
  dt-bindings: watchdog: qcom-wdt: Add MSM8226 and MSM8974 compatibles
  dt-bindings: watchdog: fsl-imx7ulp-wdt: Add 'fsl,ext-reset-output'
  wdog: imx7ulp: Enable wdog int_en bit for watchdog any reset
  drivers: watchdog: marvell_gti: Program the max_hw_heartbeat_ms
  drivers: watchdog: marvell_gti: fix zero pretimeout handling
  watchdog: marvell_gti: Replace of_platform.h with explicit includes
  watchdog: imx_sc_wdt: continue if the wdog already enabled
  watchdog: st_lpc: Use device_get_match_data()
  watchdog: wdat_wdt: Add timeout value as a param in ping method
  watchdog: gpio_wdt: Make use of device properties
  sbsa_gwdt: Calculate timeout with 64-bit math
  watchdog: ixp4xx: Make sure restart always works
  watchdog: it87_wdt: add IT8613 ID
  watchdog: marvell_gti_wdt: Fix error code in probe()
  Watchdog: marvell_gti_wdt: Remove redundant dev_err_probe() for platform_get_irq()
  ...
2023-11-09 13:54:25 -08:00
Linus Torvalds
90b0c2b2ed Pin control changes for the v6.7 kernel cycle
New drivers:
 
 - Realtek RTD family pin control driver and RTD1619B,
   RTD1319D and RTD1315E subdrivers.
 
 - Nuvoton NPCM8xx combined pin control and GPIO driver.
 
 - Amlogic T7 pin control driver.
 
 - Renesas RZ/G3S pin control driver.
 
 Improvements:
 
 - A number of additional UART groups added to the Mediatek
   MT7981 driver.
 
 - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125
   and SDM660.
 
 - Extra GPIO banks for the Sunxi H616.
 
 - MLSP I2C6 function support in Qualcomm MSM8226.
 
 - Some __counted_by() annotations for dynamic arrays.
 
 - Ongoing work to make remove() return void.
 
 - LSBC groups and functions in the Renesas R8A7778.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmVEp+oACgkQQRCzN7AZ
 XXPmqg/7BX2u2/1jpOpEjoqbUC7KEU3ptR2j1vAMCBibBq0IsnHVUH3DQ80leEpf
 gcf5vbY72PCTg5KGYZZ35XvrqzEP/z25qOnUZ+4Y7JljoXyNBb6eW1I3UstdPR1C
 E9hFVjMVFD7YePCGK/Ytwp/1dFLgLsADjk6Zc4gfHlPV/Op8NaxIIcM0FjFvu+X1
 znf3lRkaxedhdM0TsL6efOoNXJNHGZNXI+dUzgbEr+fyYcjHJFjh8HejJvcZDyvc
 581k6EVE0aGBz857OZz+ojADhtnE2+GYCB2kkdT5iHFeHtHGbRrwIc6Fh3gInMBI
 6yj86AaZEFJwLec/ckMn+kWdKwF17Q2qUOryr7UHlU8YP5DBAjSAZaocFynNto+I
 ikQPde2s04tRpveMCJSYnvy2eQpJ2DEpWtkSAGMzg0Ly71zfSH1TMrhjR9AxDP0F
 nrIBB7hEzTosxvrFTXHcCh8LxSDlohUL/UveA2Tiz/m1gvR51OnIx61EzqizHF5x
 WkuLxgLlC4P1ZqFyV1guwcOqUD4rpwpqTyIgAIoVIQfnvZR5jgFXHBKDJPXyjJTD
 oDEX8fVWX0xzwAoqBXqVs/TJcD9q8qKuuPaK8266XP5D/zM/PP1jRKQnC8IFPSq2
 Ory4TDLCrSmVw+c8q+jZHgKiEXuwGzPJ+ImypTMV+uZZzCdR4YE=
 =vonG
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No pin control core changes this time.

  New drivers:

   - Realtek RTD family pin control driver and RTD1619B, RTD1319D and
     RTD1315E subdrivers

   - Nuvoton NPCM8xx combined pin control and GPIO driver

   - Amlogic T7 pin control driver

   - Renesas RZ/G3S pin control driver

  Improvements:

   - A number of additional UART groups added to the Mediatek MT7981
     driver

   - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660

   - Extra GPIO banks for the Sunxi H616

   - MLSP I2C6 function support in Qualcomm MSM8226

   - Some __counted_by() annotations for dynamic arrays

   - Ongoing work to make remove() return void

   - LSBC groups and functions in the Renesas R8A7778"

* tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
  pinctrl: Use device_get_match_data()
  dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
  dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes
  dt-bindings: pinctrl: brcm: Ensure all child node properties are documented
  pinctrl: renesas: rzn1: Convert to platform remove callback returning void
  pinctrl: renesas: rzg2l: Add RZ/G3S support
  dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
  pinctrl: renesas: rzg2l: Add support for different DS values on different groups
  pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
  pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
  pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
  pinctrl: renesas: rzg2l: Index all registers based on port offset
  pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
  pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
  pinctrl: intel: fetch community only when we need it
  pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
  pinctrl: cherryview: Convert to platform remove callback returning void
  pinctrl: sprd-sc9860: Convert to platform remove callback returning void
  pinctrl: qcom/msm: Convert to platform remove callback returning void
  pinctrl: qcom/lpi: Convert to platform remove callback returning void
  ...
2023-11-03 19:15:19 -10:00
Linus Torvalds
d99b91a99b Char/Misc and other driver changes for 6.7-rc1
Here is the big set of char/misc and other small driver subsystem
 changes for 6.7-rc1.  Included in here are:
   - IIO subsystem driver updates and additions (largest part of this
     pull request)
   - FPGA subsystem driver updates
   - Counter subsystem driver updates
   - ICC subsystem driver updates
   - extcon subsystem driver updates
   - mei driver updates and additions
   - nvmem subsystem driver updates and additions
   - comedi subsystem dependency fixes
   - parport driver fixups
   - cdx subsystem driver and core updates
   - splice support for /dev/zero and /dev/full
   - other smaller driver cleanups
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZUTSzg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylH3QCfbZuG8MiglEZUd4slRLUNqcRQ5tQAn1yKpDFo
 l3KLkxo1UTLMXbJBWe+b
 =gafK
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  changes for 6.7-rc1. Included in here are:

   - IIO subsystem driver updates and additions (largest part of this
     pull request)

   - FPGA subsystem driver updates

   - Counter subsystem driver updates

   - ICC subsystem driver updates

   - extcon subsystem driver updates

   - mei driver updates and additions

   - nvmem subsystem driver updates and additions

   - comedi subsystem dependency fixes

   - parport driver fixups

   - cdx subsystem driver and core updates

   - splice support for /dev/zero and /dev/full

   - other smaller driver cleanups

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (326 commits)
  cdx: add sysfs for subsystem, class and revision
  cdx: add sysfs for bus reset
  cdx: add support for bus enable and disable
  cdx: Register cdx bus as a device on cdx subsystem
  cdx: Create symbol namespaces for cdx subsystem
  cdx: Introduce lock to protect controller ops
  cdx: Remove cdx controller list from cdx bus system
  dts: ti: k3-am625-beagleplay: Add beaglecc1352
  greybus: Add BeaglePlay Linux Driver
  dt-bindings: net: Add ti,cc1352p7
  dt-bindings: eeprom: at24: allow NVMEM cells based on old syntax
  dt-bindings: nvmem: SID: allow NVMEM cells based on old syntax
  Revert "nvmem: add new config option"
  MAINTAINERS: coresight: Add missing Coresight files
  misc: pci_endpoint_test: Add deviceID for J721S2 PCIe EP device support
  firmware: xilinx: Move EXPORT_SYMBOL_GPL next to zynqmp_pm_feature definition
  uacce: make uacce_class constant
  ocxl: make ocxl_class constant
  cxl: make cxl_class constant
  misc: phantom: make phantom_class constant
  ...
2023-11-03 14:51:08 -10:00
Linus Torvalds
385903a7ec SoC driver updates for 6.7
The highlights for the driver support this time are
 
  - Qualcomm platforms gain support for the Qualcomm Secure Execution
    Environment firmware interface to access EFI variables on certain
    devices, and new features for multiple platform and firmware drivers.
 
  - Arm FF-A firmware support gains support for v1.1 specification features,
    in particular notification and memory transaction descriptor changes.
 
  - SCMI firmware support now support v3.2 features for clock and DVFS
    configuration and a new transport for Qualcomm platforms.
 
  - Minor cleanups and bugfixes are added to pretty much all the active
    platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic,
    atmel, tegra, aspeed, vexpress, mediatek, samsung and more.
    In particular, this contains portions of the treewide conversion to
    use __counted_by annotations and the device_get_match_data helper.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmVC10IACgkQYKtH/8kJ
 UifFoQ//Tw7aux88EA2UkyL2Wulv80NwRQn3tQlxI/6ltjBX64yeQ6Y8OzmYdSYK
 20NEpbU7VWOFftN+D6Jp1HLrvfi0OV9uJn3WiTX3ChgDXixpOXo4TYgNNTlb9uZ4
 MrSTG3NkS27m/oTaCmYprOObgSNLq1FRCGIP7w4U9gyMk9N9FSKMpSJjlH06qPz6
 WBLTaIwPgBsyrLfCdxfA1y7AFCAHVxQJO4bp0VWSIalTrneGTeQrd2FgYMUesQ2e
 fIUNCaU4mpmj8XnQ/W19Wsek8FRB+fOh0hn/Gl+iHYibpxusIsn7bkdZ5BOJn2J0
 OY3C1biopaaxXcZ+wmnX9X0ieZ3TDsHzYOEf0zmNGzMZaZkV8kQt4/Ykv77xz6Gc
 4Bl6JI5QZ4rTZvlHYGMYxhy3hKuB31mO2rHbei7eR7J7UmjzWcl5P6HYfCgj7wzH
 crIWj1IR1Nx6Dt/wXf3HlRcEiAEJ2D0M3KIFjAVT239TsxacBfDrRk+YedF2bKbn
 WMYfVM6jJnPOykGg/gMRlttS/o/7TqHBl3y/900Idiijcm3cRPbQ+uKfkpHXftN/
 2vOtsw7pzEg7QQI9GVrb4drTrLvYJ7GQOi4o0twXTCshlXUk2V684jvHt0emFkdX
 ew9Zft4YLAYSmuJ3XqGhhMP63FsHKMlB1aSTKKPeswdIJmrdO80=
 =QIut
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "The highlights for the driver support this time are

   - Qualcomm platforms gain support for the Qualcomm Secure Execution
     Environment firmware interface to access EFI variables on certain
     devices, and new features for multiple platform and firmware
     drivers.

   - Arm FF-A firmware support gains support for v1.1 specification
     features, in particular notification and memory transaction
     descriptor changes.

   - SCMI firmware support now support v3.2 features for clock and DVFS
     configuration and a new transport for Qualcomm platforms.

   - Minor cleanups and bugfixes are added to pretty much all the active
     platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive,
     amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and
     more.

     In particular, this contains portions of the treewide conversion to
     use __counted_by annotations and the device_get_match_data helper"

* tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (156 commits)
  soc: qcom: pmic_glink_altmode: Print return value on error
  firmware: qcom: scm: remove unneeded 'extern' specifiers
  firmware: qcom: scm: add a missing forward declaration for struct device
  firmware: qcom: move Qualcomm code into its own directory
  soc: samsung: exynos-chipid: Convert to platform remove callback returning void
  soc: qcom: apr: Add __counted_by for struct apr_rx_buf and use struct_size()
  soc: qcom: pmic_glink: fix connector type to be DisplayPort
  soc: ti: k3-socinfo: Avoid overriding return value
  soc: ti: k3-socinfo: Fix typo in bitfield documentation
  soc: ti: knav_qmss_queue: Use device_get_match_data()
  firmware: ti_sci: Use device_get_match_data()
  firmware: qcom: qseecom: add missing include guards
  soc/pxa: ssp: Convert to platform remove callback returning void
  soc/mediatek: mtk-mmsys: Convert to platform remove callback returning void
  soc/mediatek: mtk-devapc: Convert to platform remove callback returning void
  soc/loongson: loongson2_guts: Convert to platform remove callback returning void
  soc/litex: litex_soc_ctrl: Convert to platform remove callback returning void
  soc/ixp4xx: ixp4xx-qmgr: Convert to platform remove callback returning void
  soc/ixp4xx: ixp4xx-npe: Convert to platform remove callback returning void
  soc/hisilicon: kunpeng_hccs: Convert to platform remove callback returning void
  ...
2023-11-01 14:46:51 -10:00
Linus Torvalds
3c86a44d62 - Move Kconfig files into the pmdomain subsystem
- Drop use of genpd's redundant ->opp_to_performance_state() callback
  - amlogic: Add support for the T7 power-domains controller
  - amlogic: Fix mask for the second NNA mem power-domain
  - bcm: Fixup ASB register read and comparison for bcm2835-power
  - imx: Fix device link problem for consumers of the pgc power-domain
  - mediatek: Add support for the MT8365 power domains
  - qcom: Add support for the rpmhpds for SC8380XP power-domains
  - qcom: Add support for the rpmhpds for SM8650 power-domains
  - qcom: Add support for the rpmhpd clocks for SM7150
  - qcom: Add support for the rpmpds for MSM8917 (families) power-domains
  - starfive: Add support for the JH7110 AON PMU
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmVCM6UXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmLYhAAv5zXrU2OhZUtuTO397RrC6Lo
 I04YKzbmwA6tzvb8BQ9VPkmLf5NCJd/uzHysneohwXYKTOuGNCH/Vbwx7xoMhWul
 BFqZGc3QCyBhiWmyZJPNMTlc76VgRoxh37c8CBSTMgM448cH/2Hk6yZRNM6ie04T
 ewVXyYagUzQQIcIszQWGwCtNwTO9C5YXIh5YiF1z9AzPRzJSmM79sAJZ744N7DcW
 fWohw+MM/WsM4WBAjKUx3DAQkbIEQrsmvcpbQ1LJimxrYf87nJryYloSeiq1IAZ5
 VE6Ggb+G9J770HJSMbJ4ftQrxHjanbY+SVMeF5fmLZt7HwHCQEicKmn1QRl2qN8p
 BH1F5ysvV5pEiBj5YkMLIgwj7tT1CxBxiuf/sgo06wssw4wsxxbLj5KqYrhBFn2l
 Q6OY7DMxKvrlBkZhQKJ9uDwvQA2zHYiPkitlcwIAUKVms2dL3x0DsvVsAyWi/4eD
 L29LYQGojx/0qKfODboAkrTdCK6kOU8pBBGi8FMdlmDnvjT00gd8WwRuthIkN8gx
 OI1UpmkE5IfKc47cZcBknWfY+QkySoGhuW2Xsb6poHxvVrDaNyWUX1NTRQeaG0lV
 pB9jFtWZL+WMfLfzo3cSnWSqFhwlr0tV0rveO/kNadOOzheDw607hsZrcQg5cyOo
 tuusQtCanukNkhvKNAY=
 =+iJn
 -----END PGP SIGNATURE-----

Merge tag 'pmdomain-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:

 - Move Kconfig files into the pmdomain subsystem

 - Drop use of genpd's redundant ->opp_to_performance_state() callback

 - amlogic:
    - Add support for the T7 power-domains controller
    - Fix mask for the second NNA mem power-domain

 - bcm: Fixup ASB register read and comparison for bcm2835-power

 - imx: Fix device link problem for consumers of the pgc power-domain

 - mediatek: Add support for the MT8365 power domains

 - qcom:
    - Add support for the rpmhpds for SC8380XP power-domains
    - Add support for the rpmhpds for SM8650 power-domains
    - Add support for the rpmhpd clocks for SM7150
    - Add support for the rpmpds for MSM8917 (families) power-domains

 - starfive: Add support for the JH7110 AON PMU

* tag 'pmdomain-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (56 commits)
  pmdomain: amlogic: Fix mask for the second NNA mem PD domain
  pmdomain: qcom: rpmhpd: Add SC8380XP power domains
  pmdomain: qcom: rpmhpd: Add SM8650 RPMh Power Domains
  dt-bindings: power: rpmpd: Add SC8380XP support
  dt-bindings: power: qcom,rpmhpd: Add GMXC PD index
  dt-bindings: power: qcom,rpmpd: document the SM8650 RPMh Power Domains
  pmdomain: imx: Make imx pgc power domain also set the fwnode
  pmdomain: qcom: rpmpd: Add QM215 power domains
  pmdomain: qcom: rpmpd: Add MSM8917 power domains
  dt-bindings: power: rpmpd: Add MSM8917, MSM8937 and QM215
  pmdomain: bcm: bcm2835-power: check if the ASB register is equal to enable
  pmdomain: qcom: rpmhpd: Drop the ->opp_to_performance_state() callback
  pmdomain: qcom: rpmpd: Drop the ->opp_to_performance_state() callback
  pmdomain: qcom: cpr: Drop the ->opp_to_performance_state() callback
  pmdomain: Use device_get_match_data()
  pmdomain: ti: add missing of_node_put
  pmdomain: mediatek: Add support for MT8365
  pmdomain: mediatek: Add support for MTK_SCPD_STRICT_BUS_PROTECTION cap
  pmdomain: mediatek: Add support for WAY_EN operations
  pmdomain: mediatek: Unify configuration for infracfg and smi
  ...
2023-11-01 13:09:46 -10:00
Linus Torvalds
fe4ae2fab0 Herein lies a smallish collection of clk driver updates and some core
clk framework changes for the merge window. The core framework changes
 are only improving the debugfs interface to allow phase adjustments and
 report which consumers of a clk there are. These are most likely only of
 interest to kernel developers.
 
 On the clk driver side, it's a ghastly amount of updates with only a
 handful of new clk drivers. We have a couple new clk drivers for
 Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
 respectively. The updates are spread throughout the clk drivers. Some
 highlights are fixing kunit tests for different configurations like
 lockdep and big-endian, avoiding integer overflow in rate settable clks,
 moving clk_hw_onecell_data to the end of allocations so that drivers
 don't corrupt their private data, and migrating clk drivers to the
 regmap maple tree. Otherwise it's the usual fixes to clk drivers that
 only come along with testing the drivers on real hardware.
 
 New Drivers:
  - Add clock driver for TWL6032
  - Initial support for the Qualcomm SM4450 Global Clock Controller and
    SM4450 RPMh clock controllers
  - Add Camera Clock Controller on Qualcomm SM8550
  - Add support for the Renesas RZ/G3S (R9A08G045) SoC
  - Add Amlogic s4 main clock controller support
 
 Updates:
  - Make clk kunit tests work with lockdep
  - Fix clk gate kunit test for big-endian
  - Convert more than a handful of clk drivers to use regmap maple tree
  - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
    implementation
  - Add consumer info to clk debugfs
  - Fix various clk drivers that have clk_hw_onecell_data not at the end
    of an allocation
  - Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
    variety of Qualcomm IPQ platforms
  - Add missing parent of APCS PLL on Qualcomm IPQ6018
  - Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
    problems with RPM
  - Implement safe source switching for a53pll and use on Qualcomm
    IPQ5332
  - Add support for Stromer Plus PLLs to Qualcomm clk driver
  - Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE PLL
    configure method
  - Non critical fixes to halt bit checks in Qualcomm clk drivers
  - Add SMMU GDSC for Qualcomm MSM8998
  - Fix possible integer overflow in Qualcomm RCG frequency calculation
    code
  - Remove RPM managed clks from Qualcomm MSM8996 GCC driver
  - Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
  - Switch Qualcomm MSM8996 CBF clock driver's remove function to return
    void
  - Fix missing dependency for s4 clock controllers
  - Select MXC_CLK when building in the CLK_IMX8QXP
  - Fixes for error handling paths in i.MX8 ACM driver
  - Move the clocks check in i.MX8 ACM driver in order to log any error
  - Drop the unused return value of clk_imx_acm_detach_pm_domains
  - Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
  - Fix error handling in i.MX8MQ clock driver
  - Allow a different LCDIF1 clock parent if DT describes it for i.MX6SX
  - Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
  - Move the elcdif PLL clock registration above lcd_clk, as it is its
    parent
  - Correct some ENET specific clocks for i.MX8DXL platform
  - Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
    doesn't have them
  - Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
  - Skip registering clocks owned by Cortex-A partition SCU-based
    platforms
  - Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
    i.MX8QXP resources
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmVBac4RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUFvg//RG8n63D7wCnCX8AONmbvUzkuF5F3plX7
 1oNbHShAWV1ifu5OSaNW06MHw9UP0YD8HogfniWtVC+AmtC0WxS297+TeIlAwobV
 fs8XpHpTHiQlHbc4Me1p8Q2QkZRRLoZh1+QLK+J1tiVfh3IBOQ64CyQC/bC0S40B
 S470uPcB3duR1fv2IN4EgEojh9b1re2Z1KtqPYQQ+dmB9FifaCL0aF4QPGeG89IK
 LYub+OnPdtrOsSxuJSTyck+PLBM2Tr1ikgyEPyo5m/YoJIOI8V/IpB0aIgfbtJL/
 xAha95iY2kRLjS2hNWwXLDHXr3g7MG9cuIPUm7qApmrQutmlpf1nXg2GkCeHaLd+
 DYtk9qwGObmtBTLzNfezamjaFSQngB0xbhP3dqcvqwmZ7j2voFRKLRUKD5+xWnOl
 67yneGSsPRjDJNdgAtONfr/8KU6aRgHJxSILmj+VjfEbYY8BHq1hFgSnHB54l/vq
 1RtJxep64vejbhteg2lZFCWLQLHiTETBy+pALhfLG1GKhI7J5A8/vHT/oKXUFZm2
 5eUanyMpZJPRzGUZEb1uCarMDjBun/8qPq2tAO9q20di/OEDWWB6egdTzPOkU+Tm
 Uz3Z8FxCmqDYsSIaNd6Akahxae0pBMbygxlYdA939zOGaKUGdcaX66395jKjFkJ1
 v4XYpsQNBhk=
 =ZxE7
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
 "Herein lies a smallish collection of clk driver updates and some core
  clk framework changes for the merge window. The core framework changes
  are only improving the debugfs interface to allow phase adjustments
  and report which consumers of a clk there are. These are most likely
  only of interest to kernel developers.

  On the clk driver side, it's a ghastly amount of updates with only a
  handful of new clk drivers. We have a couple new clk drivers for
  Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
  respectively. The updates are spread throughout the clk drivers.

  Some highlights are fixing kunit tests for different configurations
  like lockdep and big-endian, avoiding integer overflow in rate
  settable clks, moving clk_hw_onecell_data to the end of allocations so
  that drivers don't corrupt their private data, and migrating clk
  drivers to the regmap maple tree. Otherwise it's the usual fixes to
  clk drivers that only come along with testing the drivers on real
  hardware.

  New Drivers:
   - Add clock driver for TWL6032
   - Initial support for the Qualcomm SM4450 Global Clock Controller and
     SM4450 RPMh clock controllers
   - Add Camera Clock Controller on Qualcomm SM8550
   - Add support for the Renesas RZ/G3S (R9A08G045) SoC
   - Add Amlogic s4 main clock controller support

Updates:
   - Make clk kunit tests work with lockdep
   - Fix clk gate kunit test for big-endian
   - Convert more than a handful of clk drivers to use regmap maple tree
   - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
     implementation
   - Add consumer info to clk debugfs
   - Fix various clk drivers that have clk_hw_onecell_data not at the
     end of an allocation
   - Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
     variety of Qualcomm IPQ platforms
   - Add missing parent of APCS PLL on Qualcomm IPQ6018
   - Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
     problems with RPM
   - Implement safe source switching for a53pll and use on Qualcomm
     IPQ5332
   - Add support for Stromer Plus PLLs to Qualcomm clk driver
   - Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE
     PLL configure method
   - Non critical fixes to halt bit checks in Qualcomm clk drivers
   - Add SMMU GDSC for Qualcomm MSM8998
   - Fix possible integer overflow in Qualcomm RCG frequency calculation
     code
   - Remove RPM managed clks from Qualcomm MSM8996 GCC driver
   - Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
   - Switch Qualcomm MSM8996 CBF clock driver's remove function to
     return void
   - Fix missing dependency for s4 clock controllers
   - Select MXC_CLK when building in the CLK_IMX8QXP
   - Fixes for error handling paths in i.MX8 ACM driver
   - Move the clocks check in i.MX8 ACM driver in order to log any error
   - Drop the unused return value of clk_imx_acm_detach_pm_domains
   - Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
   - Fix error handling in i.MX8MQ clock driver
   - Allow a different LCDIF1 clock parent if DT describes it for
     i.MX6SX
   - Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
   - Move the elcdif PLL clock registration above lcd_clk, as it is its
     parent
   - Correct some ENET specific clocks for i.MX8DXL platform
   - Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
     doesn't have them
   - Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
   - Skip registering clocks owned by Cortex-A partition SCU-based
     platforms
   - Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
     i.MX8QXP resources"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
  clk: Fix clk gate kunit test on big-endian CPUs
  clk: si521xx: Increase stack based print buffer size in probe
  clk: mediatek: fix double free in mtk_clk_register_pllfh()
  clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data
  clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
  clk: sifive: Allow building the driver as a module
  clk: analogbits: Allow building the library as a module
  clk: sprd: Composite driver support offset config
  clk: Allow phase adjustment from debugfs
  clk: Show active consumers of clocks in debugfs
  clk: Use device_get_match_data()
  clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider
  clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider
  clk: cdce925: Extend match support for OF tables
  clk: si570: Simplify probe
  clk: si5351: Simplify probe
  clk: rs9: Use i2c_get_match_data() instead of device_get_match_data()
  clk: clk-si544: Simplify probe() and is_valid_frequency()
  clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data()
  clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS
  ...
2023-10-31 18:42:56 -10:00
Stephen Boyd
720e4a4a68 Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider' into clk-next
- Make clk kunit tests work with lockdep
 - Fix clk gate kunit test for big-endian
 - Convert more than a handful of clk drivers to use regmap maple tree
 - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
   implementation

* clk-renesas: (23 commits)
  clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2
  clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()
  clk: renesas: Add minimal boot support for RZ/G3S SoC
  clk: renesas: rzg2l: Add divider clock for RZ/G3S
  clk: renesas: rzg2l: Refactor SD mux driver
  clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header
  clk: renesas: rzg2l: Add struct clk_hw_data
  clk: renesas: rzg2l: Add support for RZ/G3S PLL
  clk: renesas: rzg2l: Remove critical area
  clk: renesas: rzg2l: Fix computation formula
  clk: renesas: rzg2l: Trust value returned by hardware
  clk: renesas: rzg2l: Lock around writes to mux register
  clk: renesas: rzg2l: Wait for status bit of SD mux before continuing
  clk: renesas: rcar-gen3: Extend SDnH divider table
  dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
  clk: renesas: r8a7795: Constify r8a7795_*_clks
  clk: renesas: r9a06g032: Name anonymous structs
  clk: renesas: r9a06g032: Fix kerneldoc warning
  clk: renesas: rzg2l: Use u32 for flag and mux_flags
  clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
  ...

* clk-kunit:
  clk: Fix clk gate kunit test on big-endian CPUs
  clk: Parameterize clk_leaf_mux_set_rate_parent
  clk: Drive clk_leaf_mux_set_rate_parent test from clk_ops

* clk-regmap:
  clk: versaclock7: Convert to use maple tree register cache
  clk: versaclock5: Convert to use maple tree register cache
  clk: versaclock3: Convert to use maple tree register cache
  clk: versaclock3: Remove redundant _is_writeable()
  clk: si570: Convert to use maple tree register cache
  clk: si544: Convert to use maple tree register cache
  clk: si5351: Convert to use maple tree register cache
  clk: si5341: Convert to use maple tree register cache
  clk: si514: Convert to use maple tree register cache
  clk: cdce925: Convert to use maple tree register cache

* clk-frac-divider:
  clk: fractional-divider: tests: Add test suite for edge cases
  clk: fractional-divider: Improve approximation when zero based and export
2023-10-30 14:12:20 -07:00
Stephen Boyd
d33050aec3 Merge branches 'clk-debugfs', 'clk-spreadtrum', 'clk-sifive', 'clk-counted' and 'clk-qcom' into clk-next
- Add consumer info to clk debugfs
 - Fix various clk drivers that have clk_hw_onecell_data not at the end
   of an allocation

* clk-debugfs:
  clk: Allow phase adjustment from debugfs
  clk: Show active consumers of clocks in debugfs

* clk-spreadtrum:
  clk: sprd: Composite driver support offset config

* clk-sifive:
  clk: sifive: Allow building the driver as a module
  clk: analogbits: Allow building the library as a module

* clk-counted:
  clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data
  clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
  clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider
  clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider

* clk-qcom: (36 commits)
  clk: qcom: apss-ipq6018: add the GPLL0 clock also as clock provider
  clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
  clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
  clk: qcom: ipq5018: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
  clk: qcom: ipq6018: drop the CLK_SET_RATE_PARENT flag from PLL clocks
  clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from PLL clocks
  clk: qcom: gcc-ipq6018: add QUP6 I2C clock
  clk: qcom: apss-ipq6018: ipq5332: add safe source switch for a53pll
  clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config
  clk: qcom: apss-ipq-pll: Use stromer plus ops for stromer plus pll
  clk: qcom: clk-alpha-pll: introduce stromer plus ops
  clk: qcom: config IPQ_APSS_6018 should depend on QCOM_SMEM
  clk: qcom: videocc-sm8550: switch to clk_lucid_ole_pll_configure
  clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure
  clk: qcom: Replace of_device.h with explicit includes
  clk: qcom: smd-rpm: Move CPUSS_GNoC clock to interconnect
  clk: qcom: cbf-msm8996: Convert to platform remove callback returning void
  clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src
  clk: qcom: Add GCC driver support for SM4450
  dt-bindings: clock: qcom: Add GCC clocks for SM4450
  ...
2023-10-30 14:10:51 -07:00
Stephen Boyd
702a582b5c Merge branches 'clk-doc', 'clk-amlogic', 'clk-mediatek', 'clk-twl' and 'clk-imx' into clk-next
- Add clock driver for TWL6032

* clk-doc:
  clk: linux/clk-provider.h: fix kernel-doc warnings and typos

* clk-amlogic:
  clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS
  clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller
  clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver
  dt-bindings: clock: document Amlogic S4 SoC peripherals clock controller
  dt-bindings: clock: document Amlogic S4 SoC PLL clock controller

* clk-mediatek:
  clk: mediatek: fix double free in mtk_clk_register_pllfh()
  clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt7629: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt7629-eth: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt6779: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt6765: Add check for mtk_alloc_clk_data

* clk-twl:
  clk: twl: add clock driver for TWL6032

* clk-imx:
  clk: imx: imx8qm/qxp: add more resources to whitelist
  clk: imx: scu: ignore clks not owned by Cortex-A partition
  clk: imx8: remove MLB support
  clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE
  clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL
  clk: imx: imx8qxp: Fix elcdif_pll clock
  clk: imx: imx8dxl-rsrc: keep sorted in the ascending order
  clk: imx: imx6sx: Allow a different LCDIF1 clock parent
  clk: imx: imx8mq: correct error handling path
  clk: imx8mp: Remove non-existent IMX8MP_CLK_AUDIOMIX_PDM_ROOT
  clk: imx: imx8: Simplify clk_imx_acm_detach_pm_domains()
  clk: imx: imx8: Add a message in case of devm_clk_hw_register_mux_parent_data_table() error
  clk: imx: imx8: Fix an error handling path in imx8_acm_clk_probe()
  clk: imx: imx8: Fix an error handling path if devm_clk_hw_register_mux_parent_data_table() fails
  clk: imx: imx8: Fix an error handling path in clk_imx_acm_attach_pm_domains()
  clk: imx: Select MXC_CLK for CLK_IMX8QXP
2023-10-30 14:10:39 -07:00
Zev Weiss
9931be2cfc dt-bindings: watchdog: aspeed-wdt: Add aspeed,reset-mask property
This property configures the Aspeed watchdog timer's reset mask, which
controls which peripherals are reset when the watchdog timer expires.
Some platforms require that certain devices be left untouched across a
reboot; aspeed,reset-mask can now be used to express such constraints.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20230922104231.1434-5-zev@bewilderbeest.net
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2023-10-29 19:45:10 +01:00
Ulf Hansson
11cc498cf8 pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to
be tested together with new pmdomain changes that are targeted for v6.7.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-26 16:21:46 +02:00
Sibi Sankar
7eb31ec5e1 dt-bindings: power: qcom,rpmhpd: Add GMXC PD index
Document GMXC (Graphics MXC) power domain index which will be used on
SC8380XP SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20231025135943.13854-2-quic_sibis@quicinc.com
[Ulf: Re-based to step up the index number]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-26 16:17:47 +02:00
Neil Armstrong
d4d56c079d dt-bindings: power: qcom,rpmpd: document the SM8650 RPMh Power Domains
Document the RPMh Power Domains on the SM8650 Platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-rpmpd-v1-1-f25d313104c6@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-26 16:17:31 +02:00
Ulf Hansson
1817d56ec8 pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to
be tested together with new pmdomain changes that are targeted for v6.7.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-24 12:48:56 +02:00
Otto Pflüger
6184869828 dt-bindings: power: rpmpd: Add MSM8917, MSM8937 and QM215
The MSM8917, MSM8937 and QM215 SoCs have VDDCX and VDDMX power domains
controlled in voltage level mode. Define the MSM8937 and QM215 power
domains as aliases because these SoCs are similar to MSM8917 and may
share some parts of the device tree.

Also add the compatibles for these SoCs to the documentation, with
qcom,msm8937-rpmpd using qcom,msm8917-rpmpd as a fallback compatible
because there are no known differences. QM215 is not compatible with
these because it uses different regulators.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231014133823.14088-2-otto.pflueger@abscue.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-24 12:48:11 +02:00
Balsam CHIHI
0bb4937b58 dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for mt8192
Add LVTS thermal controller definition for MT8192.

Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20231017190545.157282-2-bero@baylibre.com
2023-10-19 02:40:34 +02:00
Ulf Hansson
f4e769243d pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to
be tested together with new pmdomain changes that are targeted for v6.7.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-17 11:39:37 +02:00
Fabien Parent
a1571f1f33 dt-bindings: power: Add MT8365 power domains
Add power domains dt-bindings for MT8365.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Tested-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230918093751.1188668-2-msp@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-17 11:38:34 +02:00
Frank Wunderlich
be2cc09bd5 dt-bindings: thermal: mediatek: Add LVTS thermal sensors for mt7988
Add sensor constants for MT7988.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230922055020.6436-3-linux@fw-web.de
2023-10-15 23:40:09 +02:00
Rohit Agarwal
956329ec7c dt-bindings: interconnect: Add compatibles for SDX75
Add dt-bindings compatibles and interconnect IDs for
Qualcomm SDX75 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1694614256-24109-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-10-10 12:14:51 +03:00
Claudiu Beznea
e372aee8c2 dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
Add documentation for the RZ/G3S CPG.  The RZ/G3S CPG module is almost
identical to the one available in RZ/G2{L,UL}, the exception being some
core clocks as follows:
  - The SD clock is composed of a mux and a divider, and the divider
    has some limitations (div = 1 cannot be set if mux rate is 800MHz),
  - There are 3 SD clocks,
  - The OCTA and TSU clocks are specific to RZ/G3S,
  - PLL1/4/6 are specific to RZ/G3S with its own computation formula.
Even with this RZ/G3S could use the same bindings as RZ/G2L.

Along with documentation bindings for the RZ/G3S (R9A08G045) Clock Pulse
Generator (CPG) core clocks, module clocks and resets were added.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-13-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05 11:25:53 +02:00
Changhuang Liang
793f4def8c dt-bindings: power: Update prefixes for AON power domain
Use "JH7110_AON_PD_" prefix for AON power domain for JH7110 SoC.

Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230927130734.9921-2-changhuang.liang@starfivetech.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-04 23:41:57 +02:00
Adam Ford
05eeeff22b clk: imx8mp: Remove non-existent IMX8MP_CLK_AUDIOMIX_PDM_ROOT
The TRM shows there is only one AUDIOMIX PDM Root Clock Select
register, and it's called IMX8MP_CLK_AUDIOMIX_PDM_SEL.  That
selector doesn't appear to have any more children and the
MICFIL driver can reference IMX8MP_CLK_AUDIOMIX_PDM_SEL
directly without the need for any other.  Remove this
errant clock, since it doesn't really exist.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230831044431.250338-3-aford173@gmail.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-10-04 11:34:24 +03:00
Yu Tu
9894949916 dt-bindings: clock: document Amlogic S4 SoC peripherals clock controller
Add the S4 peripherals clock controller dt-bindings in the S4 SoC
family.

Signed-off-by: Yu Tu <yu.tu@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230904075504.23263-3-yu.tu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-09-27 10:54:24 +02:00
Yu Tu
923a77a2e1 dt-bindings: clock: document Amlogic S4 SoC PLL clock controller
Add the S4 PLL clock controller dt-bindings in the S4 SoC family.

Signed-off-by: Yu Tu <yu.tu@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230904075504.23263-2-yu.tu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-09-27 10:54:24 +02:00
Huqiang Qin
2b7eb110d3 dt-bindings: pinctrl: Add support for Amlogic T7 SoCs
Add a new compatible name for Amlogic T7 pin controller, and add
a new dt-binding header file which document the detail pin names.

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230922094342.637251-2-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-25 15:49:08 +02:00
Bjorn Andersson
2643f0b069 Merge branch '20230909123431.1725728-1-quic_ajipan@quicinc.com' into clk-for-6.7
Merge the SM4450 RPMHCC and GCC through a topic branch, to allow reuse
of the defines from the DeviceTree binding in the DeviceTree source.
2023-09-20 09:01:29 -07:00
Ajit Pandey
d2d04deb55 dt-bindings: clock: qcom: Add GCC clocks for SM4450
Add support for qcom global clock controller bindings for SM4450 platform.

Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230909123431.1725728-4-quic_ajipan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-20 09:01:20 -07:00
Luca Weiss
471e2875f8 clk: qcom: mmcc-msm8974: remove ocmemcx_ahb_clk
According to a commit in the 3.4 vendor kernel sources[0] the
ocmemcx_ahb_clk clock "is controlled by RPM and should not be touched by
APPS.".

[0] 37df5f2d91

And indeed, when using MDSS+GPU+OCMEM on MSM8226 and not using
clk_ignore_unused, when Linux tries to disable the clock the device
crashes and reboots.

And since there's also no evidence of this clock in msm8974 vendor
kernel sources, remove the clock for msm8226 and msm8974.

Fixes: d8b212014e ("clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230902-msm8226-ocmemcx_ahb_clk-remove-v1-1-8124dbde83b9@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-20 07:07:34 -07:00
Jagadeesh Kona
9cbc64745f dt-bindings: clock: qcom: Add SM8550 camera clock controller
Add device tree bindings for the camera clock controller on
Qualcomm SM8550 platform.

Co-developed-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230707035744.22245-2-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19 11:38:16 -07:00
Changhuang Liang
41b66b54a7 dt-bindings: power: Add power-domain header for JH7110
Add power-domain header for JH7110 SoC, it can use to operate dphy
power.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230913-grumbly-rewrite-34c85539f2ed@spud
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-09-14 00:16:09 +02:00
Robert Marko
b8c889bef9 dt-bindings: arm: qcom,ids: Add IDs for IPQ8174 family
IPQ8174 (Oak) family is part of the IPQ8074 family, but the ID-s for it
are missing so lets add them.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230901181041.1538999-1-robimarko@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-13 12:30:18 -07:00
Luca Weiss
ccfb4d8b60 dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490
Add the ID for the Qualcomm QCM6490 SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230830-fp5-initial-v1-7-5a954519bbad@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-13 12:23:32 -07:00
Danila Tikhonov
edc3a1fb62 dt-bindings: arm: qcom,ids: Add Soc ID for SM7150P
Add the ID for the Qualcomm SM7150P SoC.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230913181722.13917-2-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-13 11:46:48 -07:00
xianwei.zhao
54f1618b95 dt-bindings: power: add Amlogic T7 power domains
Add devicetree binding document and related header file for
Amlogic T7 secure power domains.

Signed-off-by: xianwei.zhao <xianwei.zhao@amlogic.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Lucas Tanure <tanure@linux.com>
Link: https://lore.kernel.org/r/20230911025223.3433776-5-xianwei.zhao@amlogic.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-09-11 16:15:27 +02:00
Linus Torvalds
0468be89b3 IOMMU Updates for Linux v6.6
Including:
 
 	- Core changes:
 	  - Consolidate probe_device path
 	  - Make the PCI-SAC IOVA allocation trick PCI-only
 
 	- AMD IOMMU:
 	  - Consolidate PPR log handling
 	  - Interrupt handling improvements
 	  - Refcount fixes for amd_iommu_v2 driver
 
 	- Intel VT-d driver:
 	  - Enable idxd device DMA with pasid through iommu dma ops.
 	  - Lift RESV_DIRECT check from VT-d driver to core.
 	  - Miscellaneous cleanups and fixes.
 
 	- ARM-SMMU drivers:
 	  - Device-tree binding updates:
 	    - Add additional compatible strings for Qualcomm SoCs
 	    - Allow ASIDs to be configured in the DT to work around Qualcomm's
 	      broken hypervisor
 	    - Fix clocks for Qualcomm's MSM8998 SoC
 	  - SMMUv2:
 	    - Support for Qualcomm's legacy firmware implementation featured on
 	      at least MSM8956 and MSM8976.
 	    - Match compatible strings for Qualcomm SM6350 and SM6375 SoC variants
 	  - SMMUv3:
 	    - Use 'ida' instead of a bitmap for VMID allocation
 
 	  - Rockchip IOMMU:
 	    - Lift page-table allocation restrictions on newer hardware
 
 	  - Mediatek IOMMU:
 	    - Add MT8188 IOMMU Support
 
 	  - Renesas IOMMU:
 	    - Allow PCIe devices
 
 	- Usual set of cleanups an smaller fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmTx7IMACgkQK/BELZcB
 GuMxUA/+P/wYvAKCbDpXyszIpyCTx37BkeRTBaVqG0vEKLG6439i+PIm3oudQK+6
 0y+1clJi0Ddu0uv1ck90cIEP1YDuKaKdrOVeE7TtlK+6LKYxTyeN+mz4csMIbahI
 6JMrWzrIEPIyMBHzAepQiGDCsmDkrCngPj0WmA7+EQZSSHVYp+TLe6OLzNs74vDF
 zCITkYNq6aKyg/dNJpMRy6VOHvw9PUiwRvm7ko7WONP4VCtpW4g3Jpkerf19zoV2
 s0nwZuGn3o7F0aFOpRJPPKQNfQnNjOjHdxjcsGBafD9qqAk4TLvnZH24njKtPidJ
 P8CiAu//HxhDyUPTgTIrDroVOGVG7s85XO+WesjPkEI3vnNjXy+qEIinQBJ3oIaI
 ppDLSnArEhfSRgt6dXvPCJ/g4+WGS9jNV85GCa7XBtal2Msu8G89NKC97mpmjCkb
 lnGmCF9t7Tkt/fLWxw4GADBN3m2tOib1GQMvPYAF2WM3jH5aRq2UliIRuCHZkzwv
 EF3SiFQQqab6oogU9tF/A1QLUKQ8QfYOdabqL9z2COgF5tS00VC6b/6VTNkKeBHe
 qIiOpI7IWo76tFJule5gRaUth9nVkjpEo6kL9I6rEldOlFJrX6uaHTta6/isY3gx
 vkN98V/OThRUbDwMD122YVKNNjZE2MNsTeptXqB3jHvl3UWiLsQ=
 =RV+G
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:
 "Core changes:

   - Consolidate probe_device path

   - Make the PCI-SAC IOVA allocation trick PCI-only

  AMD IOMMU:

   - Consolidate PPR log handling

   - Interrupt handling improvements

   - Refcount fixes for amd_iommu_v2 driver

  Intel VT-d driver:

   - Enable idxd device DMA with pasid through iommu dma ops

   - Lift RESV_DIRECT check from VT-d driver to core

   - Miscellaneous cleanups and fixes

  ARM-SMMU drivers:

   - Device-tree binding updates:
      - Add additional compatible strings for Qualcomm SoCs
      - Allow ASIDs to be configured in the DT to work around Qualcomm's
        broken hypervisor
      - Fix clocks for Qualcomm's MSM8998 SoC

   - SMMUv2:
      - Support for Qualcomm's legacy firmware implementation featured
        on at least MSM8956 and MSM8976
      - Match compatible strings for Qualcomm SM6350 and SM6375 SoC
        variants

   - SMMUv3:
      - Use 'ida' instead of a bitmap for VMID allocation

   - Rockchip IOMMU:
      - Lift page-table allocation restrictions on newer hardware

   - Mediatek IOMMU:
      - Add MT8188 IOMMU Support

   - Renesas IOMMU:
      - Allow PCIe devices

  .. and the usual set of cleanups an smaller fixes"

* tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits)
  iommu: Explicitly include correct DT includes
  iommu/amd: Remove unused declarations
  iommu/arm-smmu-qcom: Add SM6375 SMMUv2
  iommu/arm-smmu-qcom: Add SM6350 DPU compatible
  iommu/arm-smmu-qcom: Add SM6375 DPU compatible
  iommu/arm-smmu-qcom: Sort the compatible list alphabetically
  dt-bindings: arm-smmu: Fix MSM8998 clocks description
  iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope()
  iommu/vt-d: Fix to convert mm pfn to dma pfn
  iommu/vt-d: Fix to flush cache of PASID directory table
  iommu/vt-d: Remove rmrr check in domain attaching device path
  iommu: Prevent RESV_DIRECT devices from blocking domains
  dmaengine/idxd: Re-enable kernel workqueue under DMA API
  iommu/vt-d: Add set_dev_pasid callback for dma domain
  iommu/vt-d: Prepare for set_dev_pasid callback
  iommu/vt-d: Make prq draining code generic
  iommu/vt-d: Remove pasid_mutex
  iommu/vt-d: Add domain_flush_pasid_iotlb()
  iommu: Move global PASID allocation from SVA to core
  iommu: Generalize PASID 0 for normal DMA w/o PASID
  ...
2023-09-01 16:54:25 -07:00
Linus Torvalds
1c9f8dff62 Char/Misc driver changes for 6.6-rc1
Here is the big set of char/misc and other small driver subsystem
 changes for 6.6-rc1.
 
 Stuff all over the place here, lots of driver updates and changes and
 new additions.  Short summary is:
   - new IIO drivers and updates
   - Interconnect driver updates
   - fpga driver updates and additions
   - fsi driver updates
   - mei driver updates
   - coresight driver updates
   - nvmem driver updates
   - counter driver updates
   - lots of smaller misc and char driver updates and additions
 
 All of these have been in linux-next for a long time with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZPH64g8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynr2QCfd3RKeR+WnGzyEOFhksl30UJJhiIAoNZtYT5+
 t9KG0iMDXRuTsOqeEQbd
 =tVnk
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  changes for 6.6-rc1.

  Stuff all over the place here, lots of driver updates and changes and
  new additions. Short summary is:

   - new IIO drivers and updates

   - Interconnect driver updates

   - fpga driver updates and additions

   - fsi driver updates

   - mei driver updates

   - coresight driver updates

   - nvmem driver updates

   - counter driver updates

   - lots of smaller misc and char driver updates and additions

  All of these have been in linux-next for a long time with no reported
  problems"

* tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (267 commits)
  nvmem: core: Notify when a new layout is registered
  nvmem: core: Do not open-code existing functions
  nvmem: core: Return NULL when no nvmem layout is found
  nvmem: core: Create all cells before adding the nvmem device
  nvmem: u-boot-env:: Replace zero-length array with DECLARE_FLEX_ARRAY() helper
  nvmem: sec-qfprom: Add Qualcomm secure QFPROM support
  dt-bindings: nvmem: sec-qfprom: Add bindings for secure qfprom
  dt-bindings: nvmem: Add compatible for QCM2290
  nvmem: Kconfig: Fix typo "drive" -> "driver"
  nvmem: Explicitly include correct DT includes
  nvmem: add new NXP QorIQ eFuse driver
  dt-bindings: nvmem: Add t1023-sfp efuse support
  dt-bindings: nvmem: qfprom: Add compatible for MSM8226
  nvmem: uniphier: Use devm_platform_get_and_ioremap_resource()
  nvmem: qfprom: do some cleanup
  nvmem: stm32-romem: Use devm_platform_get_and_ioremap_resource()
  nvmem: rockchip-efuse: Use devm_platform_get_and_ioremap_resource()
  nvmem: meson-mx-efuse: Convert to devm_platform_ioremap_resource()
  nvmem: lpc18xx_otp: Convert to devm_platform_ioremap_resource()
  nvmem: brcm_nvram: Use devm_platform_get_and_ioremap_resource()
  ...
2023-09-01 09:53:54 -07:00
Linus Torvalds
f8fd5c2483 This pull request is full of clk driver changes. In fact, there aren't any
changes to the clk framework this time around. That's probably because everyone
 was on vacation (yours truly included). We did lose a couple clk drivers this
 time around because nobody was using those devices. That skews the diffstat a
 bit, but either way, nothing looks out of the ordinary here. The usual suspects
 are chugging along adding support for more SoCs and fixing bugs.
 
 If I had to choose, I'd say the theme for the past few months has been
 "polish". There's quite a few patches that migrate to
 devm_platform_ioremap_resource() in here. And there's more than a handful of
 patches that move the NR_CLKS define from the DT binding header to the driver.
 There's even patches that migrate drivers to use clk_parent_data and clk_hw to
 describe clk tree topology. It seems that the spring (summer?) cleaning bug got
 some folks, or the semiconductor shortage finally hit the software side.
 
 New Drivers:
  - StarFive JH7110 SoC clock drivers
  - Qualcomm IPQ5018 Global Clock Controller driver
  - Versa3 clk generator to support 48KHz playback/record with audio codec on
    RZ/G2L SMARC EVK
 
 Removed Drivers:
  - Remove non-OF mmp clk drivers
  - Remove OXNAS clk driver
 
 Updates:
  - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
  - Move defines for numbers of clks (NR_CLKS) from DT headers to drivers
  - Introduce kstrdup_and_replace() and use it
  - Add PLL rates for Rockchip rk3568
  - Add the display clock tree for Rockchip rv1126
  - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs
  - Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource()
  - Fix function name in a comment in ccu_mmc_timing.c
  - Parameter name correction for ccu_nkm_round_rate()
  - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative
    parent rates when determining clock rates
  - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
  - Support finding closest (as opposed to closest but not higher) clock rate
    for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0
  - Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks
  - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to
    the interconnect drivers
  - Fix various PM runtime bugs across many Qualcomm clk drivers
  - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
  - Add network related resets on Qualcomm IPQ4019
  - Add a couple missing USB related clocks to Qualcomm IPQ9574
  - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller
  - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are
    added, while PCIe pipe clock, SDCC rcg ops are corrected
  - Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver
  - Support retention for the Qualcomm SC8280XP display clock controller GDSCs.
  - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix
    issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250,
    while sm8450 is corrected to use floor ops
  - Correct Qualcomm SM6350 GPU clock controller's clock supplies
  - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
  - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
  - Change the delay in the Qualcomm reset controller to fsleep() for correctness
  - Extend the Qualcomm SM83550 Video clock controller to support SC8280XP
  - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3,
    M3-W, and M3-N SoCs
  - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
  - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
  - Add the PDM IPC clock for i.MX93
  - Add 519.75MHz frequency support for i.MX9 PLL
  - Simplify the .determine_rate() implementation for i.MX GPR mux
  - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
  - Add the audio mux clock to i.MX8
  - Fix the SPLL2 MULT range for PLLv4
  - Update the SPLL2 type in i.MX8ULP
  - Fix the SAI4 clock on i.MX8MP
  - Add silicon revision print for i.MX25 on clocks init
  - Drop the return value from __mx25_clocks_init()
  - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
  - Drop restrictions for i.MX PLL14xx and fix its max prediv value
  - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow
    glitch free switching
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmTv2wkRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSW1LRAAuHR2HoyB4bRHmCa1bfOfYYDfSWsBWEav
 tWIfBl86Nl/Je50Gk2NJ9vqU5OPqRZ57TIniijHHoX5n7/kYcr8KVmlomY07hUeg
 CzWyothkxg4k7+rQwVAWvmlR2YAVwzHDKcwq7gkMZOnW/y26LXip99cjopu2CJLx
 zVwTgvWollmd4KVlicnAlx4zUjgNkWR24iA4Lcf5ir+Dr6FYNjxLI+akBA8EPxxi
 wLixZbScgBSgpGn6KVgoFhclCToPS0gt5m6HfQxJ/svOCU54l+jRKpzkNZGWvyu4
 A8t3CRrwL2iS/mfCGk2yRlaKySoLLpjlpW1AI7fHTWbG2P6p8ZphtN7jOeeAEsbq
 TNpzWEjtY6B/lfRzxxINXkrtLaqmlnFY/P5np5fDrf/61gRFxLFQemyRdY/xCSJf
 Kwq8ja1mrSGWoDGG9XhDqTf9Yek9LRObNzlDrEmn/i/qLTcxhOIz58pzHg4iAlx5
 9HDtnJ8hKg4uE1TtT12Bmasb1+WzG7GYYESNfKWZhCvbRqEUzcDOHk7xpwYa1ffx
 yZIgMs7Sb/exNW8LMPYmgnyj/f9eo5IdjiQvune+Zy5NrdzfyN6Sf/LSibrqCF2z
 X5aFHqQrR8+PifD+se+g5HPa0ezSmBIhXzYUTOC6f+nywlrJjhwDXPDYI6Lcd//p
 r4mpOmJS+G4=
 =h2Jz
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
 "This pull request is full of clk driver changes. In fact, there aren't
  any changes to the clk framework this time around. That's probably
  because everyone was on vacation (yours truly included). We did lose a
  couple clk drivers this time around because nobody was using those
  devices. That skews the diffstat a bit, but either way, nothing looks
  out of the ordinary here. The usual suspects are chugging along adding
  support for more SoCs and fixing bugs.

  If I had to choose, I'd say the theme for the past few months has been
  "polish". There's quite a few patches that migrate to
  devm_platform_ioremap_resource() in here. And there's more than a
  handful of patches that move the NR_CLKS define from the DT binding
  header to the driver. There's even patches that migrate drivers to use
  clk_parent_data and clk_hw to describe clk tree topology. It seems
  that the spring (summer?) cleaning bug got some folks, or the
  semiconductor shortage finally hit the software side.

  New Drivers:
   - StarFive JH7110 SoC clock drivers
   - Qualcomm IPQ5018 Global Clock Controller driver
   - Versa3 clk generator to support 48KHz playback/record with audio
     codec on RZ/G2L SMARC EVK

  Removed Drivers:
   - Remove non-OF mmp clk drivers
   - Remove OXNAS clk driver

  Updates:
   - Add __counted_by to struct clk_hw_onecell_data and struct
     spmi_pmic_div_clk_cc
   - Move defines for numbers of clks (NR_CLKS) from DT headers to
     drivers
   - Introduce kstrdup_and_replace() and use it
   - Add PLL rates for Rockchip rk3568
   - Add the display clock tree for Rockchip rv1126
   - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Convert sun9i-mmc clock to use
     devm_platform_get_and_ioremap_resource()
   - Fix function name in a comment in ccu_mmc_timing.c
   - Parameter name correction for ccu_nkm_round_rate()
   - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
     consider alternative parent rates when determining clock rates
   - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
   - Support finding closest (as opposed to closest but not higher)
     clock rate for NM, NKM, mux and div type clocks, as use it for
     Allwinner A64 pll-video0
   - Prefer current parent rate if able to generate ideal clock rate for
     Allwinner NKM clocks
   - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
     moved out to the interconnect drivers
   - Fix various PM runtime bugs across many Qualcomm clk drivers
   - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
   - Add network related resets on Qualcomm IPQ4019
   - Add a couple missing USB related clocks to Qualcomm IPQ9574
   - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
     controller
   - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
     and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
     corrected
   - Add missing GDSCs to and correct GDSCs for the SC8280XP global
     clock controller driver
   - Support retention for the Qualcomm SC8280XP display clock
     controller GDSCs.
   - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
     to fix issues with missing parent clocks across sc7180, sm7150,
     sm6350 and sm8250, while sm8450 is corrected to use floor ops
   - Correct Qualcomm SM6350 GPU clock controller's clock supplies
   - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
   - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
   - Change the delay in the Qualcomm reset controller to fsleep() for
     correctness
   - Extend the Qualcomm SM83550 Video clock controller to support
     SC8280XP
   - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
     R-Car H3, M3-W, and M3-N SoCs
   - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
   - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
   - Add the PDM IPC clock for i.MX93
   - Add 519.75MHz frequency support for i.MX9 PLL
   - Simplify the .determine_rate() implementation for i.MX GPR mux
   - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
   - Add the audio mux clock to i.MX8
   - Fix the SPLL2 MULT range for PLLv4
   - Update the SPLL2 type in i.MX8ULP
   - Fix the SAI4 clock on i.MX8MP
   - Add silicon revision print for i.MX25 on clocks init
   - Drop the return value from __mx25_clocks_init()
   - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
   - Drop restrictions for i.MX PLL14xx and fix its max prediv value
   - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
     allow glitch free switching"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  ...
2023-08-30 19:53:39 -07:00
Linus Torvalds
4a3b1007ee Pin control bulk changes for the v6.6 kernel cycle:
No core changes this time.
 
 Drivers:
 
 - Intel Tangier SoC pin control support.
 
 - AMLogic C3 SoC pin control support.
 
 - Texas Instruments AM654 SoC pin control support.
 
 - Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System)
   pin control support.
 
 - Qualcomm PMX75 and PM7550BA (Power Management) pin control
   support.
 
 - Qualcomm PMC8180 and PMC8180C (Power Management) pin control
   support.
 
 - DROP the Oxnas driver as there is not enough of community
   interest to keep carrying this ARM(11) port.
 
 Enhancements:
 
 - Bias control in the MT7986 pin control driver.
 
 - Misc device tree binding enhancements such as the Broadcom
   11351 being converted to YAML.
 
 - New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use.
 
 - Clean up some SPDX headers.
 
 - Handle non-unique devicetree subnode names in two Renesas
   drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmTvSrkACgkQQRCzN7AZ
 XXM03BAAgYeGwWGldsSGVl6Dqq6cjXpIzSe3lDxRw1zjtXm1JZlgl7UFmB4ayDgg
 AIa1VNg0tDmVo10jmsju/5n6bHtvbMyMGNM5w8cSPYVVusGWnQacs8lydureeAdX
 zjnPhfF/UmpFomd2tLqp38M8mOR9XiokbRx3TAYE6W0RT8icvBtWLHeLrleoG2In
 YonUnzuxHnTRfb4GGPRvDLsKD1NpTNsXOYdxMbBPepT1gh9jY39uGG48a8R0ty3H
 HBYsrbneWtK1EIgp/1azop2jUWQsMGanI8Da0Wv4CL+yPreJuet9HhFjtsPGVoEy
 JnkBO1mBSD8WPIEPPyIedvdIttl2U6rHLsvFWcy3XMNUR5KsA6YQMyBUZtbP9VZK
 s8klxXyqODLpNsjNKWffPzNWdxrJ80i5iMxphiGObKzTNJH1U/a5/ohL4OOfLIe2
 z5rBGbuTwSHE5/1wnDruF/Tx6Eb/imPzY6jtc4LcCtsOOCd9L+Xa7B4OazP+AWSE
 TS08snoNBSm253ct9fTyrlAC4Is68c+DXw5w1YJDC1HkDWxqMWfm0Ui7gGpnXmow
 uYxerR/0rCa7cNrgCGKWLUjlkOw+YS2f9osj32GNFQz/Vt9juGq+l9rh1t+xgS5v
 UBmy9BTX2UxNHL9D9VEPec99tV4b+Hanqq0lxacMtfuunFbe0cc=
 =AMCy
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "We have some patches to DTS[I] files in arm and arm64 as well, that
  were merged here as DT headers were being changed.

  The most interesting stuff is the Intel Tangier chip support and
  AMLogic C3 in my opinion.

  No core changes this time.

  Drivers:

   - Intel Tangier SoC pin control support

   - AMLogic C3 SoC pin control support

   - Texas Instruments AM654 SoC pin control support

   - Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System) pin
     control support

   - Qualcomm PMX75 and PM7550BA (Power Management) pin control support

   - Qualcomm PMC8180 and PMC8180C (Power Management) pin control
     support

   - DROP the Oxnas driver as there is not enough of community interest
     to keep carrying this ARM(11) port

  Enhancements:

   - Bias control in the MT7986 pin control driver

   - Misc device tree binding enhancements such as the Broadcom 11351
     being converted to YAML

   - New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use

   - Clean up some SPDX headers

   - Handle non-unique devicetree subnode names in two Renesas drivers"

* tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
  pinctrl: mlxbf3: Remove gpio_disable_free()
  pinctrl: use capital "OR" for multiple licenses in SPDX
  dt-bindings: pinctrl: renesas,rza2: Use 'additionalProperties' for child nodes
  pinctrl: cherryview: fix address_space_handler() argument
  pinctrl: intel: consolidate ACPI dependency
  pinctrl: tegra: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: mvebu: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: at91: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pm: Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: mediatek: assign functions to configure pin bias on MT7986
  pinctrl: mediatek: fix pull_type data for MT7981
  dt-bindings: pinctrl: aspeed: Allow only defined pin mux node properties
  dt-bindings: pinctrl: Drop 'phandle' properties
  pinctrl: lynxpoint: Make use of pm_ptr()
  pinctrl: baytrail: Make use of pm_ptr()
  pinctrl: intel: Switch to use exported namespace
  pinctrl: lynxpoint: reuse common functions from pinctrl-intel
  pinctrl: cherryview: reuse common functions from pinctrl-intel
  ...
2023-08-30 19:36:19 -07:00
Linus Torvalds
8f447694c2 Devicetree updates for v6.6:
DT core:
 - Add support for generating DT nodes for PCI devices. This is the
   groundwork for applying overlays to PCI devices containing
   non-discoverable downstream devices.
 
 - DT unittest additions to check reverted changesets, to test for
   refcount issues, and to test unresolved symbols. Also, various
   clean-ups of the unittest along the way.
 
 - Refactor node and property manipulation functions to better share code
   with old API and changeset API
 
 - Refactor changeset print functions to a common implementation
 
 - Move some platform_device specific functions into of_platform.c
 
 Bindings:
 - Treewide fixing of typos
 
 - Treewide clean-up of SPDX tags to use 'OR' consistently
 
 - Last chunk of dropping unnecessary quotes. With that, the check
   for unnecessary quotes is enabled in yamllint.
 
 - Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
   bindings to DT schema format
 
 - Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450 Inline
   Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt controller,
   Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
 
 - Fixes for Rockchip DWC PCI binding
 
 - Ensure all properties are evaluated on USB connector schema
 
 - Fix dt-check-compatible script to find of_device_id instances with
   compiler annotations
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmTubyoACgkQ+vtdtY28
 YcPamA//feXFYNPiIbSa7XqfAu1PE5XSg3PqCe77QvLBGJU7saTwRJApc88iTjlA
 hc5EELnZKp3FE9N7DJdmvEjYxKDqtJOukO+txKy3mFBWo+gZQURthZVcbLxUZmpw
 XmYA4b/GrIv5h8YWG1wokyaGTtSfTcf0+RmAtVepiDk5kWQKaC04Let356fKn9xi
 ePgLTZV6BJvPoGpMWd08o+1szUAc6Vihs9qWu7g0+mtb5K5xi/l05YMz3REu7kpf
 iz06CE/uzYvHpFBJZ6izN+9Qqxh52DnWckXX68v8kStHUON2h1YmZYvjhGrfay4k
 rHeDnHoRBrepDDCytXQ/fxzGtURr3b8yBnlhzEQadMLXmf25mm+TRBDmf6GnX5ij
 QmHlj+eSARIafcbb4fqF1Hdyv8c7XM0AkEnj1XrIWLtXPuRNSHlS25dngCztbII/
 lqmtBaH1ifCKj2VQ8YL8sVX7k208YU9vDNKZHQyA8dPEYwhknrWmp1F0OAnBB+wz
 F11kDE7xkZ0/gE7mUHwe9mP94hC6Ceks4IuBvsTzBmSwqXxyCz8gM2KHK4U3gNUr
 Sk2hWgZn+k2HM9zLb38FE18C6hqws6RBUWnJwZ4V3qPo2eYJ8Jzkvm7oonxjHgCC
 4FmYYAoCQhBEkZPOJ4map0eO5VbShn9Hrgs46Jj4WoXmm7dFDLc=
 =kl+z
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Add support for generating DT nodes for PCI devices. This is the
     groundwork for applying overlays to PCI devices containing
     non-discoverable downstream devices.

   - DT unittest additions to check reverted changesets, to test for
     refcount issues, and to test unresolved symbols. Also, various
     clean-ups of the unittest along the way.

   - Refactor node and property manipulation functions to better share
     code with old API and changeset API

   - Refactor changeset print functions to a common implementation

   - Move some platform_device specific functions into of_platform.c

  Bindings:

   - Treewide fixing of typos

   - Treewide clean-up of SPDX tags to use 'OR' consistently

   - Last chunk of dropping unnecessary quotes. With that, the check for
     unnecessary quotes is enabled in yamllint.

   - Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
     bindings to DT schema format

   - Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450
     Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt
     controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings

   - Fixes for Rockchip DWC PCI binding

   - Ensure all properties are evaluated on USB connector schema

   - Fix dt-check-compatible script to find of_device_id instances with
     compiler annotations"

* tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
  dt-bindings: usb: Add V3s compatible string for OHCI
  dt-bindings: usb: Add V3s compatible string for EHCI
  dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B
  dt-bindings: vendor-prefixes: document Saef Technology
  dt-bindings: thermal: lmh: update maintainer address
  of: unittest: Fix of_unittest_pci_node() kconfig dependencies
  dt-bindings: crypto: ice: Document sm8450 inline crypto engine
  dt-bindings: ufs: qcom: Add ICE to sm8450 example
  dt-bindings: ufs: qcom: Add sm6115 binding
  dt-bindings: ufs: qcom: Add reg-names property for ICE
  dt-bindings: yamllint: Enable quoted string check
  dt-bindings: Drop remaining unneeded quotes
  of: unittest-data: Fix whitespace - angular brackets
  of: unittest-data: Fix whitespace - indentation
  of: unittest-data: Fix whitespace - blank lines
  of: unittest-data: Convert remaining overlay DTS files to sugar syntax
  of: overlay: unittest: Add test for unresolved symbol
  of: unittest: Add separators to of_unittest_overlay_high_level()
  of: unittest: Cleanup partially-applied overlays
  of: unittest: Merge of_unittest_apply{,_revert}_overlay_check()
  ...
2023-08-30 16:59:03 -07:00
Linus Torvalds
0e72db7767 ARM: devicetree updates for 6.6
These are the devicetree updates for Arm and RISC-V based SoCs,
 mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips,
 Samsung, ST and Starfive.
 
 Only a few new SoC got added:
 
  - TI AM62P5, a variant of the existing Sitara AM62x family
 
  - Intel Agilex5, an FPGFA platform that includes an
    Cortex-A76/A55 SoC.
 
  - Qualcomm ipq5018 is used in wireless access points
 
  - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile
    phone platform.
 
 In total, 29 machines get added, which is low because of the summer
 break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
 Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head.  Most of
 these are development and reference boards.
 
 Despite not adding a lot of new machines, there are over 700 patches in
 total, most of which are cleanups and minor fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTuZOQACgkQYKtH/8kJ
 UieJGw/5AWNde1VYY/3uhdHSNeXtF+1LICZYoLQiSTWbpnlEoLhQseymRCybWRhd
 882TLCuEMrHV+ftP5z+kdYS+QJE3K8GNRxp4vAgLTRwnZItEE3qD8/jNeTtK5BqT
 7h9OYZJQhfczsIXISIljsvez2T3n5fA1glq2drc2fLl9AbEYvlByDCtCNmzqMYli
 II/S03vJqT3eFnOwut70EdFtnW3FIJ+HJLWu46zWLhrx2XJVS8hNaWqhQ3uKZ58p
 Q9cWAltu4biaILVpD/0vZST+m77HqcrPtVSwR9uHvzEzDEzYk/GYzn7DDlWgdVbt
 DJMkgK1pLJq67KpsefMqgTioCh2FBiWfNQ6FjsgJ06ykXgThLJfbzeeB4zU4fnDT
 YmcV/8gR6Np/wNeSBlPNLI6BZ1EF4h0Lkm6p//QgayYhdMVbE59K+SNwq4wps24l
 JU3dcxxblwpVmAaKSL5p0lbYTn8VKuz9rcXYIziQm1m8zaCwjq863bDFJKz8JsP8
 0tQ/azvS4Off9fKIMbUE4fiFmDGhgLTi0XL+GIlOFJF6JS6ToD2nL4FGRBJZPWNn
 iPNEV0F/dDnonB7Jfu92NodULY6B0mXs5/q+dPwde6oSpIDU2ORyNRb6Zk4fGC0l
 C+iPdb3BErf+GQYBLnRqQaMuV0sA6mN89lC6KlzWwwHK0UUoohg=
 =bO3j
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "These are the devicetree updates for Arm and RISC-V based SoCs, mainly
  from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and
  Starfive.

  Only a few new SoC got added:

   - TI AM62P5, a variant of the existing Sitara AM62x family

   - Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55
     SoC.

   - Qualcomm ipq5018 is used in wireless access points

   - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone
     platform.

  In total, 29 machines get added, which is low because of the summer
  break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
  Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
  these are development and reference boards.

  Despite not adding a lot of new machines, there are over 700 patches
  in total, most of which are cleanups and minor fixes"

* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits)
  arm64: dts: use capital "OR" for multiple licenses in SPDX
  ARM: dts: use capital "OR" for multiple licenses in SPDX
  arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
  ARM: dts: qcom: apq8064: add support to gsbi4 uart
  riscv: dts: change TH1520 files to dual license
  riscv: dts: thead: add BeagleV Ahead board device tree
  dt-bindings: riscv: Add BeagleV Ahead board compatibles
  ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
  ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
  dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
  ARM: dts: stm32: support display on stm32f746-disco board
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
  ARM: dts: stm32: add pin map for LTDC on stm32f7
  ARM: dts: stm32: add ltdc support on stm32f746 MCU
  arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Add PDC
  riscv: dts: starfive: fix jh7110 qspi sort order
  ...
2023-08-30 16:53:46 -07:00
Stephen Boyd
41680df097 Merge branch 'clk-qcom' into clk-next
* clk-qcom: (87 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
  clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
  clk: qcom: gcc-ipq5018: change some variable static
  clk: qcom: gcc-ipq4019: add missing networking resets
  dt-bindings: clock: qcom: ipq4019: add missing networking resets
  clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
  dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
  clk: qcom: gcc-qdu1000: Update the RCGs ops
  clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
  clk: qcom: gcc-qdu1000: Add support for GDSCs
  clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
  clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
  clk: qcom: gcc-qdu1000: Fix clkref clocks handling
  clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
  dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
  clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
  clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
  clk: qcom: ipq5332: drop the mem noc clocks
  clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
  ...
2023-08-30 14:39:58 -07:00
Stephen Boyd
3462100cf3 Merge branches 'clk-imx', 'clk-samsung', 'clk-annotate', 'clk-marvell' and 'clk-lmk' into clk-next
- Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
 - Remove non-OF mmp clk drivers
 - Move number of clks from DT headers to drivers

* clk-imx:
  clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz
  clk: imx: pll14xx: align pdiv with reference manual
  clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op
  clk: imx25: make __mx25_clocks_init return void
  clk: imx25: print silicon revision during init
  dt-bindings: clocks: imx8mp: make sai4 a dummy clock
  clk: imx8mp: fix sai4 clock
  clk: imx: imx8ulp: update SPLL2 type
  clk: imx: pllv4: Fix SPLL2 MULT range
  clk: imx: imx8: add audio clock mux driver
  dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
  clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource()
  clk: imx: clk-gpr-mux: Simplify .determine_rate()
  clk: imx: Add 519.75MHz frequency support for imx9 pll
  clk: imx93: Add PDM IPG clk
  dt-bindings: clock: imx93: Add PDM IPG clk

* clk-samsung:
  dt-bindings: clock: samsung: remove define with number of clocks
  clk: samsung: exynoautov9: do not define number of clocks in bindings
  clk: samsung: exynos850: do not define number of clocks in bindings
  clk: samsung: exynos7885: do not define number of clocks in bindings
  clk: samsung: exynos5433: do not define number of clocks in bindings
  clk: samsung: exynos5420: do not define number of clocks in bindings
  clk: samsung: exynos5410: do not define number of clocks in bindings
  clk: samsung: exynos5260: do not define number of clocks in bindings
  clk: samsung: exynos5250: do not define number of clocks in bindings
  clk: samsung: exynos4: do not define number of clocks in bindings
  clk: samsung: exynos3250: do not define number of clocks in bindings

* clk-annotate:
  clk: qcom: clk-spmi-pmic-div: Annotate struct spmi_pmic_div_clk_cc with __counted_by
  clk: Annotate struct clk_hw_onecell_data with __counted_by

* clk-marvell:
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  clk: mmp: Remove old non-OF clock drivers

* clk-lmk:
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
2023-08-30 14:39:19 -07:00
Stephen Boyd
032bcf783e Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next
- Add Versa3 clk generator to support 48KHz playback/record with audio
   codec on RZ/G2L SMARC EVK
 - Introduce kstrdup_and_replace() and use it

* clk-versa:
  clk: vc7: Use i2c_get_match_data() instead of device_get_match_data()
  clk: vc5: Use i2c_get_match_data() instead of device_get_match_data()
  clk: versaclock3: Switch to use i2c_driver's probe callback
  clk: Add support for versa3 clock driver
  dt-bindings: clock: Add Renesas versa3 clock generator bindings

* clk-strdup:
  clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  lib/string_helpers: Add kstrdup_and_replace() helper

* clk-amlogic: (22 commits)
  dt-bindings: soc: amlogic: document System Control registers
  dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema
  dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema
  clk: meson: axg-audio: move bindings include to main driver
  clk: meson: meson8b: move bindings include to main driver
  clk: meson: a1: move bindings include to main driver
  clk: meson: eeclk: move bindings include to main driver
  clk: meson: aoclk: move bindings include to main driver
  dt-bindings: clk: axg-audio-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
  dt-bindings: clk: meson8b-clkc: expose all clock ids
  dt-bindings: clk: g12a-aoclkc: expose all clock ids
  dt-bindings: clk: g12a-clks: expose all clock ids
  dt-bindings: clk: axg-clkc: expose all clock ids
  dt-bindings: clk: gxbb-clkc: expose all clock ids
  clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS
  ...

* clk-allwinner:
  clk: sunxi-ng: nkm: Prefer current parent rate
  clk: sunxi-ng: a64: select closest rate for pll-video0
  clk: sunxi-ng: div: Support finding closest rate
  clk: sunxi-ng: mux: Support finding closest rate
  clk: sunxi-ng: nkm: Support finding closest rate
  clk: sunxi-ng: nm: Support finding closest rate
  clk: sunxi-ng: Add helper function to find closest rate
  clk: sunxi-ng: Add feature to find closest rate
  clk: sunxi-ng: a64: allow pll-mipi to set parent's rate
  clk: sunxi-ng: nkm: consider alternative parent rates when determining rate
  clk: sunxi-ng: nkm: Use correct parameter name for parent HW
  clk: sunxi-ng: Modify mismatched function name
  clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource()

* clk-rockchip:
  clk: rockchip: rv1126: Add PD_VO clock tree
  clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz
  clk: rockchip: rk3568: Add PLL rate for 101MHz
2023-08-30 14:38:19 -07:00
Stephen Boyd
d10ebc7c64 Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next
- Remove OXNAS clk driver

* clk-bindings:
  dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml
  dt-bindings: clock: xlnx,versal-clk: drop select:false
  dt-bindings: clock: versal: Add versal-net compatible string
  dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
  dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding

* clk-starfive:
  reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support
  clk: starfive: Simplify .determine_rate()
  clk: starfive: Add StarFive JH7110 Video-Output clock driver
  clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
  clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
  clk: starfive: jh7110-sys: Add PLL clocks source from DTS
  clk: starfive: Add StarFive JH7110 PLL clock driver
  dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
  dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs
  dt-bindings: soc: starfive: Add StarFive syscon module
  dt-bindings: clock: Add StarFive JH7110 PLL clock generator

* clk-rm:
  dt-bindings: clk: oxnas: remove obsolete bindings
  clk: oxnas: remove obsolete clock driver

* clk-renesas:
  clk: renesas: rcar-gen3: Add ADG clocks
  clk: renesas: r8a77965: Add 3DGE and ZG support
  clk: renesas: r8a7796: Add 3DGE and ZG support
  clk: renesas: r8a7795: Add 3DGE and ZG support
  clk: renesas: emev2: Remove obsolete clkdev registration
  clk: renesas: r9a07g043: Add MTU3a clock and reset entry
  clk: renesas: rzg2l: Simplify .determine_rate()
  clk: renesas: r9a09g011: Add CSI related clocks
  clk: renesas: r8a774b1: Add 3DGE and ZG support
  clk: renesas: r8a774e1: Add 3DGE and ZG support
  clk: renesas: r8a774a1: Add 3DGE and ZG support
  clk: renesas: rcar-gen3: Add support for ZG clock

* clk-cleanup:
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init()
  clk: Explicitly include correct DT includes
2023-08-30 14:37:45 -07:00
Greg Kroah-Hartman
704e2c6107 interconnect changes for 6.6
This pull request contains the interconnect changes for the 6.6-rc1 merge
 window which is a mix of core and driver changes with the following highlights:
 
 Core changes:
 - New generic test client driver that allows issuing bandwidth requests
   between endpoints via debugfs.
 - Annotate all structs with flexible array members with the __counted_by
   attribute.
 - Introduce new icc_bw_lock for cases where we need to serialize bandwidth
   aggregation and update to decouple that from paths that require memory
   allocation.
 
 Driver changes:
 - Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework
   where they actually belong. This brings power management improvements
   and reduces the overhead and layering. These changes are in immutable
   branch that is being pulled also into the qcom tree.
 - Fixes for QUP nodes on SM8250.
 - Enable sync_state and keepalive for QCM2290.
 - Enable sync_state for SM8450.
 - Improve enable_mask-based BCMs handling and fix some bugs.
 - Add compatible string for the OSM-L3 on SDM670.
 - Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors.
 - Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have
   become ugly beasts with many different arguments.
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJk5xuLAAoJEIDQzArG2BZjnN4QALIjeLAhT+sonUbdwoSRmE4M
 fsE99iZnNXq4+CYOR38NOcpa/ZKA+a6as4a8pqfYw7+8yaV/BqaDJTt1lOPTeGwz
 38wdvy9R9H/KoJxad7SDFYDSkMpvMmcTQ33a4fyyyHdnNpgaEYqauncctnywD69U
 UywOR7YsA+T/0sugCqq1r1CgWK2S+JbUjxEgahnY840lCPMNRHrU+aJ9Uvw8fLcB
 iqNzEld/HB5lneqNDVWZWugxzX4bpsm2Ib0M1VZtNfh8bjZNaeIsMjAdDnmIKQQo
 qkRz3kHCrEzSKHsfX1X0umT4EpJ+UiltBGVWDTxodh9Pmw47D0UZGOipj6pwwulO
 /Jso/T0tJMSy4c05DMOegyothv6vpsillG5ZmzVpun8uiduBxp6KWkfEii+O6AXY
 EOaWQK/GYKJ9aKyGeOdZPq8aTxfmIOM85Bt/5LwZruUL1d5D4DTXvs5yJFBERDif
 sS2yK4GGtHLqllRttPC7pjYu6CWrCO5v3yvsezDdZfK/hd0QZMTr7DB4NcDi6ohl
 Au4HL84wa69MBh1sXm/hxbz3eGIh/XD8eRBheil+eAdkbx7+IoIHg1il49oPCmXH
 UKFBE2Gki1zFZ+0yGjJC031idaHDeNvGmoXd9+RkjHtCqMmkaofIOD3Pe3zIGrX4
 mj6QCcrZe5flt4eqKyTG
 =MeG9
 -----END PGP SIGNATURE-----

Merge tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 6.6

This pull request contains the interconnect changes for the 6.6-rc1 merge
window which is a mix of core and driver changes with the following highlights:

Core changes:
- New generic test client driver that allows issuing bandwidth requests
  between endpoints via debugfs.
- Annotate all structs with flexible array members with the __counted_by
  attribute.
- Introduce new icc_bw_lock for cases where we need to serialize bandwidth
  aggregation and update to decouple that from paths that require memory
  allocation.

Driver changes:
- Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework
  where they actually belong. This brings power management improvements
  and reduces the overhead and layering. These changes are in immutable
  branch that is being pulled also into the qcom tree.
- Fixes for QUP nodes on SM8250.
- Enable sync_state and keepalive for QCM2290.
- Enable sync_state for SM8450.
- Improve enable_mask-based BCMs handling and fix some bugs.
- Add compatible string for the OSM-L3 on SDM670.
- Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors.
- Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have
  become ugly beasts with many different arguments.

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (64 commits)
  interconnect: Add debugfs test client
  interconnect: Reintroduce icc_get()
  debugfs: Add write support to debugfs_create_str()
  interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM
  interconnect: qcom: sm8350: Retire DEFINE_QBCM
  interconnect: qcom: sm8250: Retire DEFINE_QBCM
  interconnect: qcom: sm8150: Retire DEFINE_QBCM
  interconnect: qcom: sm6350: Retire DEFINE_QBCM
  interconnect: qcom: sdx65: Retire DEFINE_QBCM
  interconnect: qcom: sdx55: Retire DEFINE_QBCM
  interconnect: qcom: sdm845: Retire DEFINE_QBCM
  interconnect: qcom: sdm670: Retire DEFINE_QBCM
  interconnect: qcom: sc7180: Retire DEFINE_QBCM
  interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE
  interconnect: qcom: sm8350: Retire DEFINE_QNODE
  interconnect: qcom: sm8250: Retire DEFINE_QNODE
  interconnect: qcom: sm8150: Retire DEFINE_QNODE
  interconnect: qcom: sm6350: Retire DEFINE_QNODE
  interconnect: qcom: sdx65: Retire DEFINE_QNODE
  interconnect: qcom: sdx55: Retire DEFINE_QNODE
  ...
2023-08-24 14:00:14 +02:00
Krzysztof Kozlowski
440b075bd2 dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR".  Correct it
to keep consistent format and avoid copy-paste issues.

Correct also the format // -> .* in few Allwinner binding headers as
pointed out by checkpatch:

  WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
2023-08-23 15:00:31 -05:00
Duje Mihanović
3b99cd274e clk: pxa910: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used
by the respective device tree and thus needlessly bloats the ABI.

Move this number of clocks into the driver source.

Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-4-f9271bd7eaa5@skole.hr
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-08-22 14:14:17 -07:00
Duje Mihanović
87f06247e0 clk: pxa1928: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used
by the respective device tree and thus needlessly bloats the ABI.

Move this number of clocks into the driver source.

Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-3-f9271bd7eaa5@skole.hr
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-08-22 14:14:14 -07:00
Duje Mihanović
51fa6aa5c2 clk: pxa168: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used
by the respective device tree and thus needlessly bloats the ABI.

Move this number of clocks into the driver source.

Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-2-f9271bd7eaa5@skole.hr
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-08-22 14:14:06 -07:00
Duje Mihanović
46c13513a4 clk: mmp2: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used
by the respective device tree and thus needlessly bloats the ABI.

Move this number of clocks into the driver source.

Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-1-f9271bd7eaa5@skole.hr
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-08-22 14:13:45 -07:00
Arnd Bergmann
c708140e96 SoCFPGA DTS updates for v6.6
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions
 - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet
 - Add initial support for Agilex5
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmTg5+8ACgkQGZQEC4Gj
 KPRA7Q/8C6ugL9LlR5JEUruaAugaRnYL2BgotdwhMuCbU7d3oj+pFBzHR8PR/MCI
 CZXnLehpmwOkGz0K0QLey6nQuGZS18DK19DxJkL46hr69Rqpu8XHb2yPjiBtbh/o
 0ZwpxuRTKz1QbP9hprw/RIHSbZ/AWaI2O/90xicC0p1qWXmxSz0Kv6YOoQ61o/yO
 On91yS3R+75o1NoHD+FoKiPuwwTfaHc7TrS/UIshPKAuk6yo/Cd3Is5EdYL+5xEz
 kXDRkt2X3g7il/Jm9AOFJvA4Q1VLD9Ke4C9o9ePvj167GklaLnJ9JT8Qw7PGXaoE
 wolse2+bJA4a9acPbkYmYSSyyKtZnIgV5oTXFgeWQ0eo0qmoTNqgx6eMIOyRltxs
 3OTTvNyw9+ZOhW4YRv/lJWwDL3uMlKsMV/2JOSPua5V4kXrPi/A+HhIZGDll1Naf
 y+HYNoJiSrDAiNYwWglz4f4LR+xU3wc3cS4uLrAU+aCE+NHYAj/Jqn8/EC26NDbQ
 wVsPfQMQN9j0wCrMzZZf4LUEYM6C90ZeqUFqwB6mqctfAbT/fQyLdyKL8Gu/QrG0
 lhp2J4vb2UJ9eQ1zBoBtb6flcQegHP/ybmRM4Q5ep3LvVOHhilZT5mO8mj36q84g
 3Co2RqQ8oknTgmxTF93jguAW+JPtmfvwA66x+CetC0fSmSWN2HI=
 =OfJk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkFA0ACgkQYKtH/8kJ
 UiejLBAAnafzyrMqZnO6nc6hvK/7ONSN2QZqaYoZ0Ho6fSvz5KxqVqPjUq4EshEZ
 HB9kZ42YvJQZYyi8Pvd/7BIQe3WvwLZ6tW4NALoiMsfpL127wzfwJlDj5yOiltLu
 aZtwhRvRV7jHKlh06wh8eax3vd4P3ozR5DUufcCJp59xI8MTS2UYI6enrIoA2h06
 uC0xWhuEvseHdzYQbC2hAZlZA1Z/7BBYCJO5iKq5cdW0zHpy0h7h2k3ba2M2BsZM
 JtaIIyrjjF70nmydNY9UfHt0iU3u5InbZ7GdJEc9kkGsbB4fLiSUdn8ScPXShXaY
 W4qhsLQ9DhyDlkb+xmzkt2FRH9gh98xe2Ej4CmZM/4X3Xc/g+kquGZ4kHllNHJK5
 AWodtDcrio3V7eCmiGerSBdvChr6pB31qVpuaCaiuCr+OpPZGdj/Z2c0qjCDo9h6
 Pn8sH8jVgye3AQ30NmSrpJz12tN/H86BeiW59eFeJ3jRXi8qx7oMyyuLVNDzo+sF
 6EkydHcSNrl0HF2gKQRSFMLvYfaYUZFBA/iSycrn24UjKc86DWd3aGbcofQSbJOV
 WeZAODlghXX9/R6yVKf4Vt/O6m3Lb2xreCilkIKJD5wpdQAu8hz7NXJAMtNJY1ed
 MKASPnHm1jP6Is/6acr5pDYFpbG3HOsyOxpzNQYRVHEFElMxQSk=
 =mFST
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.6
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions
- Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet
- Add initial support for Agilex5

* tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA
  dt-bindings: clock: add Intel Agilex5 clock manager
  dt-bindings: reset: add reset IDs for Agilex5
  dt-bindings: intel: Add Intel Agilex5 compatible
  arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb"
  arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions
  arm64: dts: agilex/stratix10: Updated QSPI Flash layout for UBIFS
  arm64: dts: agilex/stratix10/n5x: fix dtbs_check for rstmgr
  arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node
  arm64: dts: socfpga: stratix10: fix dtbs_check warning for usbphy
  arm64: dts: socfpga: agilex/stratix10: fix dtbs_check warnings for sram

Link: https://lore.kernel.org/r/20230819161418.931258-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-21 21:49:00 -04:00
Arnd Bergmann
6522fbd48a Qualcomm ARM64 DeviceTree updates for v6.6
Initial support for the SM4450 platform and the QRD device thereon is
 added.
 
 The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.
 
 A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based
 LEDs and buttons.
 
 On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.
 
 On MSM8916, the D3 camera mezzanine is improved and refactored out to
 its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with
 charger, while Samsung Galaxy J5 and E5 gains touchscreen support.
 
 A few fixes for MSM8939 are introduced, and initial support for Samsung
 Galaxy A7 is add.
 
 Support for scaling the cache bus fabric is introduced on MSM8996. A
 missing interrupt for the USB2 controller is added. The touchscreen vio
 supply on Xiaomi Mi 5 is corrected, and a few other cleanups are
 introduces across other devices.
 
 The display controller is introduced for MSM8998, a few clock fixes are
 introduced and missing power domains are added for the multimedia
 subsystem iommu.
 
 Reserved memory-regions and reserved GPIO lists are updated for the
 QDU/QRU1000 IDPs.
 
 USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is
 enabled for the RB2.
 
 PCIe and Ethernet support is introduced on SA8775P, and enabled for the
 Ride board.
 
 On SC7180 the PSCI integration is refactored, to allow supporting
 devices with the Qualcomm firmware. BWMON is introduced, alongside the
 CPUfreq-based bus voting.
 
 A number of fixes are added for SC8180X, on the Primus and Lenovo Flex
 5G devices pmic_glink is introduced and wired up, to provide support for
 external display.
 
 Missing SCM interconnect is added to SC8280XP, and the PDC is marked as
 wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is
 corrected and a few regulators are renamed to align with schematics. The
 Lenovo Thinkpad X13s gains camera activity LED and a set of previously
 reserved GPIOs are released. The SA8540P Ride platform gains RTC
 support.
 
 For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced
 and wired up as wakeup-parent of the TLMM.
 
 On SDM845 the UFS controller gains interconnect path description,
 power-domain information is added to GCC and minimum frequency of the
 UFS ICE is corrected. On RB3 continuous splash memory region is
 described, and the camera subsystem is enabled. On the Lenovo Yoga C630
 a missing power supply for the display panel is added, and the debug
 UART is introduced.
 
 SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75
 PMIC is described and added to the IDP.
 
 GPU description is added to SM6115, and together with display enabled on
 the Lenovo Tab P11.
 
 On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU
 is added, and the PDC is registered as wakeup-parent of TLMM.
 
 L3 cache scaling is introduced on SM6375.
 
 The DSI PHY compatible and an interrupt for I2C7 are corrected for
 SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.
 
 On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node
 gains interconnect paths, SMMU is marked as DMA coherent and dynamic
 power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line
 names are updated.
 
 On SM8350 missing cluster sleep states and LMH interrupts are added,
 the CPU compatibles are corrected and APR and LPASS pinctrl support is
 introduced. The HDK gains uSD card support and PMK8350 is added.
 
 For SM8450 support for RNG and RPMh stats are added, the ICE handling is
 extracted from the UFS node and the display subsystem gains a missing
 interconnect path. Thermal description is improved for the HDK.
 
 On SM8550 MTP and QRD the pmic_glink is introduced, to provide
 DisplayPort output. A missing regulator supply is also added.
 
 A few platforms that happens to share the RPMH power-domain resource
 identifier constants are migrated to new generic defines. ADC channel
 names are generalized on various PMICs.
 
 A variety of devices gain chassis-type, and the GIC_SPI constant is
 replacing the 0 across a few different platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTgOtYVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fr20P/jDKWelSMYqeVFfa49XGXyvRwWmf
 TaSb8IlD9cqQ3ScFYwmJGf2gVqt7zBfGU2EoxkMbpFeGjyZZYpw86Y3fvU1A5oxy
 TQ++kBQAvuSGEUqdGE7Xv6lIUmKPyVmcayRpI6IgGI5iaU1y5bI6xmh3bjhL//NQ
 mcsH11SLPPvDyZ608Etvw1rNtPImSI8nOucaBSlmnkxT1NuzIjPhNG+rNwgBSBHU
 O8sKi80hYrVw78sR3sXH+cBCCMhkFg377maCo9ZE14TFdAT3Ggn2uXX01PXCvn1z
 cO/wFAZ5vOe4KU1+maWkvOsEOCqjghdFUoVK7e9xtMpeuhoXjAuFf1L26d02mOK3
 I48/apsj8ak/kmC89eo1RrOWniytI+YGPZwd5wYIOh0Q2oS8+IpC0nZhm9V86IIU
 DoWxbdf0TZ++e3D232AftFqKutbL9utJanq9l34zmI50F7QK4BSbBRKT81pRTrml
 y4tR7bukrGYKVRq3Kpf5vyWwPEpYIfZ7o9k6J56IcaLoaMvctW/vcnf8R0Qr5gJb
 3vHUEBsozERKd2NcFw9g1Ay86DbAxC+3wyfHHMWgolA7fYCNVSXN6R6hKXb6d503
 6ORnP4U6NjxpibIXC3jj+zmvbUM/GhSgrw3yErPb83n9P9pJ5Aw2+6J+Xmt75U5z
 9hyHUWkbhyNQqBVA
 =uK0C
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkEYEACgkQYKtH/8kJ
 Uie31xAAvhedx3cixHT570K/qxw8tTM06btXNhEek+/oMiW5eCcGKCRW5ixcpPog
 9sLGI4xt5aMVdJshIYWovCDpCQWCoSYiqFx9N2/2zF+DrXYjeKNCpU6oVcPh1MG7
 Xm5Fy2s99BipT6z6ha5kqeirdgjH+po8Jtkw54AfROzJa2oTD6GBvsPtxxW3CYgJ
 lDoHTvU59gwl1Dk60FIkc2slyA57VqqRuVLAmurgO2nGOFU9FODb/lNuMIh8AeKt
 +scXrEVozQPDeefSCbKTqROBvIuYyMbXmFHLW+VmM9EgXnOcV2IEVOSZCiMYi9Ic
 RWpfOHVAn9xM/zFhHh23onJPUrISwcJv05A1PU92WFNWh7uoly67KD712gPStwmd
 /rKI25DPk3Z7nc7LwzO5VqovOpU9Q0t+/NDOLiRn1A8/hljqVMhq8eTo9AY9sBJN
 EW5AZw1KUzrXH+9RQsNKDAJckpfgDaI8sB+ueXOZMHHhhKaugMILp/PgpN6isQZu
 G7ZkJadpQBliJ3pvsHpK6JlXcJoB4TafIx7pJPDCHbAFOnMhCmEUPW7TX36n0uQ3
 4d/ghMENBmDWkmZGlFLtl7SfKNmuT/HQhcG75QZxqPiw/uhRGepNaswqtkpMMeFD
 Vl+spE5wosXSG8Ra2W/UJfNfEKYL1TKevPwJXZWmT9WUehMSG+U=
 =zUL1
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DeviceTree updates for v6.6

Initial support for the SM4450 platform and the QRD device thereon is
added.

The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.

A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based
LEDs and buttons.

On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.

On MSM8916, the D3 camera mezzanine is improved and refactored out to
its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with
charger, while Samsung Galaxy J5 and E5 gains touchscreen support.

A few fixes for MSM8939 are introduced, and initial support for Samsung
Galaxy A7 is add.

Support for scaling the cache bus fabric is introduced on MSM8996. A
missing interrupt for the USB2 controller is added. The touchscreen vio
supply on Xiaomi Mi 5 is corrected, and a few other cleanups are
introduces across other devices.

The display controller is introduced for MSM8998, a few clock fixes are
introduced and missing power domains are added for the multimedia
subsystem iommu.

Reserved memory-regions and reserved GPIO lists are updated for the
QDU/QRU1000 IDPs.

USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is
enabled for the RB2.

PCIe and Ethernet support is introduced on SA8775P, and enabled for the
Ride board.

On SC7180 the PSCI integration is refactored, to allow supporting
devices with the Qualcomm firmware. BWMON is introduced, alongside the
CPUfreq-based bus voting.

A number of fixes are added for SC8180X, on the Primus and Lenovo Flex
5G devices pmic_glink is introduced and wired up, to provide support for
external display.

Missing SCM interconnect is added to SC8280XP, and the PDC is marked as
wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is
corrected and a few regulators are renamed to align with schematics. The
Lenovo Thinkpad X13s gains camera activity LED and a set of previously
reserved GPIOs are released. The SA8540P Ride platform gains RTC
support.

For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced
and wired up as wakeup-parent of the TLMM.

On SDM845 the UFS controller gains interconnect path description,
power-domain information is added to GCC and minimum frequency of the
UFS ICE is corrected. On RB3 continuous splash memory region is
described, and the camera subsystem is enabled. On the Lenovo Yoga C630
a missing power supply for the display panel is added, and the debug
UART is introduced.

SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75
PMIC is described and added to the IDP.

GPU description is added to SM6115, and together with display enabled on
the Lenovo Tab P11.

On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU
is added, and the PDC is registered as wakeup-parent of TLMM.

L3 cache scaling is introduced on SM6375.

The DSI PHY compatible and an interrupt for I2C7 are corrected for
SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.

On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node
gains interconnect paths, SMMU is marked as DMA coherent and dynamic
power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line
names are updated.

On SM8350 missing cluster sleep states and LMH interrupts are added,
the CPU compatibles are corrected and APR and LPASS pinctrl support is
introduced. The HDK gains uSD card support and PMK8350 is added.

For SM8450 support for RNG and RPMh stats are added, the ICE handling is
extracted from the UFS node and the display subsystem gains a missing
interconnect path. Thermal description is improved for the HDK.

On SM8550 MTP and QRD the pmic_glink is introduced, to provide
DisplayPort output. A missing regulator supply is also added.

A few platforms that happens to share the RPMH power-domain resource
identifier constants are migrated to new generic defines. ADC channel
names are generalized on various PMICs.

A variety of devices gain chassis-type, and the GIC_SPI constant is
replacing the 0 across a few different platforms.

* tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits)
  arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
  arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Add PDC
  arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen
  arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration
  arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED
  arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins
  arm64: dts: qcom: msm8998: Add DPU1 nodes
  arm64: dts: qcom: msm8996: Fix dsi1 interrupts
  arm64: dts: qcom: sdx75-idp: Add regulator nodes
  arm64: dts: qcom: sdx75: Add rpmhpd node
  arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75
  arm64: dts: qcom: Add pmx75 PMIC dtsi
  arm64: dts: qcom: Add pm7550ba PMIC dtsi
  arm64: dts: qcom: Add pinctrl gpio support for pm7250b
  arm64: dts: qcom: sdx75: Add spmi node
  arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU
  ...

Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-21 21:38:09 -04:00
Arnd Bergmann
aa2951a8fa STM32 DT for v6.6, round 1
Highlights:
 ----------
 
 - MCU:
   - Add CAN support on stm32f746.
   - Add touchscreen support (edt-ft5306) on stm32f746-disco.
   - Add support to Rocktech RK043FN48H display on stm32f746-disco
     board.
   - Add gpio-ranges for stm32f7 to fix boot issue.
 
 - MPU:
   - STM32MP13:
     - Remove shmem for scmi-optee to match with OP-TEE configuration.
     - Enable OP-TEE asynchronous notification by using PPI#15.
     - Expose and use SCMI regulators on stm32mp135f-dk.
 
   - STMP32MP15:
     - Remove shmem for scmi-optee to match with OPTEE configuration
     - Deduplicate DSI node to fix  #address-cells/#size-cells issue on
       boards using it.
 
   - ST:
     - Fix dts check warnings on stm32mp15-scmi boards.
 
   - DH:
     - Add missing detach mailbox for DHCOM and DHCOR SoM.
 
   - Odyssey:
     - Add missing detach mailbox for Odyssey SoM.
 
   - OCTAVO:
     - Add Linux Automation Test Automation Controller (LXA TAC) based
       on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
       DSA-capable ETH switch (2 ports), dual CAN...
       It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
       on STM32MP157.
 
   - PROTONIC:
     - Add Power over Data Line (PoDL) Power Source Equipment (PSE)
       regulator nodes on PRTT1C board. It allows power delivery and
       data transmission over a single twisted pair.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmTcvuwdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX3PBAArwKHu/t6Usb2odz2
 D0oWgN4sxsfBa65L5+VnPg590Abzt0qhzFDwnNo53vyxzl1LRAYDqowrQyaKi38o
 5T8I+AKRtOtRd1tPBNt8/VooVWShLOI9FhtLyACv1YHaqRfhd3EG4rujIEiCfkS+
 K9kBvEJO/WWbQmxU2s4kZxP61itiOyiLmv8wMcUecW6mL3fGwuTh2QND2hdYLHU9
 bjmDBHEovyOLMa5A7Lzuu3ALDX4h1GdMdVEnr7HNM5bunzGV5Ao4e8mVkszFlheB
 8JBCodKXxzBVWkZAF6vPq0ne8rcPpgdjdZgSinWNE8CrTXZDuOXADrvtiCPcavJP
 Mq0NaOyDxglaCQlk4D3yv1iia82KXubMKtZ3QgE8yQzidCAFU1XlNyTywIr+aFBI
 ggIlcXxyRWjsqBwTYo6PRo6fSKin3toUjSdMnTLAp3Eha0JqD/QCKaVXfuzeV2WV
 gbEH5BDAtBnj7EW9zWoTGyqOLwwPBr2kBHca2ZykPK61/Gyn8gi8nW1QsW4ZpUVA
 DMH2ljRIZOvkCdndwCOfkHS07rNDgyDi7e1UhAL17sCVp+kl0hJ+apcDRZp16csc
 8/8Dk+dn8TVmb10e/DTDtUey65yyqJ5/uGyxM3ABJI0ZghKqEifU+oMhTzkMuZJW
 I6tXAwAwgA53t4qdEvOqZ6I6uxE=
 =oGBN
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkDoMACgkQYKtH/8kJ
 UifXZxAAsKv/CVDDEvDvKxdnwRlsf0OzMV2RkgRwo0h0bzyMx5B57UaR7lUg/e/Y
 nDK/rNvTr4L+ABJZh/1DkNE6pI406vK1BUwD2KPbbYAqcSzT3u3EztEsPmG7AvBJ
 T2mkaa8d1SVHcjmRLhPt/wVOf7otpKsrOgYMPvaErAA42yvdcJrAndtUFITwW3QQ
 6X89pudY1kDw56d8yTaP6U3BcDHFYxr8ZA9iy+Ll+qUk9UfNe/5HP3xh/mbC/SA/
 NpEB9Dl14gwDEkhV56Y02nSIQxvf+UqJ6c/HZgb/472SYxKCQsQluDe0UWoPi09L
 9NKTVQEsB76HXgNsYo+PhyT0tfzduClVil6FCzMdr+VyV131mJQ4K82KO3NW7MIh
 bQsywD3VBB96dq+IDBj+xXFzwZS6QcvOICQnCwd+e9NnDmHzfTbU8KdELChbHbbg
 Cpy6NjQPV3YSF1bXlXGo0Pa2dy4XCuPKe7/eOabcVr7te6Qdo5PcAaAtfTaWwz0D
 7sX8WHVNzvqpf4yCkpuwTh875Svsu/5xlxv8yZJ1lIFlA0K5n8UhHjgXS8YnehCt
 7SA6pC2NoE68quNk6WZNh5czsmlG0r0eNSx1jr/Pv4SJB1d3d07tKuGqHIcA80oH
 N81pTRkOK66Afw2EIH1DAMxNs0xbAWRSZ4H1hdxlL5LAnF5gODk=
 =fz66
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.6, round 1

Highlights:
----------

- MCU:
  - Add CAN support on stm32f746.
  - Add touchscreen support (edt-ft5306) on stm32f746-disco.
  - Add support to Rocktech RK043FN48H display on stm32f746-disco
    board.
  - Add gpio-ranges for stm32f7 to fix boot issue.

- MPU:
  - STM32MP13:
    - Remove shmem for scmi-optee to match with OP-TEE configuration.
    - Enable OP-TEE asynchronous notification by using PPI#15.
    - Expose and use SCMI regulators on stm32mp135f-dk.

  - STMP32MP15:
    - Remove shmem for scmi-optee to match with OPTEE configuration
    - Deduplicate DSI node to fix  #address-cells/#size-cells issue on
      boards using it.

  - ST:
    - Fix dts check warnings on stm32mp15-scmi boards.

  - DH:
    - Add missing detach mailbox for DHCOM and DHCOR SoM.

  - Odyssey:
    - Add missing detach mailbox for Odyssey SoM.

  - OCTAVO:
    - Add Linux Automation Test Automation Controller (LXA TAC) based
      on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
      DSA-capable ETH switch (2 ports), dual CAN...
      It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
      on STM32MP157.

  - PROTONIC:
    - Add Power over Data Line (PoDL) Power Source Equipment (PSE)
      regulator nodes on PRTT1C board. It allows power delivery and
      data transmission over a single twisted pair.

* tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits)
  ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
  ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
  dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
  ARM: dts: stm32: support display on stm32f746-disco board
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
  ARM: dts: stm32: add pin map for LTDC on stm32f7
  ARM: dts: stm32: add ltdc support on stm32f746 MCU
  ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl
  ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl
  ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge
  ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property
  ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi
  ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM
  ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM
  ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM
  ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon
  ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes
  ARM: dts: stm32: add touchscreen on stm32f746-disco board
  ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
  ARM: dts: stm32: re-add CAN support on stm32f746
  ...

Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-21 21:25:23 -04:00
Arnd Bergmann
9eb33ddedd Qualcomm driver updates for v6.6
Compatible and clock handling in the Qualcomm SCM driver is cleaned up,
 together with a couple stylistic cleanups and transition to mark
 exported symbols GPL only.
 
 An abstraction for the RPM subsystem is introduced, to make align the
 structure of the SMD and GLINK nodes thereof with the structure when a
 remoteproc is involved. This is done to facilitate associating
 additional entities with the RPM subsystem.
 
 The qmp_send() API is modified to not expose hardware requirements onto
 the client drivers, and then further extended to allow command
 formatting directly in the API, to facilitate this typical use case.
 
 In the Qualcomm Command DB driver, NUL characters previously included in
 identifiers are dropped from the debugfs, to facilitate scripting.
 
 The thresholds of the BWMON driver are simplified to avoid hard coded
 starting values.
 
 The OCMEM driver is updated with some cleanups and fixes, and addition
 of MSM8226 support.
 
 PMIC_GLINK gains support for retimer switches, safe mode is selected
 when the cable is disconnected from altmode and the same is enabled for
 SM8550.
 
 An off-by-one string length check is corrected in the QMI encoder
 decoder library.
 
 The RPMh tracepoints are extended to include the state of the request,
 to provide needed context in the traced events.
 
 The series from Ulf creating a genpd framework is integrated, to
 facilitate the other changes to the cpr, rpmpd and rpmhpd driver.
 SDX75 support is added to the rpmhpd driver, and the rpmpd driver is
 extended with the same sync_state logic found in the rpmhpd driver.
 
 The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019
 platform is dropped.
 
 Clock handling in the GSBI driver is cleaned up with the use of
 devm_clk_get_enabled().
 
 The list of VMIDs defined for the SCM assign memory interface is
 extended.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTe2FIVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FPaYP/0j7dGziE/KQaTccT/arpgiU6wH/
 fzu7j76r/JY90Jw61vxWsTfuR94Irr8/NzzvLXMO1cKfzJXxsPKqYuuWBe/hFu3u
 Bva/4XtHspitKQCvBYOhX2dxj3BtYzsrVNmh3sOeEKhXcUaVuCQXkpeE3fqNBwYB
 li70t/dHVPPr2mDY30QhD9nn8XgWG8DlSzyuvIp+zI8kpNX04Cdqg2BEidB8GO4f
 ZgcAtnCIssIojBhRwVO7ei8RnGu6i2+69Vwtrx8nNT85Wcyx7NLxjZfp7+5PrZnv
 Xyu/JO4yYZooEVMAOtXJcxbZRs3FmGovg5RnR5w1CIz87Kmw5Wq0g9wZHMuLxC/G
 u4SzwjCqwEhAVWSzsVmicLOs4y2Ndwju3ojX3kLPh02yw5xo6BpxXdZIptTvVIQn
 DicTCaHU3QxxqkH7elLxNxyRYvmJbDbwKJ/hZjSRWSsJUhI4fvWoyrL6wNZ9+rTW
 1zCkfEH3XikjMGHweeZc+VYu03XyohIYYn+jxpdwOjajF+3BsQSiqN1tKwj71ci/
 Nk6sn+TRsq/jY6x33ULfbQCjeQ3BOGEngHTQ8N1i5D1vM2BUY/jrH6Dt1tIUdRjh
 avR2KvZzzPs7Cp/094aQDX42GcQKeVOit6pF+NhE0c2uVqQCB5c6ynZwcvt0YNS9
 Ty0mqIn99wgbHxVw
 =SEyF
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkC1sACgkQYKtH/8kJ
 UifjiBAAnIlToZQERPaKlX1zQTYVfrMiyNQ8fyUGLnAj0bNFWFzYgS6p5NXerxdT
 /sk2tipNqJyym3h797r2aAjAXpyTnKYIwZqGjvWGBbhaViv6ovuDYkJUBk0ffybB
 a0Ve4M1JnVZATiwqeoZwi6/1/M2JC3+20O+LRL4lWzZAm61NsU4ULAcX4sHeUYYA
 02wMfzkME0Ye7sthv9GBtbm8Szr+GEuDvUTXx0DI74QrZuj6+wl3rjZ2uRrT97ZX
 DuPtmhl2ZVjCigCsfxdj2J8eq8dpkROAzAeGa9d/NctkCV+dHhSEWZ0LraauLCJk
 iXA2ZXOACHWF4tn8TC/eDx0Pv6CS+gRVjyYYLNkWreDSPfk7Vqaua3iNc7AfhIJV
 hfJV1QhDmRt+pXi8pJQSSbTtjfzaURzD78N7JLMRZdZPozRwD/kl1+m/r5OMT4C+
 NI4cLB544Zb34WEUgjZYNUjk18vkZmEQnvWwAGIzOQgHq5m/m6o2QQOnTgiTwaXh
 Neh8k+KKt85IwkjFarwmKsLhajHezHIEqgHrGdfiIFr9+hAMPBIgUP3/eo6PFDNk
 XP+IVMeucEtn7Og6d6rQmJ0kPvL32ucdXWdqOwLijoDablFwX1Giif77LjN5LRYj
 IxReK7C8CwZKqLf2k0pv8dLE4g8On6OThveedXbLNuMx+EgcB2w=
 =RpyB
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.6

Compatible and clock handling in the Qualcomm SCM driver is cleaned up,
together with a couple stylistic cleanups and transition to mark
exported symbols GPL only.

An abstraction for the RPM subsystem is introduced, to make align the
structure of the SMD and GLINK nodes thereof with the structure when a
remoteproc is involved. This is done to facilitate associating
additional entities with the RPM subsystem.

The qmp_send() API is modified to not expose hardware requirements onto
the client drivers, and then further extended to allow command
formatting directly in the API, to facilitate this typical use case.

In the Qualcomm Command DB driver, NUL characters previously included in
identifiers are dropped from the debugfs, to facilitate scripting.

The thresholds of the BWMON driver are simplified to avoid hard coded
starting values.

The OCMEM driver is updated with some cleanups and fixes, and addition
of MSM8226 support.

PMIC_GLINK gains support for retimer switches, safe mode is selected
when the cable is disconnected from altmode and the same is enabled for
SM8550.

An off-by-one string length check is corrected in the QMI encoder
decoder library.

The RPMh tracepoints are extended to include the state of the request,
to provide needed context in the traced events.

The series from Ulf creating a genpd framework is integrated, to
facilitate the other changes to the cpr, rpmpd and rpmhpd driver.
SDX75 support is added to the rpmhpd driver, and the rpmpd driver is
extended with the same sync_state logic found in the rpmhpd driver.

The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019
platform is dropped.

Clock handling in the GSBI driver is cleaned up with the use of
devm_clk_get_enabled().

The list of VMIDs defined for the SCM assign memory interface is
extended.

* tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (52 commits)
  soc: qcom: aoss: Tidy up qmp_send() callers
  soc: qcom: aoss: Format string in qmp_send()
  soc: qcom: aoss: Move length requirements from caller
  dt-bindings: firmware: qcom: scm: Updating VMID list
  dt-bindings: qcom: Update RPMHPD entries for some SoCs
  soc: qcom: qmi_encdec: Restrict string length in decode
  soc: qcom: smem: Fix incompatible types in comparison
  soc: qcom: ocmem: add missing clk_disable_unprepare() in ocmem_dev_probe()
  soc: qcom: socinfo: Add SoC ID for SM7125
  dt-bindings: arm: qcom,ids: Add SoC ID for SM7125
  dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID
  soc: qcom: socinfo: drop the IPQ5019 SoC ID
  soc: qcom: socinfo: add SM4450 ID
  dt-bindings: arm: qcom,ids: add SoC ID for SM4450
  soc: qcom: pmic_glink: enable altmode for SM8550
  soc: qcom: pmic_glink_altmode: add retimer-switch support
  soc: qcom: pmic_glink_altmode: handle safe mode when disconnect
  soc: qcom: rpmhpd: Add SDX75 power domains
  dt-bindings: power: qcom,rpmpd: Add compatible for sdx75
  genpd: Makefile: build imx
  ...

Link: https://lore.kernel.org/r/20230818023338.2484467-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-21 21:11:55 -04:00
Etienne Carriere
fe95052fc7 dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
Adds SCMI regulator identifiers for STM32MP13x family.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-08-16 10:58:41 +02:00
Robert Marko
268edfe96a dt-bindings: clock: qcom: ipq4019: add missing networking resets
Add bindings for the missing networking resets found in IPQ4019 GCC.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230814104119.96858-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-15 09:31:10 -07:00
Krzysztof Kozlowski
b3f9581aff dt-bindings: clock: samsung: remove define with number of clocks
Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously.  Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.
Remove it entirely from the bindings, once Linux drivers stopped using
them.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20230808082738.122804-12-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-08-15 07:50:15 +02:00
Arnd Bergmann
99355a235a TI K3 device tree updates for v6.6
New Boards:
  - TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
  - TI's AM62P5 Starter Kit (SK)
 
 New features:
 AM625:
  - Support for Display (parallel only) - hdmi+audio support for
    AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
    for verdin.
  - MCU MCAN support and enable of Toradex Verdin
  - Toradex Verdin Dahlia audio support
 AM62A7:
  - MCU MCAN support
  - Enable USB Dual Role Device(DRD) support for AM62A7
    Starter Kit(SK).
 AM64:
  - TQ group's tqma64xxl: Overlays for SD-card and wlan.
 J721E:
  - Main domain CPSW9G and correponding gateway/ethernet
    switch expansion - GESI board.
 J721S2/AM68:
  - New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
  - Main domain CPSW2G and correponding gateway/ethernet
    switch expansion - GESI board.
 J784S4/AM69:
  - Boot phase tag marking in device tree
  - UFS support
 
 Cleanups and non-urgent fixes:
  - Cosmetic style fixups around "=" and "{" whitespace usage.
  - Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
    bindings
  - Serdes header file include/dt-bindings/mux/ti-serdes.h is now
    deprecated, use k3-serdes.h in soc dtsi folder.
  - All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
    board level.
  - Fixups for AM62: Crypto powerdomains are conditional to better
    represent control of the crypto engines by security controller.
  - Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
  - Fixups for j721s2/am68: pimux offsets for OSPI.
  - Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
    ranges for wkup/main gpios
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmTaSUYACgkQ3bWEnRc2
 JJ2ItQ/+KX09s67fsGuQn6G2lqoLujlPSKbQn3ygFJt/Oeo+cchqcpPg7PKsdHDq
 2vpC1crLE3aYfqFqFj0LJvG6KNf1cWmNFLXyE0Ek4h4o73vq0EjXybAUrc/cme8l
 TZ/1o938idoM9HvA1zz71KLA6cI5qbYzHHAjVq4Gp0bLiynsLLLY7mGgo4HC45Ii
 67EEWiNvNNfY9QpMNEJB2VCZ1xto83nwUgimEdJZ7pStfUtjB+r1lDfJgZg0v5Ay
 QOiTQyAtTbpBuYL53jRjiF64VAnDTN//uv1/mdfnJ82ltfdZJ79FI0xGUqVusD9t
 lHPdPicGNgtUyIFJsvNJMRQKtrVpV57C2e5ECHMzWNWyIMOylbz9Zc7eGrgB41fi
 qS8QkkJ2+MUd/I3HSuAWoSFIfjmq7Z0dsHyOFntZrSypEai217S+rJgZ/kmdorz5
 TQzqSacXjmxM4yNjJCamLQEK5KEib6Gtq4gLZMPvoc1kvnSHv6lY34/lm9mJBxZx
 +L1qONX0km5rTjaRm0TvqUR19WoFl5fWIyempidRf2TCVeH98Je5AdQgftM7Pk9M
 1Rwxob76+Tq7oL4H5/eqX+ye+k/k1wqoxEBsOLEju65/aSVxYqEiPb+kr99BaV7n
 pIBtDkiV7KfsrgxwjAlr+JPIY4v6We9+W6dE4HyCF4HOrmk+I+I=
 =Ifxz
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTaoA4ACgkQYKtH/8kJ
 UieETQ//aDZ9Gwo8JqcShhrKLGglRZ2D9me0QjFr/qhk4UQv6ip/DA9usNUKc3DH
 PC/fEfryQt2lmiTouWjfYdO4rhThqtpzk96CYsjvHLpkOoJYut/xVcNTJbIfHn+e
 GK84s9V44ARANwPNse3S0qXM8AFxv55STHu0tOxDNHz2h6lOiYv8OvwMyZyuw8MQ
 IYQ6jRAir/a0zqC/w3NC+famjNdZesvZbQOxD94ieC68RWtIrpnPv6Yc0Fq8xAvf
 0/lS8dtllOpHdjqpJuBSeCD0KrndpT1sP4++URsjujvKa9pQag8r+4CSbr2HVL01
 FCL4aXcKY62yQM7RWWRA1KdGS/yXp/9Yu9CPYuLx7GYVDr4mBEDj78oA+SaGdlFK
 MZ88vd9w1MamJqJWIRavFep29++yE+GhF54f88hZAII5k4MN3+sgj+5v37hoaR8m
 MomtlRKfxKz7UungBZrAQZqbliSbnCFra4h9R7BbwEcOLxkw1xkRE9HbjvVSNcGK
 o3yiM2xCX9ZWcWE7dsURCo6incqFPb5WOQstAzmSm2krAY2BBxn+lBTMH40RxCZ7
 bbDM+OT0SBxL27F9oFPAUMnu3mqXUjEr/jF5ELAYO8S8sOQ1zQxpR0ry4m9EJJI3
 YgLKGcCDWrVCVMV7i1K4k6ah+wfOdd0dPIF4UeC2ztyEriZ0aY8=
 =namZ
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt

TI K3 device tree updates for v6.6

New Boards:
 - TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
 - TI's AM62P5 Starter Kit (SK)

New features:
AM625:
 - Support for Display (parallel only) - hdmi+audio support for
   AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
   for verdin.
 - MCU MCAN support and enable of Toradex Verdin
 - Toradex Verdin Dahlia audio support
AM62A7:
 - MCU MCAN support
 - Enable USB Dual Role Device(DRD) support for AM62A7
   Starter Kit(SK).
AM64:
 - TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
 - Main domain CPSW9G and correponding gateway/ethernet
   switch expansion - GESI board.
J721S2/AM68:
 - New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
 - Main domain CPSW2G and correponding gateway/ethernet
   switch expansion - GESI board.
J784S4/AM69:
 - Boot phase tag marking in device tree
 - UFS support

Cleanups and non-urgent fixes:
 - Cosmetic style fixups around "=" and "{" whitespace usage.
 - Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
   bindings
 - Serdes header file include/dt-bindings/mux/ti-serdes.h is now
   deprecated, use k3-serdes.h in soc dtsi folder.
 - All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
   board level.
 - Fixups for AM62: Crypto powerdomains are conditional to better
   represent control of the crypto engines by security controller.
 - Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
 - Fixups for j721s2/am68: pimux offsets for OSPI.
 - Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
   ranges for wkup/main gpios

* tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (68 commits)
  arm64: dts: ti: verdin-am62: Add DSI display support
  arm64: dts: ti: Add support for the AM62P5 Starter Kit
  arm64: dts: ti: Introduce AM62P5 family of SoCs
  dt-bindings: arm: ti: Add bindings for AM62P5 SoCs
  arm64: dts: ti: k3-am69-sk: Add phase tags marking
  arm64: dts: ti: k3-j784s4-evm: Add phase tags marking
  arm64: dts: ti: k3-j784s4: Add phase tags marking
  arm64: dts: ti: k3-am625-beagleplay: Add HDMI support
  arm64: dts: ti: am62x-sk: Add overlay for HDMI audio
  arm64: dts: ti: k3-am62x-sk-common: Add HDMI support
  arm64: dts: ti: k3-am62-main: Add node for DSS
  arm64: dts: ti: k3-am62x-sk-common: Update main-i2c1 frequency
  arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
  arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level
  arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
  arm64: dts: ti: k3-*: fix fss node dtbs check warnings
  arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
  ...

Link: https://lore.kernel.org/r/20230814160651.frxohyshd2evp2k4@expenses
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-14 23:43:42 +02:00
Marco Felsch
35ec2abb54 dt-bindings: clocks: imx8mp: make sai4 a dummy clock
The hardware don't have a SAI4 instance so remove the define. Use a
comment to keep it as reference and to avoid confusion.

Fixes: 1088691447 ("dt-bindings: imx: Add clock binding doc for i.MX8MP")
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.kernel.org/r/20230731142150.3186650-2-m.felsch@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-08-14 12:31:33 +03:00
Shengjiu Wang
a70cd8cdf7 dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
Add the clock dt-binding file for Audio Clock Mux. which
is the IP for i.MX8QM, i.MX8QXP, i.MX8DXL.

Add the clockid for clocks in header file.

The Audio Clock Mux is binded with all the audio IP and audio clocks
in the subsystem, so need to list the power domain of related clocks
and IPs. Each clock and IP has a power domain, so there are so many
power domains.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1690260984-25744-2-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-08-14 12:27:52 +03:00
Otto Pflüger
593576a369 dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of
GPLL0_EARLY.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230802170317.205112-2-otto.pflueger@abscue.de
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 20:20:10 -07:00
Imran Shaik
df873243b2 dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
Add support for GCC_GPLL1_OUT_EVEN and GCC_DDRSS_ECPRI_GSI_CLK clock
bindings for QDU1000 and QRU1000 SoCs. While at it, update the
maintainers list.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230803105741.2292309-2-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 20:13:17 -07:00
Bjorn Andersson
9328ecb29d Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into arm64-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants for use in the
MSM8998 DeviceTree source.
2023-08-13 19:51:26 -07:00
Bjorn Andersson
9d1f3f343b Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into clk-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants through a
topic branch to make them available to the DeviceTree source tree as
well.
2023-08-13 19:49:57 -07:00
Konrad Dybcio
238e192bed dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's
2-divided and one that runs at the same rate as the GPLL0 itself.

Add the missing ones to the binding.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 19:49:47 -07:00
Gokul krishna Krishnakumar
f9eac7e029 dt-bindings: firmware: qcom: scm: Updating VMID list
Adding the full list of VMID's, which are used by different clients to
pass to the secure world.

Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230403204455.6758-1-quic_gokukris@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11 13:10:59 -07:00
Bjorn Andersson
c02a547da3 Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into arm64-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
2023-08-11 10:51:15 -07:00
Bjorn Andersson
2f6be35d7c Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into clk-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
2023-08-11 10:50:07 -07:00
Sricharan Ramabadhran
f62d184ef7 dt-bindings: clock: Add IPQ5018 clock and reset
This patch adds support for the global clock controller found on
the IPQ5018 based devices.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11 10:46:59 -07:00
Neil Armstrong
40fb677285 dt-bindings: clk: axg-audio-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every axg-audio-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-14-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
09d65c0267 dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every A1 pll ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-13-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
57049a1cfc dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every A1 peripherals ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-12-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
165a194195 dt-bindings: clk: meson8b-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every meson8b-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-11-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
6655744d9a dt-bindings: clk: g12a-aoclkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every g12a-aoclkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-10-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
b1262497a2 dt-bindings: clk: g12a-clks: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every g12a-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-9-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
8fdbdc7918 dt-bindings: clk: axg-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every axg-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-8-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:17 +02:00
Neil Armstrong
9ce8555278 dt-bindings: clk: gxbb-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every gxbb-clkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-7-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08 16:06:16 +02:00
Niravkumar L Rabara
d5f0942b50 dt-bindings: clock: add Intel Agilex5 clock manager
Add clock ID definitions for Intel Agilex5 SoCFPGA.
The registers in Agilex5 handling the clock is named as clock manager.

Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-08 06:32:34 -05:00
Niravkumar L Rabara
2a29fe831f dt-bindings: reset: add reset IDs for Agilex5
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use
altr,rst-mgr-s10.h as common header file similar S10 & Agilex.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-08 06:32:34 -05:00
Huqiang Qin
0e8ec0226e dt-bindings: interrupt-controller: Add header file for Amlogic Meson-G12A SoCs
Add a new dt-binding header that details the interrupt number of the GPIO.

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230724060108.1403662-2-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07 15:35:23 +02:00
Chengci.Xu
d5cda142d6 dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor
translation table format.

In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.

Something like this:

   IOMMU(VDO)          IOMMU(VPP)
      |                   |
 SMI_COMMON_VDO      SMI_COMMON_VPP
 ---------------     ----------------
  |     |    ...      |     |    ...
larb0 larb2  ...    larb1 larb3  ...

We also have an IOMMU that is for infra master like PCIe.
And infra master don't have the larb and ports.

Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-08-07 14:15:45 +02:00
David Wronek
b1b52717be dt-bindings: arm: qcom,ids: Add SoC ID for SM7125
Add the SoC ID for Qualcomm SM7125.

Signed-off-by: David Wronek <davidwronek@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230723190725.1619193-3-davidwronek@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 16:28:43 -07:00
Kathiravan T
cb160cd7b1 dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID
IPQ5019 SoC is never productized. So lets drop it.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230724083745.1015321-3-quic_kathirav@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 16:28:20 -07:00
Tengfei Fan
4d641d2faf dt-bindings: arm: qcom,ids: add SoC ID for SM4450
Add the ID for the Qualcomm SM4450 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230731080043.38552-6-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 16:25:22 -07:00