Commit Graph

24 Commits

Author SHA1 Message Date
bayi cheng
8330e9e826
spi: spi-mtk-nor: Add recovery mechanism for dma read timeout
The state machine of MTK spi nor controller may be disturbed by some
glitch signals from the relevant BUS during dma read, Although the
possibility of causing the dma read to fail is next to nothing,
However, if error-handling is not implemented, which makes the feature
somewhat risky.

Add an error-handling mechanism here, reset the state machine and
re-read the data when an error occurs.

Signed-off-by: bayi cheng <bayi.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221207055435.30557-1-bayi.cheng@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-07 14:19:22 +00:00
bayi cheng
63d9a4d884
spi: spi-mtk-nor: Unify write buffer on/off
The logical structures of mtk_nor_write_buffer_enable and
mtk_nor_write_buffer_disable are very similar, So it is necessary to
combine them into one.

Signed-off-by: bayi cheng <bayi.cheng@mediatek.com>
Link: https://lore.kernel.org/r/20221115124655.10124-1-bayi.cheng@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:43 +00:00
bayi cheng
d52a826b40
spi: spi-mtk-nor: Optimize timeout for dma read
The timeout value of the current dma read is unreasonable. For example,
If the spi flash clock is 26Mhz, It will takes about 1.3ms to read a
4KB data in spi mode. But the actual measurement exceeds 50s when a
dma read timeout is encountered.

In order to be more accurately, It is necessary to use usecs_to_jiffies,
After modification, the measured timeout value is about 130ms.

Signed-off-by: bayi cheng <bayi.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221114081327.25750-1-bayi.cheng@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-14 11:48:51 +00:00
Allen-KH Cheng
317c204561
spi: spi-mtk-nor: initialize spi controller after resume
After system resumes, the registers of nor controller are
initialized with default values. The nor controller will
not function properly.

To handle both issues above, we add mtk_nor_init() in
mtk_nor_resume after pm_runtime_force_resume().

Fixes: 3bfd9103c7 ("spi: spi-mtk-nor: Add power management support")

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220412115743.22641-1-allen-kh.cheng@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-12 17:18:51 +01:00
Guochun Mao
474fc2e639
spi: spi-mtk-nor: make some internal variables static
Variables mtk_nor_caps_mt8173, mtk_nor_caps_mt8186 and
mtk_nor_caps_mt8192 are not declared.
Make them static.

Fixes: 5b177234e9 ("spi: spi-mtk-nor: improve device table for adding more capabilities")
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220126091159.27513-1-guochun.mao@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-26 13:32:40 +00:00
Guochun Mao
58b0a653b8
spi: spi-mtk-nor: add axi_s clock for mt8186
MT8186 needs axi_s clock for DMA feature.

Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220118142820.2729-5-guochun.mao@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:32:12 +00:00
Guochun Mao
4e8bfe5cdf
spi: spi-mtk-nor: add new soc mt8186 support
Add compatible mediatek,mt8186-nor implementation.

Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220118142820.2729-4-guochun.mao@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:32:11 +00:00
Guochun Mao
5b177234e9
spi: spi-mtk-nor: improve device table for adding more capabilities
Define a structure for adding more capabilities.
Add a item extra_dummy_bit for new SoCs, due to design changed.

Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220118142820.2729-3-guochun.mao@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:32:10 +00:00
Yoshitaka Ikeda
09134c5322
spi: Fixed division by zero warning
The reason for dividing by zero is because the dummy bus width is zero,
but if the dummy n bytes is zero, it indicates that there is no data transfer,
so there is no need for calculation.

Fixes: 7512eaf541 ("spi: cadence-quadspi: Fix dummy cycle calculation when buswidth > 1")
Signed-off-by: Yoshitaka Ikeda <ikeda@nskint.co.jp>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/OSZPR01MB70049C8F56ED8902852DF97B8BD49@OSZPR01MB7004.jpnprd01.prod.outlook.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-09-20 13:38:18 +01:00
Jay Fang
99b3a36204
spi: spi-mtk-nor: Fix checkpatch spacing error
Fix checkpatch error:

  ERROR: space required before the open parenthesis '('
  #295: FILE: spi-mtk-nor.c:295:
  +		switch(op->data.dir) {

Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Link: https://lore.kernel.org/r/1616566602-13894-6-git-send-email-f.fangjian@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-24 19:51:07 +00:00
Lukas Wunner
0f4ad8d59f
spi: spi-mtk-nor: Don't leak SPI master in probe error path
If the call to devm_spi_register_controller() fails on probe of the
MediaTek SPI NOR driver, the spi_controller struct is erroneously not
freed.

Since commit a1daaa991e ("spi: spi-mtk-nor: use dma_alloc_coherent()
for bounce buffer"), the same happens if the call to
dmam_alloc_coherent() fails.

Since commit 3bfd9103c7 ("spi: spi-mtk-nor: Add power management
support"), the same happens if the call to mtk_nor_enable_clk() fails.

Fix by switching over to the new devm_spi_alloc_master() helper.

Fixes: 881d1ee9fe ("spi: add support for mediatek spi-nor controller")
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Ikjoon Jang <ikjn@chromium.org>
Cc: <stable@vger.kernel.org> # v5.7+: 5e844cc37a: spi: Introduce device-managed SPI controller allocation
Cc: <stable@vger.kernel.org> # v5.7+
Cc: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/d5b9f0289465394e73dedb8ec51e180a8f1dffc9.1607286887.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-07 14:18:53 +00:00
bayi cheng
f32cce8483
spi: spi-mtk-nor: add axi clock control for MT8192 spi-nor
MT8192 spi-nor is an independent sub system, we need extra control axi
bus clock for it. Add support for the additional axi clock to allow it
to be configured appropriately.

Signed-off-by: bayi cheng <bayi.cheng@mediatek.com>
Tested-by: Ikjoon Jang <ikjn@chromium.org>
Link: https://lore.kernel.org/r/1605084902-13151-2-git-send-email-bayi.cheng@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-11-16 20:04:10 +00:00
Ikjoon Jang
3bfd9103c7
spi: spi-mtk-nor: Add power management support
This patch adds dev_pm_ops to mtk-nor to support suspend/resume,
auto suspend delay is set to -1 by default.

Accessing registers are only permitted after its clock is enabled
to deal with unknown state of operating clk at probe time.

Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
Link: https://lore.kernel.org/r/20201006155010.v5.4.I68983b582d949a91866163bab588ff3c2a0d0275@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-06 15:53:47 +01:00
Ikjoon Jang
e836d4cf61
spi: spi-mtk-nor: support 36bit dma addressing
This patch enables 36bit dma address support to spi-mtk-nor.
Currently this is enabled only for mt8192-nor.

Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
Link: https://lore.kernel.org/r/20201006155010.v5.3.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-06 15:53:46 +01:00
Ikjoon Jang
a1daaa991e
spi: spi-mtk-nor: use dma_alloc_coherent() for bounce buffer
Use dma_alloc_coherent() for bounce buffer instead of kmalloc() to
make sure the bounce buffer to be allocated within its DMAable range.

Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
Link: https://lore.kernel.org/r/20201006155010.v5.2.I06cb65401ab5ad63ea30c4788d26633928d80f38@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-06 15:53:45 +01:00
Chuanhong Guo
81f13f2116
spi: spi-mtk-nor: fix op checks in supports_op
commit a59b2c7c56 ("spi: spi-mtk-nor: support standard spi properties")
tries to inverse the logic of supports_op when adding
spi_mem_default_supports_op check, but it didn't get it done properly.
There are two regressions introduced by this commit:
1. reading ops supported by program mode is rejected.
2. all ops with special controller routines are incorrectly further
   checked against program mode.

This commits inverses the logic back:
1. check spi_mem_default_supports_op and reject unsupported ops first.
2. return true for ops with special controller routines.
3. check the left ops against controller program mode.

Fixes: a59b2c7c56 ("spi: spi-mtk-nor: support standard spi properties")
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/20200924152730.733243-4-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-01 23:24:27 +01:00
Chuanhong Guo
fd80657592
spi: spi-mtk-nor: add helper for checking prg mode ops
op checking/resizing logic for the newly added mtk_nor_spi_mem_prg is
more complicated. Add two helper functions for them:
mtk_nor_match_prg: check whether an op is supported by prg mode.
mtk_nor_adj_prg_size: adjust data size for mtk_nor_spi_mem_prg.

mtk_nor_match_prg isn't called yet because supports_op is currently
broken. It'll be used in the next fix commit.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/20200924152730.733243-3-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-01 23:24:26 +01:00
Chuanhong Guo
e7edd2cf4c
spi: spi-mtk-nor: make use of full capability of prg mode
"program" mode on this controller can trigger up to 56 bits of data
shifting. During the operation, data in PRGDATA[0-5] will be
shifted out from MOSI, and data from MISO will be continuously filling
SHREG[0-9].
Currently this mode is used to implement transfer_one_message for 6-byte
full-duplex transfer, but it can execute a transfer for up-to 7 bytes
as long as the last byte is read only.
transfer_one_message is expected to perform full-duplex transfer,
instead of transfer with specific format. mtk_nor_spi_mem_prg is
added here to use this extra byte.

Newer version of this controller can trigger longer data shifting with
shift bytes more than PRGDATA_MAX + SHREG_MAX. This patch is implemented
with that in mind and it checks against both SHREG_MAX and PRG_CNT_MAX
for future support of new controllers.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/20200924152730.733243-2-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-01 23:24:25 +01:00
Chuanhong Guo
4cafaddedb
spi: spi-mtk-nor: fix timeout calculation overflow
CLK_TO_US macro is used to calculate potential transfer time for various
timeout handling. However it overflows on transfer bigger than 512 bytes
because it first did (len * 8 * 1000000).
This controller typically operates at 45MHz. This patch did 2 things:
1. calculate clock / 1000000 first
2. add a 4M transfer size cap so that the final timeout in DMA reading
   doesn't overflow

Fixes: 881d1ee9fe ("spi: add support for mediatek spi-nor controller")
Cc: <stable@vger.kernel.org>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/20200922114905.2942859-1-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-25 21:40:20 +01:00
Ikjoon Jang
a59b2c7c56
spi: spi-mtk-nor: support standard spi properties
Use default supports_op() to support spi-[rt]x-bus-width properties.
And check dummy op's byte length instead of its bus width for output.

Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
Link: https://lore.kernel.org/r/20200826091852.519138-1-ikjn@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08 18:19:32 +01:00
Pratyush Yadav
4728f073bf
spi: spi-mtk-nor: reject DTR ops
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller
doesn't support DTR transactions. Since we don't use the default
supports_op(), which rejects all DTR ops, do that explicitly in our
supports_op().

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-5-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-14 17:29:40 +01:00
Pratyush Yadav
caf72df48b
spi: spi-mem: allow specifying a command's extension
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is the
inverse of the opcode. When it is "hex" an additional opcode byte based
is sent with the command whose value can be anything.

So, make opcode a 16-bit value and add a 'nbytes', similar to how
multiple address widths are handled.

Some places use sizeof(op->cmd.opcode). Replace them with op->cmd.nbytes

The spi-mxic and spi-zynq-qspi drivers directly use op->cmd.opcode as a
buffer. Now that opcode is a 2-byte field, this can result in different
behaviour depending on if the machine is little endian or big endian.
Extract the opcode in a local 1-byte variable and use that as the buffer
instead. Both these drivers would reject multi-byte opcodes in their
supports_op() hook anyway, so we only need to worry about single-byte
opcodes for now.

The above two changes are put in this commit to keep the series
bisectable.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-3-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-14 17:29:38 +01:00
Jason Yan
afedb4b728
spi: spi-mtk-nor: make mtk_nor_exec_op() statuc
Fix the following sparse warning:

drivers/spi/spi-mtk-nor.c:394:5: warning: symbol 'mtk_nor_exec_op' was
not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Link: https://lore.kernel.org/r/20200409085009.44971-1-yanaijie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-04-14 18:36:33 +01:00
Chuanhong Guo
881d1ee9fe
spi: add support for mediatek spi-nor controller
This is a driver for mtk spi-nor controller using spi-mem interface.
The same controller already has limited support provided by mtk-quadspi
driver under spi-nor framework and this new driver is a replacement
for the old one.

Comparing to the old driver, this driver has following advantages:
1. It can handle any full-duplex spi transfer up to 6 bytes, and
   this is implemented using generic spi interface.
2. It take account into command opcode properly. The reading routine
   in this controller can only use 0x03 or 0x0b as opcode on 1-1-1
   transfers, but old driver doesn't implement this properly. This
   driver checks supported opcode explicitly and use (1) to perform
   unmatched operations.
3. It properly handles SFDP reading. Old driver can't read SFDP
   due to the bug mentioned in (2).
4. It can do 1-2-2 and 1-4-4 fast reading on spi-nor. These two ops
   requires parsing SFDP, which isn't possible in old driver. And
   the old driver is only flagged to support 1-1-2 mode.
5. It takes advantage of the DMA feature in this controller for
   long reads and supports IRQ on DMA requests to free cpu cycles
   from polling status registers on long DMA reading. It achieves
   up to 17.5MB/s reading speed (1-4-4 mode) which is way faster
   than the old one. IRQ is implemented as optional to maintain
   backward compatibility.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Link: https://lore.kernel.org/r/20200306085052.28258-3-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-11 19:56:07 +00:00