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spi: spi-mtk-nor: support 36bit dma addressing
This patch enables 36bit dma address support to spi-mtk-nor. Currently this is enabled only for mt8192-nor. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20201006155010.v5.3.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -79,6 +79,8 @@
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#define MTK_NOR_REG_DMA_FADR 0x71c
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#define MTK_NOR_REG_DMA_DADR 0x720
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#define MTK_NOR_REG_DMA_END_DADR 0x724
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#define MTK_NOR_REG_DMA_DADR_HB 0x738
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#define MTK_NOR_REG_DMA_END_DADR_HB 0x73c
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#define MTK_NOR_PRG_MAX_SIZE 6
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// Reading DMA src/dst addresses have to be 16-byte aligned
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@ -103,6 +105,7 @@ struct mtk_nor {
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unsigned int spi_freq;
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bool wbuf_en;
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bool has_irq;
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bool high_dma;
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struct completion op_done;
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};
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@ -343,6 +346,13 @@ static int mtk_nor_dma_exec(struct mtk_nor *sp, u32 from, unsigned int length,
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writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR);
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writel(dma_addr + length, sp->base + MTK_NOR_REG_DMA_END_DADR);
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if (sp->high_dma) {
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writel(upper_32_bits(dma_addr),
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sp->base + MTK_NOR_REG_DMA_DADR_HB);
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writel(upper_32_bits(dma_addr + length),
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sp->base + MTK_NOR_REG_DMA_END_DADR_HB);
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}
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if (sp->has_irq) {
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reinit_completion(&sp->op_done);
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mtk_nor_rmw(sp, MTK_NOR_REG_IRQ_EN, MTK_NOR_IRQ_DMA, 0);
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@ -731,7 +741,8 @@ static const struct spi_controller_mem_ops mtk_nor_mem_ops = {
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};
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static const struct of_device_id mtk_nor_match[] = {
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{ .compatible = "mediatek,mt8173-nor" },
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{ .compatible = "mediatek,mt8192-nor", .data = (void *)36 },
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{ .compatible = "mediatek,mt8173-nor", .data = (void *)32 },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mtk_nor_match);
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@ -743,6 +754,7 @@ static int mtk_nor_probe(struct platform_device *pdev)
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void __iomem *base;
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struct clk *spi_clk, *ctlr_clk;
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int ret, irq;
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unsigned long dma_bits;
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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@ -756,6 +768,12 @@ static int mtk_nor_probe(struct platform_device *pdev)
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if (IS_ERR(ctlr_clk))
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return PTR_ERR(ctlr_clk);
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dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev);
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if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) {
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dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits);
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return -EINVAL;
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}
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ctlr = spi_alloc_master(&pdev->dev, sizeof(*sp));
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if (!ctlr) {
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dev_err(&pdev->dev, "failed to allocate spi controller\n");
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@ -781,6 +799,7 @@ static int mtk_nor_probe(struct platform_device *pdev)
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sp->dev = &pdev->dev;
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sp->spi_clk = spi_clk;
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sp->ctlr_clk = ctlr_clk;
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sp->high_dma = (dma_bits > 32);
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sp->buffer = dmam_alloc_coherent(&pdev->dev,
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MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN,
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&sp->buffer_dma, GFP_KERNEL);
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