This makes the nodes compatible with the generic i2c binding without the
board DTS files having to supply the necessary properties themselves.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The current ones makes validation unhappy:
dove-d3plug.dt.yaml: main-interrupt-ctrl@20200: $nodename:0:
'main-interrupt-ctrl@20200' does not match
'^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The current ones makes validation unhappy:
kirkwood-lsxhl.dt.yaml: main-interrupt-ctrl@20200: $nodename:0:
'main-interrupt-ctrl@20200' does not match
'^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
According to BSpec max BW per slice is calculated using formula
Max BW = CDCLK * 64. Currently when calculating min CDCLK we
account only per plane requirements, however in order to avoid
FIFO underruns we need to estimate accumulated BW consumed by
all planes(ddb entries basically) residing on that particular
DBuf slice. This will allow us to put CDCLK lower and save power
when we don't need that much bandwidth or gain additional
performance once plane consumption grows.
v2: - Fix long line warning
- Limited new DBuf bw checks to only gens >= 11
v3: - Lets track used Dbuf bw per slice and per crtc in bw state
(or may be in DBuf state in future), that way we don't need
to have all crtcs in state and those only if we detect if
are actually going to change cdclk, just same way as we
do with other stuff, i.e intel_atomic_serialize_global_state
and co. Just as per Ville's paradigm.
- Made dbuf bw calculation procedure look nicer by introducing
for_each_dbuf_slice_in_mask - we often will now need to iterate
slices using mask.
- According to experimental results CDCLK * 64 accounts for
overall bandwidth across all dbufs, not per dbuf.
v4: - Fixed missing const(Ville)
- Removed spurious whitespaces(Ville)
- Fixed local variable init(reduced scope where not needed)
- Added some comments about data rate for planar formats
- Changed struct intel_crtc_bw to intel_dbuf_bw
- Moved dbuf bw calculation to intel_compute_min_cdclk(Ville)
v5: - Removed unneeded macro
v6: - Prevent too frequent CDCLK switching back and forth:
Always switch to higher CDCLK when needed to prevent bandwidth
issues, however don't switch to lower CDCLK earlier than once
in 30 minutes in order to prevent constant modeset blinking.
We could of course not switch back at all, however this is
bad from power consumption point of view.
v7: - Fixed to track cdclk using bw_state, modeset will be now
triggered only when CDCLK change is really needed.
v8: - Lock global state if bw_state->min_cdclk is changed.
- Try getting bw_state only if there are crtcs in the commit
(need to have read-locked global state)
v9: - Do not do Dbuf bw check for gens < 9 - triggers WARN
as ddb_size is 0.
v10: - Lock global state for older gens as well.
v11: - Define new bw_calc_min_cdclk hook, instead of using
a condition(Manasi Navare)
v12: - Fixed rebase conflict
v13: - Added spaces after declarations to make checkpatch happy.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520150058.16123-1-stanislav.lisovskiy@intel.com
New soc variant the rk3326 which is essentially a px30 with only one
display controller and a new board using it, the Odroid Advance Go.
sdcard regulator for the rockpro64 and a lot of devicetree fixes
making the dt-binding check a lot happier.
* tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on rk3326-odroid-go2
arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position on rk3399
arm64: dts: rockchip: add bus-width properties to mmc nodes for px30
arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc emmc node
arm64: dts: rockchip: rename and label gpio-led subnodes
arm64: dts: rockchip: fix defines in pd_vio node for rk3399
arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-orangepi
arm64: dts: rockchip: fix rtl8211e nodename for rk3399-orangepi
arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-nanopi4
arm64: dts: rockchip: fix rtl8211e nodename for rk3399-nanopi4
arm64: dts: rockchip: fix rtl8211f nodename for rk3328 Beelink A1
arm64: dts: rockchip: fix phy nodename for rk3328
include: dt-bindings: rockchip: remove unused defines
arm64: dts: rockchip: replace RK_FUNC defines in rk3326-odroid-go2
arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399
arm64: dts: rockchip: remove #sound-dai-cells from &spdif node of rk3399-hugsun-x99.dts
arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node of rk3399-pinebook-pro.dts
arm64: dts: rockchip: add Odroid Advance Go
dt-bindings: Add binding for Hardkernel Odroid Go Advance
arm64: dts: rockchip: add core devicetree for rk3326
...
Link: https://lore.kernel.org/r/1970481.V9vR1fIhX2@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In Gen11+ whenever we might exceed DBuf bandwidth we might need to
recalculate CDCLK which DBuf bandwidth is scaled with.
Total Dbuf bw used might change based on particular plane needs.
Thus to calculate if cdclk needs to be changed it is not enough
anymore to check plane configuration and plane min cdclk, per DBuf
bw can be calculated only after wm/ddb calculation is done and
all required planes are added into the state. In order to keep
all min_cdclk related checks in one place let's extract it into
separate function, checking and modifying any_ms.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-3-stanislav.lisovskiy@intel.com
We need to calculate cdclk after watermarks/ddb has been calculated
as with recent hw CDCLK needs to be adjusted accordingly to DBuf
requirements, which is not possible with current code organization.
Setting CDCLK according to DBuf BW requirements and not just rejecting
if it doesn't satisfy BW requirements, will allow us to save power when
it is possible and gain additional bandwidth when it's needed - i.e
boosting both our power management and perfomance capabilities.
This patch is preparation for that, first we now extract modeset
calculation from modeset checks, in order to call it after wm/ddb
has been calculated.
v2: - Extract only intel_modeset_calc_cdclk from intel_modeset_checks
(Ville Syrjälä)
v3: - Clear plls after intel_modeset_calc_cdclk
v4: - Added r-b from previous revision to commit message
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-2-stanislav.lisovskiy@intel.com
ARMv8 Juno/Vexpress/Fast Models updates for v5.8
Various miscellaneous device tree source fixes to make them fully
binding compliant. It includes fixing various device node names,
order of interrupt properties, compatible names, address and size
cell fields and their aligment with children nodes as well as
moving some fixed devices out of bus node.
* tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Fix SCPI shared mem node name
arm64: dts: vexpress: Fix VExpress LED names
arm64: dts: juno: Fix GPU interrupt order
arm64: dts: fvp/juno: Fix bus node names
arm64: dts: fvp: Fix SMMU DT node
arm64: dts: fvp/juno: Fix serial node names
arm64: dts: juno: Use proper DT node name for USB
arm64: dts: fvp: Fix ITS node names and #msi-cells
arm64: dts: fvp: Fix GIC child nodes
arm64: dts: juno: Fix GIC child nodes
arm64: dts: fvp: Fix GIC compatible names
arm64: dts: juno: Fix mem-timer
arm64: dts: juno: Move fixed devices out of bus node
arm64: dts: fvp: Move fixed clocks out of bus node
arm64: dts: vexpress: Move fixed devices out of bus node
arm64: dts: fvp: Move fixed devices out of bus node
arm64: dts: fvp/juno: Fix node address fields
Link: https://lore.kernel.org/r/20200519094702.GA32975@bogus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Changing base clock frequency directly impacts TSC Hz but not CPUID.16h
value. An overclocked CPU supporting CPUID.16h and with partial CPUID.15h
support will set TSC KHZ according to "best guess" given by CPUID.16h
relying on tsc_refine_calibration_work to give better numbers later.
tsc_refine_calibration_work will refuse to do its work when the outcome is
off the early TSC KHZ value by more than 1% which is certain to happen on
an overclocked system.
Fix this by adding a tsc_early_khz command line parameter that makes the
kernel skip early TSC calibration and use the given value instead.
This allows the user to provide the expected TSC frequency that is closer
to reality than the one reported by the hardware, enabling
tsc_refine_calibration_work to do meaningful error checking.
[ tglx: Made the variable __initdata as it's only used on init and
removed the error checking in the argument parser because
kstrto*() only stores to the variable if the string is valid ]
Signed-off-by: Krzysztof Piecuch <piecuch@protonmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/O2CpIOrqLZHgNRkfjRpz_LGqnc1ix_seNIiOCvHY4RHoulOVRo6kMXKuLOfBVTi0SMMevg6Go1uZ_cL9fLYtYdTRNH78ChaFaZyG3VAyYz8=@protonmail.com
Except for Endpoints, we enable PTM at enumeration-time. Previously we did
not account for the fact that Switch Downstream Ports are not permitted to
have a PTM capability; their PTM behavior is controlled by the Upstream
Port (PCIe r5.0, sec 7.9.16). Since Downstream Ports don't have a PTM
capability, we did not mark them as "ptm_enabled", which meant that
pci_enable_ptm() on an Endpoint failed because there was no PTM path to it.
Mark Downstream Ports as "ptm_enabled" if their Upstream Port has PTM
enabled.
Fixes: eec097d431 ("PCI: Add pci_enable_ptm() for drivers to enable PTM on endpoints")
Reported-by: Aditya Paluri <Venkata.AdityaPaluri@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Qualcomm ARM64 DT updates for v5.8
For SDM845 this defines the IPA network accelerator and the CCI camera
control bus, it defines the required UFS reset and adds WiFi for the
Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251
camera nodes for DB845c.
For SC7180 it adds GPU support, defines the modem remoteproc, adds the
IPA network accelerator, Coresight and ETM support, adds cpuidle low
power states and updates the CPUs' compatible.
For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and
adds voltage corners, it defines the nodes for UFS PHY and controller
and finally corrects a typo in the PDC node to make SPMI functional.
For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control
interface bus is added and Coresight is disabled by default to match
some product configurations. The Samsung A3U gained display support and
Samsung A5U gained touchscreen support.
MSM8996 now property describes the power supply chain for the GPU, the
CCI camera control interface bus is added and the DB820c has the
regulators of the secondary PMIC defined.
For QCS404 USB PHYs and controllers are defined and wired up for the
EVB.
SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7
defined.
It also contains a number of changes throughout to improve DT binding
compliance.
* tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (68 commits)
arm64: dts: qcom: sc7180: Correct the pdc interrupt ranges
arm64: dts: qcom: sc7180: add IPA information
arm64: dts: qcom: sc7180: Fix ETMv4 power management patch
arm64: dts: qcom: sc7180: Add A618 gpu dt blob
dt-bindings: arm-smmu: Add sc7180 compatible string
arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC
arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc
arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi
arm64: dts: qcom: msm8916: move gpu opp table to gpu node
arm64: dts: qcom: msm8916: avoid using _ in node names
arm64: dts: qcom: c630: Specify UFS device reset
arm64: dts: qcom: c630: Add WiFi node
arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panel
arm64: dts: qcom: db820c: Fix invalid pm8994 supplies
arm64: dts: qcom: db820c: Add pmi8994 RPM regulators
arm64: dts: qcom: msm8916: Disable coresight by default
arm64: dts: qcom: sc7180: Add "no-map" to cmd_db reserved area
arm64: dts: qcom: msm8916-samsung-a5u: Add touchscreen
arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen regulator
arm64: dts: qcom: msm8916: Add blsp_i2c5
...
Link: https://lore.kernel.org/r/20200519052528.1249950-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
AT91 DT for 5.8
- New board: Microchip SAMA5D2 Industrial Connectivity Platform
- All SoCs are now converted to the new PMC device tree binding
- sama5d2 flexcom nodes are now fully described in sama5d2.dtsi
* tag 'at91-5.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (35 commits)
ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPs
ARM: dts: at91: Configure I2C SCL gpio as open drain
ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases
ARM: dts: at91: sama5d2_xplained: Add alias for DBGU
ARM: dts: at91: sama5d2: Add missing flexcom definitions
ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions
ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function
ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions
ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART
ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions
ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0
ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP
...
Link: https://lore.kernel.org/r/20200518212844.GA26356@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
MT2712:
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
* tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8173: Add capacity-dmips-mhz attributes
arm64: dts: mt2712: use non-empty ranges for usb-phy
arm64: dts: mt8173: fix mdp aliases property name
arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC
arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board
arm64: dts: mediatek: Add I2C support for MT6797 SoC
dt-bindings: i2c: Document I2C controller binding for MT6797 SoC
arm64: dts: mt8173: fix cooling device range
arm64: dts: mediatek: add mt8173 elm and hana board
arm64: dts: mt8173: fix unit name warnings
arm64: dts: mt8173: add uart aliases
dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana
arm64: dts: mt8183: adjust cpuidle target residency
arm64: dts: mt8173: Add gce setting in mmsys and display node
arm64: dts: mt7622: add built-in Wi-Fi device nodes
Link: https://lore.kernel.org/r/2794a8db-c14f-ac34-9e28-9f3700db6c4c@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SoCFPGA DTS updates for v5.8
- Leave the FPGA bridges disabled in base dtsi
- Add fpga2hps and fpga2sdram bridges on base Cyclone5/Arria5 dtsi
* tag 'socfpga_dts_update_for_v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
ARM: dts: socfgpa: set bridges status to disabled
Link: https://lore.kernel.org/r/20200515193029.11318-2-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Our usual number of patches to improve the Allwinner Device Tree
support, including:
- Support for the IOMMU on the H6
- Support for cpufreq / thermal throttling on the H6
- Support for the mailbox on the A64, A83t, H3, H5 and H6
- New boards: A20-OLinuXino-LIME-eMMC
* tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (23 commits)
arm64: dts: allwinner: h6: Add IOMMU
arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
arm64: dts: allwinner: h6: add voltage range to OPP table
arm64: dts: allwinner: sun50i-a64: Add missing address/size-cells
arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64
arm64: dts: allwinner: Sort Pine H64 device-tree nodes
arm64: dts: allwinner: h6: Enable CPU opp tables for Orange Pi 3
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
arm64: dts: allwinner: h6: Add thermal trip points/cooling map
arm64: dts: allwinner: h6: Add clock to CPU cores
arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI combo module
arm64: dts: allwinner: h6: orangepi: Disable OTG mode
arm64: dts: allwinner: h6: orangepi: Add gpio power supply
ARM: dts: sun8i-h2-plus-bananapi-m2-zero: Fix led polarity
arm64: dts: allwinner: h6: Add msgbox node
arm64: dts: allwinner: a64: Add msgbox node
ARM: dts: sunxi: h3/h5: Add msgbox node
ARM: dts: sunxi: a83t: Add msgbox node
ARM: dts: sun8i-h3: add opp table for mali gpu
...
Link: https://lore.kernel.org/r/cfa66bd9-f74c-4614-9ea5-9ef8546cc571.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: tegra: Device tree changes for v5.8-rc1
This contains a bit of cleanup and CPU frequency scaling support for the
Tegra30 Beaver board.
* tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra30: beaver: Add CPU Operating Performance Points
ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS
ARM: tegra: Kill off "simple-panel" compatibles
Link: https://lore.kernel.org/r/20200515145311.1580134-11-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dt-bindings: Changes for v5.8-rc1
This adds bindings for the CSI TPG clock on Tegra210, moves various
clocks from the clock and reset controller to the PMC where their
controls really are, adds bindings for the external memory controller
and video capture controller on Tegra210, as well as CPU frequency
scaling on Tegra20 and Tegra30.
* tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: i2c: tegra: Document Tegra210 VI I2C
dt-bindings: tegra: Add VI and CSI bindings
dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
dt-bindings: clock: tegra: Remove PMC clock IDs
dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
Link: https://lore.kernel.org/r/20200515145311.1580134-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Intel kernel build robot recently pointed out that I missed the
register keyword on this one when I refactored the code to remove local
register variables (which aren't supported by LLVM). GCC's manual
indicates that global register variables must have the register keyword,
As far as I can tell lacking the register keyword causes GCC to ignore
the __asm__ and treat this as a regular variable, but I'm not sure how
that didn't show up as some sort of failure.
Fixes: 52e7c52d2d ("RISC-V: Stop relying on GCC's register allocator's hueristics")
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
shpchp_unconfigure_device() always returned 0, so there's no reason for a
return value. In addition, remove_board() checked the return value for
possible error which is unnecessary.
Convert shpchp_unconfigure_device() to a void function and remove the
return value check. This addresses the following Coccinelle warning:
drivers/pci/hotplug/shpchp_pci.c:66:5-7: Unneeded variable: "rc". Return "0" on line 86
Link: https://lore.kernel.org/r/20200521190457.1066600-1-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Linux 5.7-rc6
Conflict in drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c
resolved by deleting dr_cq_event, matching how netdev resolved it.
Required for dependencies in the following patches.
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Fix kernel-doc of the "srv" parameter to pcie_pme_resume() and
pcie_pme_remove(). Building with W=1 produced these warnings:
drivers/pci/pcie/pme.c:414: warning: Function parameter or member 'srv' not described in 'pcie_pme_resume'
drivers/pci/pcie/pme.c:437: warning: Function parameter or member 'srv' not described in 'pcie_pme_remove'
Link: https://lore.kernel.org/r/1589612414-61682-1-git-send-email-f.fangjian@huawei.com
Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Pull virtio fixes from Michael Tsirkin:
"Fix a couple of build warnings"
* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:
vhost: missing __user tags
vdpasim: remove unused variable 'ret'
Since there will be some changes to how iio_priv_to_dev() is implemented,
it could be that the helper becomes a bit slower, as it will be hidden away
in the IIO core.
But even without that rework, this looks like it can pass the 'indio_dev'
object to ping_read() and obtain the state struct via iio_priv() which is a
preferred practice than going back-n-forth (getting the state-struct, then
using iio_priv_to_dev() to get the indio_dev object back).
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This also removes unused iio_dev pointers.
Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Proximity sensor driver based on light/vcnl4000.c code.
For now supports only the single on-demand measurement.
The VCNL3020 is a fully integrated proximity sensor. Fully
integrated means that the infrared emitter is included in the
package. It has 16-bit resolution. It includes a signal
processing IC and features standard I2C communication
interface. It features an interrupt function.
Datasheet: http://www.vishay.com/docs/84150/vcnl3020.pdf
Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Commit a926f81d2f ("xen/cpuhotplug: Replace cpu_up/down() with
device_online/offline()") replaced cpu_down() with device_offline()
call which requires that the CPU has been registered before. This
registration, however, happens later from topology_init() which
is called as subsys_initcall(). setup_vcpu_hotplug_event(), on the
other hand, is invoked earlier, during arch_initcall().
As result, booting a PV(H) guest with vcpus < maxvcpus causes a crash.
Move setup_vcpu_hotplug_event() (and therefore setup_cpu_watcher()) to
late_initcall(). In addition, instead of performing all offlining steps
in setup_cpu_watcher() simply call disable_hotplug_cpu().
Fixes: a926f81d2f (xen/cpuhotplug: Replace cpu_up/down() with device_online/offline()"
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: https://lore.kernel.org/r/1588976923-3667-1-git-send-email-boris.ostrovsky@oracle.com
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
This loop in the error handling code should start a "i - 1" and end at
"i == 0". Currently it starts a "i" and ends at "i == 1". The result
is that it removes one attribute that wasn't created yet, and leaks the
zeroeth attribute.
Fixes: 4e01847c38 ("drm/amdgpu: optimize amdgpu device attribute code")
Acked-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The current codebase makes use of one-element arrays in the following
form:
struct something {
int length;
u8 data[1];
};
struct something *instance;
instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL);
instance->length = size;
memcpy(instance->data, source, size);
but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.
Also, make use of the new struct_size() helper to properly calculate the
size of struct smu10_voltage_dependency_table.
This issue was found with the help of Coccinelle and, audited and fixed
_manually_.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
When disconnect fe from be, something such as unstable clock may cause
garbage occurs.
[How]
Send set avmute at the beginning of disable stream and send reset avmute
at the end of enable stream.
Signed-off-by: Jinze Xu <jinze.xu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
