Commit Graph

948892 Commits

Author SHA1 Message Date
Andre Guedes
876ea04db7 igc: Early return in igc_get_ethtool_nfc_entry()
This patch re-writes the second half of igc_ethtool_get_nfc_entry() to
follow the 'return early' pattern seen in other parts of the driver and
removes some duplicate comments.

Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:19:15 -07:00
Andre Guedes
8b9c23cdf0 igc: Cleanup _get|set_rxnfc ethtool ops
This patch does a trivial change in igc_ethtool_get_rxnfc() and
igc_ethtool_set_rxnfc() to simplify their logic.

Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:19:11 -07:00
Andre Guedes
4d0710c241 igc: Get rid of igc_max_channels()
The local function igc_max_channels() is a pointless wrapper around
igc_get_max_rss_queues(). This patch removes it and updates the callers
accordingly. It also does some cleanup on igc_get_max_rss_queues().

Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:19:07 -07:00
Andre Guedes
8e34cad167 igc: Remove unused field from igc_nfc_filter
The 'cookie' field is not used anywhere in the code so this patch
removes it from struct igc_nfc_filter.

Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:19:00 -07:00
Sasha Neftin
281380a6fd igc: Remove per queue good transmited counter register
Per queue good transmitted packet counter not applicable for i225 device.
This patch comes to clean up this register.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:18:56 -07:00
Sasha Neftin
d1fe569f51 igc: Remove header redirection register
Header redirection missed packet counter not applicable for i225 device.
This patch comes to clean up this register.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:18:52 -07:00
Sasha Neftin
3b5fc88f78 igc: Remove obsolete circuit breaker registers
Part of circuit breaker registers is obsolete
and not applicable for i225 device.
This patch comes to clean up these registers.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:18:48 -07:00
Alexander Duyck
49ee3c2ab5 e1000: Do not perform reset in reset_task if we are already down
We are seeing a deadlock in e1000 down when NAPI is being disabled. Looking
over the kernel function trace of the system it appears that the interface
is being closed and then a reset is hitting which deadlocks the interface
as the NAPI interface is already disabled.

To prevent this from happening I am disabling the reset task when
__E1000_DOWN is already set. In addition code has been added so that we set
the __E1000_DOWN while holding the __E1000_RESET flag in e1000_close in
order to guarantee that the reset task will not run after we have started
the close call.

Signed-off-by: Alexander Duyck <alexander.h.duyck@linux.intel.com>
Tested-by: Maxim Zhukov <mussitantesmortem@gmail.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:18:42 -07:00
Andre Guedes
8eb2449d83 igc: Enable NFC rules based source MAC address
This patch adds support for Network Flow Classification (NFC) rules
based on source MAC address. Note that the controller doesn't support
rules with both source and destination addresses set, so this special
case is checked in igc_add_ethtool_nfc_entry().

Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:18:37 -07:00
Andre Guedes
750433d0aa igc: Add support for source address filters in core
This patch extends MAC address filter internal APIs igc_add_mac_filter()
and igc_del_mac_filter(), as well as local helpers, to support filters
based on source address.

A new parameters 'type' is added to the APIs to indicate if the filter
type is source or destination. In case it is source type, the RAH
register is configured accordingly in igc_set_mac_filter_hw().

Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21 16:18:30 -07:00
Roger Pau Monne
2abb65a39b xen: enable BALLOON_MEMORY_HOTPLUG by default
Without it a PVH dom0 is mostly useless, as it would balloon down huge
amounts of RAM in order get physical address space to map foreign
memory and grants, ultimately leading to an out of memory situation.

Such option is also needed for HVM or PVH driver domains, since they
also require mapping grants into physical memory regions.

Suggested-by: Ian Jackson <ian.jackson@eu.citrix.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Link: https://lore.kernel.org/r/20200324150015.50496-2-roger.pau@citrix.com
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2020-05-21 18:11:03 -05:00
Roger Pau Monne
0df683ff74 xen: expand BALLOON_MEMORY_HOTPLUG description
To mention it's also useful for PVH or HVM domains that require
mapping foreign memory or grants.

[boris: "non PV" instead of "translated" at Juergen's request]

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Link: https://lore.kernel.org/r/20200324150015.50496-1-roger.pau@citrix.com
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2020-05-21 18:10:51 -05:00
Jason Gunthorpe
0ac8903cbb RDMA/core: Allow the ioctl layer to abort a fully created uobject
While creating a uobject every create reaches a point where the uobject is
fully initialized. For ioctls that go on to copy_to_user this means they
need to open code the destruction of a fully created uobject - ie the
RDMA_REMOVE_DESTROY sort of flow.

Open coding this creates bugs, eg the CQ does not properly flush the
events list when it does its error unwind.

Provide a uverbs_finalize_uobj_create() function which indicates that the
uobject is fully initialized and that abort should call to destroy_hw to
destroy the uobj->object and related.

Methods can call this function if they go on to have error cases after
setting uobj->object. Once done those error cases can simply do return,
without an error unwind.

Link: https://lore.kernel.org/r/20200519072711.257271-2-leon@kernel.org
Signed-off-by: Yishai Hadas <yishaih@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2020-05-21 20:10:46 -03:00
Stephen Boyd
c60037f0d7 Merge tag 'for-5.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-tegra
Pull Tegra clk driver updates from Thierry Reding:

These are a couple of changes to implement EMC frequency scaling on
Tegra210, CPU frequency scaling on Tegra20 and Tegra30 as well as a
special clock gate for the CSI test pattern generator on Tegra210.

* tag 'for-5.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: Add Tegra210 CSI TPG clock gate
  clk: tegra30: Use custom CCLK implementation
  clk: tegra20: Use custom CCLK implementation
  clk: tegra: cclk: Add helpers for handling PLLX rate changes
  clk: tegra: pll: Add pre/post rate-change hooks
  clk: tegra: Add custom CCLK implementation
  clk: tegra: Remove the old emc_mux clock for Tegra210
  clk: tegra: Implement Tegra210 EMC clock
  clk: tegra: Export functions for EMC clock scaling
  clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210
  clk: tegra: Rename Tegra124 EMC clock source file
  dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
2020-05-21 15:52:41 -07:00
Stephen Boyd
33b52f7cc9 Merge tag 'sunxi-clk-for-5.8-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull an Allwinner clk driver fix from Maxime Ripard:

 - a single minor rounding fix for the legacy Allwinner clock support

* tag 'sunxi-clk-for-5.8-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi: Fix incorrect usage of round_down()
2020-05-21 15:47:37 -07:00
Stephen Boyd
fe95d2e92e Merge tag 'clk-v5.8-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-samsung
Pull Samsung clk driver updates from Sylwester Nawrocki:

 - Regression fixes for exynos542x and exynos5433 SoCs
 - use of fallthrough; attribute for s3c24xx

* tag 'clk-v5.8-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1
  ARM/SAMSUNG EXYNOS ARM ARCHITECTURES: Use fallthrough;
  clk: samsung: Fix CLK_SMMU_FIMCL3 clock name on Exynos542x
  clk: samsung: Mark top ISP and CAM clocks on Exynos542x as critical
2020-05-21 15:43:32 -07:00
Stephen Boyd
571a6b4755 Merge tag 'clk-renesas-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:

  - A minor fix for the currently unused suspend/resume handling on
    RZ/A1 and RZ/A2
  - Two more conversions of Renesas DT bindings to json-schema

* tag 'clk-renesas-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  dt-bindings: clock: renesas: mstp: Convert to json-schema
  dt-bindings: clock: renesas: div6: Convert to json-schema
  clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling
2020-05-21 15:37:54 -07:00
Navid Emamdoost
c54d481d71 apparmor: Fix use-after-free in aa_audit_rule_init
In the implementation of aa_audit_rule_init(), when aa_label_parse()
fails the allocated memory for rule is released using
aa_audit_rule_free(). But after this release, the return statement
tries to access the label field of the rule which results in
use-after-free. Before releasing the rule, copy errNo and return it
after release.

Fixes: 52e8c38001 ("apparmor: Fix memory leak of rule on error exit path")
Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: John Johansen <john.johansen@canonical.com>
2020-05-21 15:25:51 -07:00
Xiyu Yang
c6b39f0707 apparmor: Fix aa_label refcnt leak in policy_update
policy_update() invokes begin_current_label_crit_section(), which
returns a reference of the updated aa_label object to "label" with
increased refcount.

When policy_update() returns, "label" becomes invalid, so the refcount
should be decreased to keep refcount balanced.

The reference counting issue happens in one exception handling path of
policy_update(). When aa_may_manage_policy() returns not NULL, the
refcnt increased by begin_current_label_crit_section() is not decreased,
causing a refcnt leak.

Fix this issue by jumping to "end_section" label when
aa_may_manage_policy() returns not NULL.

Fixes: 5ac8c355ae ("apparmor: allow introspecting the loaded policy pre internal transform")
Signed-off-by: Xiyu Yang <xiyuyang19@fudan.edu.cn>
Signed-off-by: Xin Tan <tanxin.ctf@gmail.com>
Signed-off-by: John Johansen <john.johansen@canonical.com>
2020-05-21 15:25:51 -07:00
Xiyu Yang
a0b845ffa0 apparmor: fix potential label refcnt leak in aa_change_profile
aa_change_profile() invokes aa_get_current_label(), which returns
a reference of the current task's label.

According to the comment of aa_get_current_label(), the returned
reference must be put with aa_put_label().
However, when the original object pointed by "label" becomes
unreachable because aa_change_profile() returns or a new object
is assigned to "label", reference count increased by
aa_get_current_label() is not decreased, causing a refcnt leak.

Fix this by calling aa_put_label() before aa_change_profile() return
and dropping unnecessary aa_get_current_label().

Fixes: 9fcf78cca1 ("apparmor: update domain transitions that are subsets of confinement at nnp")
Signed-off-by: Xiyu Yang <xiyuyang19@fudan.edu.cn>
Signed-off-by: Xin Tan <tanxin.ctf@gmail.com>
Signed-off-by: John Johansen <john.johansen@canonical.com>
2020-05-21 15:25:51 -07:00
Arnd Bergmann
ccffeae7af Merge branch 'v5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes
* 'v5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: cmdq: return send msg error code
  arm64: dts: mt8173: fix vcodec-enc clock

Link: https://lore.kernel.org/r/33a0556a-e2a3-7f0b-b09b-4516642a4bfe@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22 00:09:09 +02:00
Arnd Bergmann
ed9dc1df9f Merge tag 'imx-fixes-5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.7, round 2:

One imx6q-bx50v3 device tree change to fix an issue, attempting atomic
modeset while using HDMI and display port at the same time causes LDB
clock programming to destroy the programming of HDMI.

* tag 'imx-fixes-5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts/imx6q-bx50v3: Set display interface clock parents

Link: https://lore.kernel.org/r/20200521150719.GB24084@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22 00:08:40 +02:00
Alan Swanson
78b7dfd9ce drm/amdgpu: resize VRAM BAR for CPU access on gfx10
Try to resize BAR0 to let CPU access all of VRAM on Navi. Syncs
code with previous gfx generations from commit d6895ad39f
("drm/amdgpu: resize VRAM BAR for CPU access v6").

Signed-off-by: Alan Swanson <reiver@improbability.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 18:00:01 -04:00
Alex Deucher
d3a3763432 drm/amdgpu: drop navi pcie bw callback
It's not implemented yet so just drop it so the sysfs
pcie bw file returns an appropriate error instead of
garbage.

Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-By: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 18:00:01 -04:00
Alex Deucher
d08d692ebb drm/amdgpu: improve error handling in pcie_bw
1. Initialize the counters to 0 in case the callback
   fails to initialize them.
2. The counters don't exist on APUs so return an error
   for them.
3. Return an error if the callback doesn't exist.

Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-By: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 18:00:00 -04:00
Philip Yang
f7646585a3 drm/amdkfd: fix restore worker race condition
In free memory of gpu path, remove bo from validate_list to make sure
restore worker don't access the BO any more, then unregister bo MMU
interval notifier. Otherwise, the restore worker will crash in the
middle of validating BO user pages if MMU interval notifer is gone.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 17:59:45 -04:00
Arnd Bergmann
fec6111ae3 Merge tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi into arm/defconfig
ARM64: hisilicon: defconfig updates for 5.8

- Enable PCI PASID as built-in module and UACCE/SEC2/HPRE as
  loadable modules to support UACCE use case for the D06CS board

* tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi:
  arm64: defconfig: Enable UACCE/PCI PASID/SEC2/HPRE configs

Link: https://lore.kernel.org/r/5EBE4217.6000900@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:56:22 +02:00
Arnd Bergmann
93d2fa6a03 Merge tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/defconfig
arm64: defconfig: Amlogic updates for v5.8
- enable meson gx audio as module

* tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: defconfig: enable meson gx audio as module

Link: https://lore.kernel.org/r/5ec6f4f6.1c69fb81.3fe34.b693@mx.google.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:54:22 +02:00
Arnd Bergmann
72a790ac7c Merge tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig
Qualcomm ARM64 defconfig updates for v5.8

This enables SM8250 GCC clock driver, SC7180 GCC clock driver and SC7180
TLMM pinctrl driver, the IPA and RMNET drivers, CCI, camera subsystem
and camera clock drivers and removes the now depricated GLINK_SSR entry.

* tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: enable Qualcomm IPA and RMNet modules
  arm64: defconfig: Enable Qualcomm SC7180 pinctrl and gcc
  arm64: defconfig: Remove QCOM_GLINK_SSR
  arm64: defconfig: Enable SM8250 GCC driver
  arm64: defconfig: Enable Qualcomm CAMCC, CAMSS and CCI drivers

Link: https://lore.kernel.org/r/20200519052502.1249888-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:53:07 +02:00
Arnd Bergmann
88b1542b06 Merge tag 'at91-5.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig
AT91 defconfig for 5.8

 - Add PIOBU and MCP16502 regulator to sama5 defconfig

* tag 'at91-5.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: configs: at91: sama5: enable MCP16502 regulator
  ARM: configs: at91: sama5: enable SAMA5D2_PIOBU

Link: https://lore.kernel.org/r/20200518213254.GA26598@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:52:41 +02:00
Arnd Bergmann
6e15f0a9c4 Merge tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig
Two patches to enable the new cpufreq support on the H6 for the arm64
defconfig to enable the audio codec in sunxi_defconfig.

* tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: configs: Enable sun50i cpufreq nvmem
  ARM: configs: sunxi: Add sun8i analog codec

Link: https://lore.kernel.org/r/9fd4d403-f6c8-420d-8b03-62e8485a0b3d.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:52:11 +02:00
Arnd Bergmann
c0feb184a7 Merge tag 'renesas-arm-defconfig-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas ARM defconfig updates for v5.8 (take two)

  - Enable support for the new RZ/G1H SoC in the shmobile and multi_v7
    defconfigs.

* tag 'renesas-arm-defconfig-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: multi_v7_defconfig: Enable r8a7742 SoC
  ARM: shmobile: defconfig: Enable r8a7742 SoC

Link: https://lore.kernel.org/r/20200515100547.14671-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:50:18 +02:00
Arnd Bergmann
66fa76a7db Merge tag 'samsung-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/defconfig
Samsung defconfig changes for v5.8

1. Enable drivers for Exynos3250 Rinato Bluetooth,
2. Build WiFi mac80211 framework as module so it will get loaded the
   same time as regulatory data.

* tag 'samsung-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: exynos_defconfig: Compile MAC80211/CFG80211 as modules
  ARM: exynos_defconfig: Enable serial bus and BCM HCIUART drivers

Link: https://lore.kernel.org/r/20200512122922.5700-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:45:08 +02:00
Arnd Bergmann
016eae21a3 Merge tag 'arm-soc/for-5.8/defconfig' of https://github.com/Broadcom/stblinux into arm/defconfig
This pull request contains Broadcom ARM-based SoCs defconfig file
updates for v5.8, please pull the following:

- Nicolas enables the fixed-regulator in bcm2835_defconfig which is need
  to control the Raspberry Pi 4 SD car power supply

* tag 'arm-soc/for-5.8/defconfig' of https://github.com/Broadcom/stblinux:
  ARM: bcm2835_defconfig: Enable fixed-regulator

Link: https://lore.kernel.org/r/20200511210522.28243-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:44:04 +02:00
Arnd Bergmann
929379dd0f Merge tag 'renesas-arm-defconfig-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas ARM defconfig updates for v5.8

  - Refresh shmobile_defconfig for v5.7-rc1.

* tag 'renesas-arm-defconfig-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: shmobile: defconfig: Refresh for v5.7-rc1

Link: https://lore.kernel.org/r/20200430084849.1457-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:43:09 +02:00
Arnd Bergmann
962abbc084 Merge tag 'ux500-defconfig-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/defconfig
Ux500 defconfig changes for functionality merged in the
v5.7 merge window:
- Enable drivers for the Golden and Skomer mobile phones.
- Enable drivers for the HREF520 reference design.

* tag 'ux500-defconfig-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: defconfig: u8500: Enable new drivers for ux500
  ARM: defconfig: u8500: Enable new drivers for samsung-golden

Link: https://lore.kernel.org/r/CACRpkdaxT8dc=mhAd51+KtQ0K4Uj5tttt36bYJLqP_hNfWXP8w@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:42:35 +02:00
Arnd Bergmann
9eddc06a3b Merge branch 'mmp/fixes' into arm/dt
These were queued for v5.7 as bugfixes, merge them
here as well to resolve the conflicts.

* mmp/fixes:
  ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy
  ARM: dts: mmp3-dell-ariel: Fix the SPI devices
  ARM: dts: mmp3: Use the MMP3 compatible string for /clocks

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:37:22 +02:00
Arnd Bergmann
1a55b4232d Merge branch 'mmp/fixes' into arm/fixes
These three fixes should make it into linux-5.7 and
also into the branch for other mmp dt changes for v5.8,
so I created a branch for them.

* mmp/fixes:
  ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy
  ARM: dts: mmp3-dell-ariel: Fix the SPI devices
  ARM: dts: mmp3: Use the MMP3 compatible string for /clocks

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:36:22 +02:00
Lubomir Rintel
24cf6eef79 ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy
"usb-nop-xceiv" is good enough if we don't lose the configuration done
by the firmware, but we'd really prefer a real driver.

Unfortunately, the PHY core is odd in that when the node is compatible
with "usb-nop-xceiv", it ignores the other compatible strings. Let's
just remove it.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:34:23 +02:00
Lubomir Rintel
233cbffaa0 ARM: dts: mmp3-dell-ariel: Fix the SPI devices
I've managed to get about everything wrong while digging these out of
OEM's board file.

Correct the bus numbers, the exact model of the NOR flash, polarity of
the chip selects and align the SPI frequency with the data sheet.

Tested that it works now, with a slight fix to the PXA SSP driver.

Link: https://lore.kernel.org/r/20200419171157.672999-16-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:34:23 +02:00
Lubomir Rintel
ec7d12faf8 ARM: dts: mmp3: Use the MMP3 compatible string for /clocks
Clocks are in fact slightly different on MMP3. In particular, PLL2 is
fixed to a different frequency, there's an extra PLL3, and the GPU
clocks are configured differently.

Link: https://lore.kernel.org/r/20200419171157.672999-15-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:34:22 +02:00
Lubomir Rintel
ed365a4a84 ARM: dts: mmp3: Add the fifth SD HCI
There's one extra SDHCI on MMP3, used by the internal SD card on OLPC
XO-4. Add it to the device tree.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:33:38 +02:00
Lubomir Rintel
dd95b542b7 ARM: dts: berlin*: Fix up the SDHCI node names
The node name preferred by mmc-controller.yaml binding spec is "mmc":

  berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0800: $nodename:0:
      'sdhci@ab0800' does not match '^mmc(@.*)?$'
  berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab1000: $nodename:0:
      'sdhci@ab1000' does not match '^mmc(@.*)?$'
  berlin2cd-google-chromecast.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2cd-valve-steamlink.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2q-marvell-dmp.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2q-marvell-dmp.dt.yaml: sdhci@ab0800: $nodename:0:
      'sdhci@ab0800' does not match '^mmc(@.*)?$'
  berlin2q-marvell-dmp.dt.yaml: sdhci@ab1000: $nodename:0:
      'sdhci@ab1000' does not match '^mmc(@.*)?$'

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:46 +02:00
Lubomir Rintel
bbbea1f2a9 ARM: dts: mmp3: Fix USB & USB PHY node names
There are better generic ones and the validation is going to complain:

  mmp3-dell-ariel.dt.yaml: hsic@f0001000: $nodename:0: 'hsic@f0001000'
      does not match '^usb(@.*)?'
  mmp3-dell-ariel.dt.yaml: hsic@f0002000: $nodename:0: 'hsic@f0002000'
      does not match '^usb(@.*)?'
  ...

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:45 +02:00
Lubomir Rintel
7df3a1ee12 ARM: dts: mmp3: Fix L2 cache controller node name
The current one makes validation unhappy:

  mmp3-dell-ariel.dt.yaml: l2-cache-controller@d0020000: $nodename:0:
      'l2-cache-controller@d0020000' does not match
      '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:45 +02:00
Lubomir Rintel
4989fd577d ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property
This way the device tree validator learns that each cell of the property
constitutes a separate item. Otherwise it gets unnecessairly upset:

  mmp3-dell-ariel.dt.yaml: rtc@d4010000: interrupts: [[1, 0]] is too short

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:44 +02:00
Lubomir Rintel
2e7167d17b ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property
This way the device tree validator learns that each cell of the property
constitutes a separate item. Otherwise it gets unnecessairly upset:

  pxa168-aspenite.dt.yaml: rtc@d4010000: interrupts: [[5, 6]] is too short
  pxa910-dkb.dt.yaml: rtc@d4010000: interrupts: [[5, 6]] is too short

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:44 +02:00
Lubomir Rintel
c911cadfab ARM: dts: pxa910: Fix the gpio interrupt cell number
gpio-pxa uses two cell to encode the interrupt source: the pin number
and the trigger type. Adjust the device node accordingly.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:43 +02:00
Lubomir Rintel
55d26c3844 ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property
This way the device tree validator learns that each cell of the property
constitutes a separate item. Otherwise it gets unnecessairly upset:

  pxa300-raumfeld-speaker-s.dt.yaml: gpio@40e00000: interrupts:
      [[8, 9, 10]] is too short

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr.>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:43 +02:00
Lubomir Rintel
51d6bba661 ARM: dts: pxa168: Fix the gpio interrupt cell number
gpio-pxa uses two cell to encode the interrupt source: the pin number
and the trigger type. Adjust the device node accordingly.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:42 +02:00