The fact that all supported boards use the same 33MHz crystal is a
co-incidence. The Zynq PS support a range of crystal freqs so the
hardcoded setting should be removed from the dtsi. Re-implement it
on the board level.
This prepares support for Zynq boards with different crystal
frequencies (e.g. the Digilent ZYBO).
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The current driver probe() function assumes the sensor device to be
always present and gets executed every time if the driver is loaded,
but the appropriate hardware could not be present.
So, move the platform device creation as part of platform init code
and use the 'id_table' to check if the device is present or not.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The SDMMC, SDIO and EMMC controllers use an external FIFO whose size is 256x32bit.
This patch set the corresponding fifo-depth properties for both RK3066 and RK3188.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The leds-gpio driver recently switched to the device property API. The device_node
name is no longer retrieved if the "label" devicetree property is not found.
In this case the driver tries to create entries with (null) name in
/sys/class/leds, which is wrong and generates backtrace as several gpio_leds have
the same name. Also renamed subnode "yellow" to "blue" to match the last
schematics updates.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Armada XP has multiple cores clocked by independent clocks. The
SMP startup code contains a function called set_secondary_cpus_clock()
called in armada_xp_smp_prepare_cpus() to ensure the clocks of the
secondary CPUs match the clock of the boot CPU.
With the introduction of suspend/resume, this operation is no longer
needed when booting the system, but also when existing the suspend to
RAM state. Therefore this commit reworks a bit the logic: instead of
configuring the clock of all secondary CPUs in
armada_xp_smp_prepare_cpus(), we do it on a per-secondary CPU basis in
armada_xp_boot_secondary(), as this function gets called when existing
suspend to RAM for each secondary CPU.
Since the function now only takes care of one CPU, we rename it from
set_secondary_cpus_clock() to set_secondary_cpu_clock(), and it looses
its __init marker, as it is now used beyond the system initialization.
Note that we can't use smp_processor_id() directly, because when
exiting from suspend to RAM, the code is apparently executed with
preemption enabled, so smp_processor_id() is not happy (prints a
warning). We therefore switch to using get_cpu()/put_cpu(), even
though we pretty much have the guarantee that the code starting the
secondary CPUs is going to run on the boot CPU and will not be
migrated.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-14-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The armada_370_xp_cpu_resume() until now was used only as the function
called by the SoC when returning from a deep idle state (as used in
cpuidle, or when the CPU is brought offline using CPU hotplug).
However, it is now also used when exiting the suspend to RAM state. In
this case, it is the bootloader that calls back into this function,
with the MMU left enabled by the BootROM. Having the MMU enabled when
entering this function confuses the kerrnel because we are not using
the kernel page tables at this point, but in other mvebu functions we
use the information on whether the MMU is enabled or not to find out
whether we should talk to the coherency fabric using a physical
address or a virtual address. To fix that, we simply disable the MMU
when entering this function, so that the kernel is in an expected
situation.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-13-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On the Armada XP GP platform, entering suspend to RAM state is
triggering by talking to an external PIC micro-controller connected to
the SoC using 3 GPIOs. There is then a small magic sequence of GPIO
toggling that needs to be used to tell the PIC to turn off the SoC.
The code uses the Device Tree to find out which GPIOs are used to
connect to the PIC micro-controller, and then registers its
mvebu_armada_xp_gp_pm_enter() callback to the SoC-level PM code. The
SoC PM code will call back into this registered function at the very
end of the suspend procedure.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-12-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
When going out of suspend to RAM, the Marvell EBU platforms go through
the bootloader, which re-configures the DRAM controller. To achieve
this, the bootloader executes a piece of code called the "DDR3
training code". It does some reads/writes to the memory to find out
the optimal timings for the memory chip being used.
This has the nasty side effect that the first 10 KB of each DRAM
chip-select are overwritten by the bootloader when exiting the suspend
to RAM state.
Therefore, this commit implements the ->reserve() hook for the 'struct
machine_desc' used on Armada XP, to reserve the 10 KB of each DRAM
chip-select using the memblock API.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-11-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit implements the core of the platform code to enable
suspend/resume on Armada XP. It registers the platform_suspend_ops
structure, and implements the ->enter() hook of this structure.
It is worth mentioning that this commit only provides the SoC-level
part of suspend/resume, which calls into some board-specific code
provided in a follow-up commit.
The most important thing that this SoC-level code has to do is to
build an in-memory structure that contains a magic number, the return
address in the kernel after resume, and a set of address/value
pairs. This structure is used by the bootloader to restore a certain
number of registers (according to the set of address/value pairs) and
then jump back into the kernel at the provided location.
The code also puts the SDRAM into self-refresh mode, before calling
into board-specific code to actually enter the suspend to RAM state.
[ jac - add email exchange between Andrew Lunn and Thomas Petazzoni to better
describe who consumes the address/value pairs ]
> > Is this a well defined mechanism supported by mainline uboot, barebox
> > etc. Or is it some Marvell extension to their uboot?
>
> As far as I know, it is a Marvell extension to their "binary header",
> so it's done even before U-Boot starts. Since the hardware needs
> assistance from the bootloader to do suspend/resume, there is
> necessarily a certain amount of cooperation/agreement needed by what
> the kernel does and what the bootloader expects. I'm not sure there's
> any "standard" mechanism here. Do you know of any?
>
> I know the suspend/resume on the Blackfin architecture works the same
> way (at least it used to work that way years ago when I did a bit of
> Blackfin stuff). And here as well, there was some cooperation between
> the kernel and the bootloader. See
> arch/blackfin/mach-common/dpmc_modes.S, function do_hibernate() at the
> end.
>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-10-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In commit 9c62a68d13 ("netpoll:
Remove dead packet receive code (CONFIG_NETPOLL_TRAP)") this
Kconfig option was removed. So remove references to it from
all defconfigs as well.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull "move omap gpmc to drivers finally" from Tony Lindgren:
We can finally move the GPMC code to live in drivers/memory for
further clean up work.
Note that we still have dependencies to the legacy booting for
omap3 board-*.c files for setting up the board specific memory
timings. For that we need the timing related things still exposed
in include/linux/omap-gpmc.h. This will all become private data
to the GPMC driver once the legacy booting support can be dropped.
* tag 'omap-for-v3.19/gpmc-move-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
memory: gpmc: Move omap gpmc code to live under drivers
ARM: OMAP2+: Move GPMC initcall to devices.c
ARM: OMAP2+: Prepare to move GPMC to drivers by platform data header
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "ARM: tegra: Core code changes for v3.19" from Thierry Reding:
This contains a single fix for a bug that was introduced back in v3.13.
* tag 'tegra-for-3.19-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Re-add removed SoC id macro to tegra_resume()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "ARM: tegra: Default configuration changes for v3.19" from Thierry Reding:
This is merely a regeneration of the default configuration to get rid of
two symbols that are now enabled by default or removed.
* tag 'tegra-for-3.19-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Regenerate default configuration
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "ARM: BCM5301X: Add some more devices to device tree" from Hauke Mehrtens:
The most important part is adding the axi bus to the SoC dtsi file,
this is the main bus on the SoC.
These patches were all send to the arm list and I haven't got any
negative responses.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* tag 'bcm5301x-dt-2014-11-27' of https://github.com/hauke/linux:
ARM: BCM5301X: Add LEDs for Netgear R6250 V1
ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
description" that generic timers provide an active-LOW interrupt
output. Fix the device trees to correctly describe this.
While doing this update the CPU mask to match the number of described
CPUs as well.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "mvebu DT changes for v3.19 (round 3)" from Jason Cooper:
- Armada 375
- Add PHY and USB cluster controller support
* tag 'mvebu-dt-usb-phy-3.19-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375
ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull ARM SoC fixes from Arnd Bergmann:
"Not much interesting going on fixes-wise for us this week, as it
should be for an -rc7. I'm not expecting Olof to work much over
Thanksgiving weekend, so I decided to take over again and push these
out to you.
Just four simple fixes this week:
- one missing of_node_put() on armv7 based mvebu
- forcing the USB host into the right mode on Chromebook
(exynos5-snow)
- enabling two important drivers for exynos_defconfig
- fixing a noncritical bug for tegra that would cause a regression
with common code patches queued for 3.19"
* tag 'armsoc-for-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: tegra: irq: fix buggy usage of irq_data irq field
ARM: exynos_defconfig: Enable max77802 rtc and clock drivers
ARM: dts: Explicitly set dr_mode on exynos5250-snow
ARM: mvebu: add missing of_node_put() call in coherency.c
Pull ARM fixes from Russell King:
"Another round of relatively small ARM fixes.
Thomas spotted that the strex backoff delay bit was a disable bit, so
it needed to be clear for this to work. Vladimir spotted that using a
restart block for the cache flush operation would return -EINTR, which
userspace was not expecting. Dmitry spotted that the auxiliary
control register accesses for Xscale were not correct"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8226/1: cacheflush: get rid of restarting block
ARM: 8222/1: mvebu: enable strex backoff delay
ARM: 8216/1: xscale: correct auxiliary register in suspend/resume
Linux 3.18-rc4 is a dependency for the phy-dt-header branch that
is needed for the final mvebu DT changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "mvebu DT changes for v3.19 (round 2)" from Jason Cooper:
- mvebu
- Use simple-card audio on Armada 370 DB
- Add DSA node for Armada 370 DB
- Add SDHCI to Armada 38x
- Armada 370/XP rework to support new Synology boards
- Add Synology DS213j and DS414
- Various pinctrl and uart and alias fixes to help bootloaders
* tag 'mvebu-dt-3.19-2' of git://git.infradead.org/linux-mvebu:
arm: mvebu: normalize pinctrl entries for Armada SoCs
arm: mvebu: fix wrongly named DS414 pinctrl entries
arm: mvebu: add .dts file for Synology DS414
arm: mvebu: add .dts file for Synology DS213j
arm: mvebu: define and use common Armada XP SPI pinctrl setting
arm: mvebu: define and use common Armada XP UART2/3 pinctrl settings
arm: mvebu: define and use common Armada 370 UART pinctrl settings
arm: mvebu: define and use common Armada 370 SPI pinctrl settings
arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsi
arm: mvebu: use recently introduced uart label for stdout-path
arm: mvebu: add uartX labels for Armada SoC serial nodes
arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi
ARM: mvebu: fix ordering in Armada 370 .dtsi
ARM: mvebu: adjust ethernet aliases according to U-Boot requirements for A38x
ARM: mvebu: remove clock-frequency from Armada 38x SDHCI Device Tree node
ARM: mvebu: enable no-1-8-v flag for Armada 385 DB SDHCI interface
mvebu: 370 RD: Add support for the switch
ARM: mvebu: use simple-card DT binding for audio on Armada 370 DB
ARM: mvebu: remove conflicting muxing on Armada 370 DB
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "mvebu defconfig changes for v3.19 (round 2)" from Jason Cooper:
- mvebu
- Add SDHCI, i2c, and MTD_BLOCK
* tag 'mvebu-defconfig-3.19-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add MTD_BLOCK to mvebu_v7_defconfig
ARM: mvebu: enable i2c device in mvebu_v7_defconfig
ARM: mvebu: re-enable SDHCI driver for Armada 38x SoC in v7 defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "mvebu SoC changes for v3.19" from Jason Cooper:
- Armada 38x
- Implement CPU hotplug support
- Armada 375
- Remove Z1 stepping support (limited dist. of SoC)
* tag 'mvebu-soc-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Implement the CPU hotplug support for the Armada 38x SoCs
ARM: mvebu: Fix the secondary startup for Cortex A9 SoC
ARM: mvebu: Move SCU power up in a function
ARM: mvebu: Clean-up the Armada XP support
ARM: mvebu: update comments in coherency.c
ARM: mvebu: remove Armada 375 Z1 workaround for I/O coherency
ARM: mvebu: remove unused register offset definition
ARM: mvebu: disable I/O coherency on non-SMP situations on Armada 370/375/38x/XP
ARM: mvebu: make the coherency_ll.S functions work with no coherency fabric
ARM: mvebu: Remove thermal quirk for A375 Z1 revision
ARM: mvebu: add missing of_node_put() call in coherency.c
ARM: orion: Fix for certain sequence of request_irq can cause irq storm
ARM: mvebu: armada xp: Generalize use of i2c quirk
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The MMCI driver, when used with a Device Tree described device, relies
on the "vmmc" voltage regulator supply to set the OCR register voltage bits,
using MMC core's mmc_regulator_get_supply() function.
Without the regulator framework present there are no valid operating
voltages reported and the device initialisation fails:
mmci-pl18x 10005000.mmci: No vmmc regulator found
mmci-pl18x 10005000.mmci: no support for card's volts
mmc0: error -22 whilst initialising SD card
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Just move to drivers as further clean-up can now happen there
finally.
Let's also add Roger and me to the MAINTAINERS so we get
notified for any patches related to GPMC.
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This will us allow to just move gpmc.c to live under drivers
in the next patch.
Note that we now also remove the omap specific check for the
initcall. That's OK as gpmc_probe() checks for the pdata
and bails out for other platforms compiled in.
Also the postcore_initcall() maybe possible to change to
just regular module_init(), but let's do that in separate
patch after the move to drivers is done.
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pull "Fourth batch of cleanup/SoC for 3.19" from Nicolas Ferre:
- removal of legacy board support for the last SoC having board C files: at91rm9200
- removal or modification of some Kconfig options
- switch to USE_OF for all the AT91 SoCs
- removal of the old AT91-specific clocks and IRQ drivers
* tag 'at91-cleanup4' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: remove unused IRQ function declarations
ARM: at91: remove legacy IRQ driver and related code
ARM: at91: remove old at91-specific clock driver
ARM: at91: remove clock data in at91sam9n12.c and at91sam9x5.c files
ARM: at91: remove all !DT related configuration options
ARM: at91/trivial: update Kconfig comment to mention SAMA5
ARM: at91: always USE_OF from now on
ARM: at91/Kconfig: remove ARCH_AT91RM9200 option for drivers
ARM: at91: switch configuration option to SOC_AT91RM9200
ARM: at91: remove at91rm9200 legacy board support
ARM: at91: remove at91rm9200 legacy boards files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Now, with the CLCD DT support available, there is no
more reason to keep the non-DT support for V2P-CA9.
Removed, together with "some" supporting code. It was
necessary to make PLAT_VERSATILE_SCHED_CLOCK optional
and selected by the machines still interested in it.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Since there is no public documentation, this patch also provide register
offsets for different UART units on this SoC.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Allwinner simple frambuffer support" from Maxime Ripard:
This enables the simple framebuffer on all the supported Allwinner SoCs (but
the A80). That allows to have at last a video display usable by using the
framebuffer the firmware might have set up.
* tag 'sunxi-simplefb-for-3.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (55 commits)
ARM: dts: sunxi: Update simplefb nodes so that u-boot can find them
ARM: dts: sunxi: Add de_be0 clk parent pll to simplefb node
ARM: dts: sun7i: Add simplefb node
ARM: dts: sun6i: Add simplefb node
ARM: dts: sun5i: Add simplefb node
ARM: dts: sun4i: Add simplefb node
ARM: dts: sun6i: Add ethernet support to M9 board
ARM: sun6i: DT: Add PLL6 multiple outputs
ARM: dts: sun6i: Add support for the status led
ARM: dts: sun6i: Add EHCI support for the M9 board
ARM: dts: sunxi: Add regulator-boot-on property to ahci-5v regulator
ARM: dts: sun7i: Cubietruck: add power supply regulator for USB OTG VBUS
ARM: dts: sun7i: Cubietruck: override regulator pin
ARM: sun7i: dtsi: add support for usbphy0
ARM: dtsi: sunxi: add common VBUS regulator
ARM: dts: sunxi: Banana Pi: increase startup-delay for the GMAC PHY regulator
ARM: sun5i: olinuxino: Relicense the device tree under GPLv2/X11
ARM: sun4i: cubieboard: Relicense the device tree under GPLv2/X11
ARM: sun7i: pcduino3: Relicense the device tree under GPLv2/X11
ARM: sun4i: pcduino: Relicense the device tree under GPLv2/X11
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "The i.MX device tree changes for 3.19" from Shawn Guo:
- Device additions for board vf610-colibri, pwm, backlight, I2C, RTC,
ADC etc.
- Update i.MX6 phyFLEX board to include PCIe, CAN and audio support
- Improve SSI clocks description for i.MX5 platforms
- Add ENET2 support for imx6sx-sdb board
- Add device tree source for LS1021A SoC, board QDS and TWR
- Enable cpufreq support for i.MX53
- Enable VPU device support for i.MX6QDL
- Enable poweroff support for i.MX6 SoCs
- Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q
- Create generic base device trees for Vybrid and add support for
Colibri VF50
Note: the change set is built on top of imx-soc-3.19 to resolve the
dependency that "ARM: dts: imx53: add cpufreq-dt support" uses the
clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM
clock".
* tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (51 commits)
ARM: dts: imx6q-tbs2910: Enable snvs-poweroff
ARM: dts: imx6: add pm_power_off support for i.mx6 chips
ARM: dts: vf-colibri: add USB regulators
ARM: dts: imx6: phyFLEX: Add CAN support
ARM: dts: imx6: phyFLEX: Add PCIe
ARM: dts: imx6: phyFLEX: Set correct interrupt for pmic
ARM: dts: imx6: phyFLEX: Enable gpmi in module file
ARM: dts: imx6: phyFLEX: set nodes in alphabetical order
ARM: dts: vf-colibri-eval-v3.dts: Enable ST-M41T0M6 RTC
ARM: dts: vf-colibri: Add I2C support
ARM: dts: imx6qdl: Enable CODA960 VPU
ARM: dts: imx6q-tbs2910: Remove unneeded 'fsl,mode' property
ARM: dts: vf610: enable USB misc/phy nodes where necessary
ARM: dts: vf610: use new GPIO support
ARM: dts: pbab01: enable I2S audio on phyFLEX-i.MX6 boards
ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02
ARM: dts: vf500-colibri: add Colibri VF50 support
ARM: dts: vf610: create generic base device trees
ARM: dts: vf610: assign oscillator to clock module
dt-bindings: arm: add Freescale LS1021A SoC device tree binding
...
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
Pull "The i.MX SoC update for 3.19" from Shawn Guo
- Update i.MX6 suspend code to check DDR instead of CPU type, as the
difference we need to handle is between LPDDR2 and DDR3, not SoCs.
- Set anatop properly for LPDDR2 in DSM mode
- Add support for new SoC LS1021A which integrates dual Cortex-A7
- Add ENET initialization for i.MX6SX platform
- Add cpufreq support for i.MX53 platform
- Add a SNVS based poweroff driver for i.MX6 platforms
- Use ARM Global Timer as clocksource on VF610
Note: the change set is built on top of tag imx-fixes-3.18-2 to resolve
a conflict on file arch/arm/mach-imx/clk-vf610.c.
* tag 'imx-soc-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
ARM: imx: clk-vf610: get input clocks from assigned clocks
ARM: imx: Add Freescale LS1021A SMP support
ARM: imx: Add initial support for Freescale LS1021A
ARM: imx53: add cpufreq support
ARM: imx53: clk: add ARM clock
ARM: imx: add CPU clock type
ARM: imx5: add step clock, used when reprogramming PLL1
ARM: imx: add enet init for i.mx6sx
ARM: imx6sx: add imx6sx iomux-gpr field define
ARM: vf610: Add ARM Global Timer clocksource option
ARM: imx: add anatop settings for LPDDR2 when enter DSM mode
ARM: imx: replace cpu type check with ddr type check
ARM: imx: Fix the removal of CONFIG_SPI option
ARM: imx: clk-vf610: define PLL's clock tree
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
Pull "The i.MX cleanup for 3.19" from Shawn Guo:
- Clean up reset handler for DT machines, since reset has been handled
in watchdog driver
- Remove unneeded .map_io hook for a couple of i.MX6 machines
- A few small i.MX6 device tree source cleanups
- Some random iomuxc and pllv3 code cleanup
* tag 'imx-cleanup-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Remove unneeded .map_io initialization
ARM: dts: imx6qdl-sabresd: Fix the microphone route
ARM: imx: refactor mxc_iomux_mode()
ARM: imx: simplify clk_pllv3_prepare()
ARM: imx6q: drop unnecessary semicolon
ARM: imx: clean up machine mxc_arch_reset_init_dt reset init
ARM: dts: imx6qdl-rex: Remove unneeded 'fsl,mode' property
ARM: dts: imx6qdl-gw5x: Remove unneeded 'fsl,mode' property
ARM: dts: imx6qdl-sabresd: Use IMX6QDL_CLK_CKO define
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "More dts changes for omaps to add support for new devices" from Tony Lindgren:
- Add DCAN support am335x, am437x and dra7
- Add devices for sb-t3x computers
- Add support for NovaTech OrionLXm
- Add n900 battery and si4713 support
* tag 'omap-for-v3.19/dt-part2-updated' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits)
ARM: dts: am335x-evm: Add DCAN1 details
ARM: dts: am33xx: Update DCAN nodes
ARM: dts: am33xx: Add control module syscon node
ARM: dts: am437x-gp: Add dcan support
ARM: dts: am4372: Add DCAN nodes
ARM: dts: am4372: Add control module syscon node
ARM: dts: dra72-evm: Add CAN support
ARM: dts: dra7-evm: Add CAN support
ARM: dts: DRA7: Add DCAN nodes
ARM: dts: dra7: Add syscon regmap for CORE CONTROL area
ARM: dts: sbc-t3x30: add audio support
ARM: dts: sbc-t3x: add TV out display alias
ARM: dts: cm-t3x: add TV out support
ARM: dts: cm-t3x: add I2C1 pinmux
ARM: dts: AM43xx: add tscadc DT entries for am437x-evm and am43x-epos-evm
ARM: dts: cm-t3x30: add keypad support
ARM: dts: sb-t35: add EEPROM support
ARM: dts: cm-t3x: add EEPROM support
ARM: OMAP2+: remove cm-t3x touchscreen pdata quirk
ARM: dts: cm-t3x: add ADS7846 touchscreen support
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SoC related changes for omaps including hwmod clean-up for
DSS, and hwmod data for more UARTs and ADC. Also few defconfig
changes to enable devices found on am335x and am437x.
[arnd: I removed the defconfig changes from the branch in order
to cherry-pick them onto the next/defconfig branch, but I did
not change the other commits]
* commit '29c4ce17bcad':
ARM: dts: cm-t3x30: add keypad support
ARM: OMAP2+: hwmod: AM43x: add hwmod support for ADC on AM43xx
ARM: DRA7: hwmod data: Add missing UART hwmod data
ARM: dts: omap4.dtsi: remove dss_fck
ARM: OMAP4: fix RFBI iclk
ARM: OMAP4: hwmod: use MODULEMODE properly
ARM: OMAP4: hwmod: set DSS submodule parent hwmods
ARM: OMAP5: hwmod: set DSS submodule parent hwmods
ARM: OMAP2+: hwmod: add parent_hwmod support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allow to specify CR14, logout area, external damage code
and failed storage address.
Since more then one machine check can be indicated to the guest at
a time we need to combine all indication bits with already pending
requests.
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
This patch adapts handling of local interrupts to be more compliant with
the z/Architecture Principles of Operation and introduces a data
structure
which allows more efficient handling of interrupts.
* get rid of li->active flag, use bitmap instead
* Keep interrupts in a bitmap instead of a list
* Deliver interrupts in the order of their priority as defined in the
PoP
* Use a second bitmap for sigp emergency requests, as a CPU can have
one request pending from every other CPU in the system.
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
