Some of the Armada 375/38x DTs that were recently submitted were still
using the old-style /include/ instead of the new-style, C-preprocessor
based #include. Since we are going to start including more headers,
switching to the C-preprocessor based includes is important.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to support other SoC, it's required to distinguish
the 'control' timer register, from the 'rstout' register
that enables system reset on watchdog expiration.
To prevent a compatibility break, this commit adds a fallback
to a hardcoded RSTOUT address.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add device tree fragments and files to support many of the kirkwood
based Synology NAS devices. This is a modification of
Andrew Lunn's <andrew@lunn.ch> translation of the board setup file
maintained by Ben Peddell <klightspeed@killerwolves.net>
The Ricoh RS5C372 RTC was used in all 2009 units and some 2010 units.
All other Synology Kirkwood-based DiskStations and RackStations use
the Seiko S35390A RTC.
Most of the 1-bay and 2-bay units use the GPIOs that are multiplexed
with the built-in SATA interface activity/presence pins on mpp 20-23,
while the 4-bay units use ge01 and a PCIe SATA controller, and put the
software controlled HDD leds on mpp 36-43.
Most of the 6281 units with HDD power controls use mpp 29 and 31, while
most of the 6282 units with HDD power controls use mpp 30, 34, 44 and 45
and provide a model ID on mpp 28, 29, 46 and 47. Pre-2012 units and
most 4-bay units didn't have a separate power control for HDD1. These
power controls are presumably to limit startup current from the 12V
brick power supply.
Instead of using separate dtsi files in a synology directory, this
patch uses a single dtsi file containing all of the modules for
these boards, with all of the modules not common to all boards
disabled. The board dts files then enable the appropriate modules for
their boards.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Tested-by: Ben Peddell <klightspeed@killerwolves.net> (ds211j)
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds the basic support for the Armada 380 and Armada 385
SOCs. These SoCs share most of their IP with the Armada 370/XP
SoCs. The main difference is the use of a Cortex A9 CPU instead of the
PJ4B CPU. The Armada 380 is a single core Cortex-A9, while the Armada
385 is a dual-core Cortex-A9.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 38x will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Early versions of Armada 375 SoC have a bug where the BootROM leaves
an external data abort pending. The kernel is hit by this data abort
as soon as it enters userspace, because it unmasks the data aborts at
this moment. We register a custom abort handler below to ignore the
first data abort to work around this problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds the basic support for the Armada 375 SOCs. These SoCs
share most of their IP with the Armada 370/XP SoCs. The main
difference is the use of a Cortex A9 CPU instead of the PJ4B CPU. The
interrupt controller and the L2 cache controller are also different
they are respectively the GIC and the PL310.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 375 will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The system controller block in the Armada 375 has different register
offsets for the system reset and other related functions. Therefore,
this commit introduces the new "armada-375-system-controller"
compatible string to identify the Armada 375 variant of the system
controller.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Until now, the CPU_PJ4B Kconfig option was selected by
MACH_ARMADA_MVEBU, i.e for all Armada MVEBU SOCs. In preparation to
the introduction of Cortex-A9 based Armada MVEBU SOCs, this selection
is moved down to the Armada 370 and Armada XP specific options.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Due to a mistake made when merging Armada 370 and Armada XP DT machine
structures, the name of the structure was incorrectly chosen as being
ARMADA_XP_DT, while the structure also covers Armada 370. Therefore,
we rename the structure to ARMADA_370_XP_DT.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In preparation to the introduction of the support of Armada 375 and
Armada 38x, this commit renames arch/arm/mach-mvebu/armada-370-xp.c to
arch/arm/mach-mvebu/board-v7.c. The board-v7.c name as we expect this
file to ultimately contain the DT_MACHINE_START definitions for all
ARMv7 Marvell EBU platforms (370, 375, 38x, XP and Dove as of today).
In relation to this file rename, this commit also:
* Renames the hidden Kconfig symbol MACH_ARMADA_370_XP to
MACH_MVEBU_V7. This hidden symbol is selected by the various
per-SoC visible Kconfig options to trigger the build of board-v7.c.
* Renames a certain number of functions in board-v7.c so that their
armada_370_xp prefix is replaced by a mvebu prefix. The .dt_compat
array keeps its armada_370_xp prefix because the new SOCs will be
introduced with separate .dt_compat arrays, due to the need for
different SMP operations.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Merge "mvebu defconfig changes for v3.15" from Jason Cooper:
- dove
- remove UBI support
- enable watchdog
- mvebu
- rename mvebu_defconfig mvebu_v7_defconfig
- enable audio
- enable watchdog
- add Armada 375 and 38x
* tag 'mvebu-defconfig-3.15' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update defconfigs for Armada 375 and 38x
ARM: dove: Enable watchdog support in the defconfig
ARM: mvebu: Enable watchdog support in defconfig
ARM: mvebu: enable audio options in mvebu_defconfig
ARM: mvebu: rename mvebu_defconfig to mvebu_v7_defconfig
ARM: dove: Remove UBI support from defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "mvebu soc changes for v3.15" from Jason Cooper:
- mvebu
- Makefile cleanup and remove map_io
- use of_find_matching_node_and_match
* tag 'mvebu-soc-3.15' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: remove unneeded ->map_io field for Armada 370/XP
ARM: mvebu: make use of of_find_matching_node_and_match
ARM: mvebu: Makefile clean-up
Signed-off-by: Olof Johansson <olof@lixom.net>
for non SMP build, NR_CPUS is 1 and hence the code complains with below
warnings.
arch/arm/mach-omap2/cpuidle44xx.c:207:8: warning: array subscript is above array bounds [-Warray-bounds]
arch/arm/mach-omap2/cpuidle44xx.c:212:11: warning: array subscript is above array bounds [-Warray-bounds]
Kill it by making array size fixed.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without enabling the workaround for ARM errata 430973 thumb
compiled userland crashes randomly on the Nokia N900.
Signed-off-by: Sebastian Reichel <sre@debian.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Several OMAP clock/PM/device data fixes for v3.14-rc. There's an OMAP5
reboot fix in there, plus a clock fix for rate computations involving
x2 multipliers.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/prcm-fixes-a-v3.14-rc/20140219131753/
Note that most full-chip PM is broken since the v3.14 merge; it's
not caused by this series.
Merge "mvebu DT changes for v3.15" from Jason Cooper:
- kirkwood
- new board QNAP 419
- new board Excito Bubba B3
- mvebu
- use gpio and input defines for Armada 370/XP boards
* tag 'mvebu-dt-3.15' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: use input DT defines in Armada 370/XP boards
ARM: mvebu: use GPIO DT defines in Armada 370/XP boards
ARM: Kirkwood: Add DT description of QNAP 419
ARM: Kirkwood: Add support for Excito Bubba B3
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Integrator/Versatile base patch stack for the v3.15 series"
from Linus Walleij:
"this is a set of patches I have sent for review and failed to get ACKs
from the proper subsystem maintainers after repeated pings. However I
now need to have this rotated in linux-next as a base for multiplatform,
so please pull it in, it is all ARM drivers anyway. Russell pointed out
some things and these have been fixed and iterated in this series."
- Move integrator clock definitions to the device tree, alter
clock and timer drivers accordingly.
- Alter the VIC irqchip driver to support cascaded VICs off
a parent IRQ controller.
- Update the IM-PD1 plugin code to use managed resources.
- Register the VIC on the IM-PD1.
- Select the PL061 GPIO block for the IM-PD1 on the
Integrator/AP.
* tag 'integrator-for-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: select GPIO block
ARM: integrator: register the IM-PD1 VIC
ARM: integrator: use managed resources for the IM-PD1
irqchip: support cascaded VICs
irqchip: vic: update the base IRQ member correctly
clk: versatile: respect parent rate in ICST clock
clk: versatile: pass a parent to the ICST clock
ARM: integrator: switch to fetch clocks from device tree
ARM: SP804: make Integrator/CP timer pick clock from DT
ARM: integrator: define clocks in the device trees
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull devicetree fixes from Grant Likely:
"Device tree compatible match order bug fix
This branch contains a bug fix for the way devicetree code identifies
the type of device. Device drivers can contain a list of
of_device_ids, but it more than one entry will match, then the device
driver may choose the wrong one. Commit 105353145e, "match each node
compatible against all given matches first", was queued for v3.14 but
ended up causing other bugs. Commit 06b29e76a7 attempted to fix it
but it had other bugs. Merely reverting the fix and waiting until
v3.15 isn't a good option because there is code in v3.14 that depends
on the revised behaviour to boot.
This branch should finally fixes the problem correctly. This time
instead of just hoping that the patch is correct, this branch also
adds new testcases that validate the behaviour.
The changes in this branch are larger than I would like for a -rc
pull, but moving the test case data out of out of arch/arm so that it
could be validated on other architectures was important"
* tag 'dt-for-linus' of git://git.secretlab.ca/git/linux:
of: Add self test for of_match_node()
of: Move testcase FDT data into drivers/of
of: reimplement the matching method for __of_match_node()
Revert "of: search the best compatible match first in __of_match_node()"
Allows us to probe the performance counters on Krait CPUs.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
[olof: Moved 8960 contents to the dtsi instead]
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently, when the kernel is configured with LPAE support, but the
CPU doesn't support it, the error message is fairly cryptic:
Error: unrecognized/unsupported processor variant (0x561f5811).
This messages is normally shown when there is an issue when comparing
the processor ID (CP15 0, c0, c0) with the values/masks described in
proc-v7.S. However, the same message is displayed when LPAE support is
enabled in the kernel configuration, but not available in the CPU,
after looking at ID_MMFR0 (CP15 0, c0, c1, 4). Having the same error
message is highly misleading.
This commit improves this by showing a different error message when
this situation occurs:
Error: Kernel with LPAE support, but CPU does not support LPAE.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cortex-A12 implements Performance Monitors compliant with the PMUv2
architecture.
This patch adds support for the Cortex-A12 PMU to the ARM perf backend.
Signed-off-by: Albin Tonnerre <albin.tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The ARM perf backend can discover the type of PMU it needs to drive
either from DT or by probing a CPU it is running on. For
Cortex-A{5,7,15} there are no platforms in mainline not using dt, and
this probing won't work well for big.LITTLE systems with heterogeneous
PMUs.
This patch drops the probing for those CPUs, relying on information from
dt instead. Future platforms should describe their PMU(s) with dt.
Suggested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Since we indirect all of our PMU IRQ handling through a dispatcher, it's
trivial to hook up perf_sample_event_took to prevent applications such
as oprofile from generating interrupt storms due to an unrealisticly
low sample period.
Reported-by: Robert Richter <rric@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Krait supports a set of performance monitor region event
selection registers (PMRESR) sitting behind a cp15 based
interface that extend the architected PMU events to include Krait
CPU and Venum VFP specific events. To use these events the user
is expected to program the region register (PMRESRn) with the
event code shifted into the group they care about and then point
the PMNx event at that region+group combo by writing a
PMRESRn_GROUPx event. Add support for this hardware.
Note: the raw event number is a pure software construct that
allows us to map the multi-dimensional number space of regions,
groups, and event codes into a flat event number space suitable
for use by the perf framework.
This is based on code originally written by Ashwin Chaugule and
Neil Leeder [1].
[1] https://www.codeaurora.org/cgit/quic/la/kernel/msm/tree/arch/arm/kernel/perf_event_msm_krait.c?h=msm-3.4
Cc: Neil Leeder <nleeder@codeaurora.org>
Cc: Ashwin Chaugule <ashwinc@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On Krait processors we have a many-to-one relationship between
raw CPU events and the event programmed into the PMNx counter.
Two raw CPU events could map to the same value programmed in the
PMNx counter. To avoid this problem, we check for collisions
during the get_event_idx() callback by setting a bit in a bitmap
whenever a certain event is used in a PMNx counter (see the next
patch). Unfortunately, we don't have a hook to clear this bit in
the bitmap when the event is deleted so let's add an optional
clear_event_idx() callback for this purpose.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
We want to inspect the of_node that the pdev is pointing to in
the Krait CPU specific PMU initialization function. Assign it
earlier so that we don't crash with a NULL pointer dereference.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Some CPU PMUs are wired up with one PPI for all the CPUs instead
of with a different SPI for each CPU. Add support for these
devices.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
DT nodes that contain a reg property should include a unit address in
their name. Add the missing unit addresses.
The unit address in a node name must match the value in the reg property.
Fix the cases where they don't match.
Don't fix the /clocks/* node names yet; that causes problems the clock
driver to attempt to register multiple clocks with the same name, which
fails.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This patch adds support for SATA on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for GPMI-NAND on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for USB_HOST on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for USB_OTG on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The compatible property should be m41t62, not mt41t62, so fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Pull cgroup fixes from Tejun Heo:
"Quite a few fixes this time.
Three locking fixes, all marked for -stable. A couple error path
fixes and some misc fixes. Hugh found a bug in memcg offlining
sequence and we thought we could fix that from cgroup core side but
that turned out to be insufficient and got reverted. A different fix
has been applied to -mm"
* 'for-3.14-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup:
cgroup: update cgroup_enable_task_cg_lists() to grab siglock
Revert "cgroup: use an ordered workqueue for cgroup destruction"
cgroup: protect modifications to cgroup_idr with cgroup_mutex
cgroup: fix locking in cgroup_cfts_commit()
cgroup: fix error return from cgroup_create()
cgroup: fix error return value in cgroup_mount()
cgroup: use an ordered workqueue for cgroup destruction
nfs: include xattr.h from fs/nfs/nfs3proc.c
cpuset: update MAINTAINERS entry
arm, pm, vmpressure: add missing slab.h includes
Pull DMA-mapping fixes from Marek Szyprowski:
"This contains fixes for incorrect atomic test in dma-mapping subsystem
for ARM and x86 architecture"
* 'fixes-for-v3.14' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
x86: dma-mapping: fix GFP_ATOMIC macro usage
ARM: dma-mapping: fix GFP_ATOMIC macro usage
Add the necessary nodes to support SMP on MSM8660, MSM8960, and
MSM8974/APQ8074. While we're here also add in the error
interrupts for the Krait cache error detection.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
[sboyd: Split into separate patch, add error interrupts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Unlike other build products in the Linux kernel, there is no 'make
*install' mechanism to put devicetree blobs in a standard place.
This commit adds a new 'dtbs_install' make target which copies all of
the dtbs into the INSTALL_DTBS_PATH directory. INSTALL_DTBS_PATH can be
set before calling make to change the default install directory. If not
set then it defaults to:
$INSTALL_PATH/dtbs/$KERNELRELEASE.
This is done to keep dtbs from different kernel versions separate until
things have settled down. Once the dtbs are stable, and not so strongly
linked to the kernel version, the devicetree files will most likely move
to their own repo. Users will need to upgrade install scripts at that
time.
v7: (reworked by Grant Likely)
- Moved rules from arch/arm/Makefile to arch/arm/boot/dts/Makefile so
that each dtb install could have a separate target and be reported as
part of the make output.
- Fixed dependency problem to ensure $KERNELRELEASE is calculated before
attempting to install
- Removed option to call external script. Copying the files should be
sufficient and a build system can post-process the install directory.
Despite the fact an external script is used for installing the kernel,
I don't think that is a pattern that should be encouraged. I would
rather see buildroot type tools post process the install directory to
rename or move dtb files after installing to a staging directory.
- Plus it is easy to add a hook after the fact without blocking the
rest of this feature.
- Move the helper targets into scripts/Makefile.lib with the rest of the
common dtb rules
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
The address translation of a PCI node don't require anymore the PCI
support in the kernel. This translation is mandatory to be able to
read the SoC ID which is stored in the PCI controller of the mvebu
SoCs.
This patch selects the symbol needed to get only this translation for
all the mvebu platforms.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
The testcase data is usable by any platform. This patch moves it into
the drivers/of directory so it can be included by any architecture.
Using the test cases requires manually adding #include <testcases.dtsi>
to the end of the boards .dtsi file and enabling CONFIG_OF_SELFTEST. Not
pretty though. A useful project would be to make the testcase code
easier to execute.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Merge "Qualcomm ARM Based SoC Updates for v3.15" from Kumar Gala:
* Add support for determining smp ops based on device tree.
* Add DT binding specs for Krait/Scorpion enable method
* Add DT binding specs for various Krait Processor controller complexes
* Add SoC SMP support for Krait Processor Subsystem v1 & v2
* tag 'qcom-soc-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: qcom: Add SMP support for KPSSv2
ARM: qcom: Add SMP support for KPSSv1
devicetree: bindings: Document qcom,saw2 node
devicetree: bindings: Document qcom,kpss-acc
devicetree: bindings: Document Krait/Scorpion cpus and enable-method
ARM: qcom: Re-organize platsmp to make it extensible
ARM: Introduce CPU_METHOD_OF_DECLARE() for cpu hotplug/smp
ARM: qcom: Rename various msm prefixed functions to qcom
clocksource: qcom: split building of legacy vs multiplatform support
ARM: qcom: Split Qualcomm support into legacy and multiplatform
clocksource: qcom: Move clocksource code out of mach-msm
ARM: msm: kill off hotplug.c
ARM: msm: Remove pen_release usage
ARM: dts: msm: split out msm8660 and msm8960 soc into dts include
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Ux500 DT conversion" from Linus Walleij:
AB8500 device tree conversion and the deletion of all pin-related
configuration from the Ux500 board files.
* tag 'ab8500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: move last AB8505 set-up to DT
ARM: ux500: move AB8500 clock out pins to DT
ARM: ux500: move AB8500 modem I2C settings to DT
ARM: ux500: move AB8500 EXTCPENA from board file to DT
ARM: ux500: move AB8500 DMIC settings to DT
ARM: ux500: move AB8500 USB UICC settings to DT
ARM: ux500: move AB8500 audio interface 1 settings to DT
ARM: ux500: move AB8500 PWM out settings to device tree
ARM: ux500: move AB8500 YCBCR settings to device tree
ARM: ux500: move AB8500 GPIOs to device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "General cleanups for MSM/QCOM for 3.15" from Kumar Gala:
Split of the multiplatform support for the Qualcomm SoCs into a mach-qcom
while we leave mach-msm as legacy support. Also, some smp and device tree
related cleanups.
* tag 'qcom-cleanup-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: qcom: Rename various msm prefixed functions to qcom
clocksource: qcom: split building of legacy vs multiplatform support
ARM: qcom: Split Qualcomm support into legacy and multiplatform
clocksource: qcom: Move clocksource code out of mach-msm
ARM: msm: kill off hotplug.c
ARM: msm: Remove pen_release usage
ARM: dts: msm: split out msm8660 and msm8960 soc into dts include
Signed-off-by: Olof Johansson <olof@lixom.net>
