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1695 Commits

Author SHA1 Message Date
Tom Rini
b73d114213 pytest: Fix squashfs tests not checking for directory exists
It is possible that we will have our "sqfs_src" directory already
existing, and not be in an error condition.  Don't try and make the
directory again.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-25 14:28:10 -05:00
Tom Rini
c0b354ed02 Azure/GitLab: Ensure we use requirements.txt for testsuites
Given that test/py/requirements.txt has all required test modules, make
use of that rather than a manual pip install list before running our
assorted tool testsuites.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-25 13:47:36 -05:00
Tom Rini
01585fbf6b pytest: Lower pygit2 requirement
The latest versions of pygit2 are not available in practically any
distribution at this time.  Furthermore, we don't need the latest in
order to run all of our testsuites.  Reduce this version requirement to
something older that meets our needs while still supporting running our
tests on older hosts (and so, test labs).

Reported-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-25 13:22:43 -05:00
Tom Rini
4e238b7c1a GitLab: Remove "tags" stanzas
Given the structure of our current GitLab tests, we don't make real use
of the tags.  Furthermore, these tags prevent the automatic usage of the
default GitLab runners.  Remove these tags.

Reported-by: Roger Meier <r.meier@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-25 13:20:07 -05:00
Tom Rini
c28d5d704d Merge branch '2021-02-25-remove-platforms'
- Remove various older platforms that are missing DM migrations and have
  had their removal ack'd.
2021-02-25 13:18:27 -05:00
Tom Rini
2cc6071ed4 ppc: Remove MPC8569MDS board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.  As this is the last ARCH_MPC8569 board, remove that support
as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-25 11:59:54 -05:00
Tom Rini
24b0212dd8 ppc: configs: Remove a few non-updated build configurations
In the cases of T2080RDB_SECURE_BOOT, T2080RDB_SRIO_PCIE_BOOT,
P2041RDB_SECURE_BOOT, P2041RDB_SRIO_PCIE_BOOT, P3041DS_SRIO_PCIE_BOOT
and P4080DS_SRIO_PCIE_BOOT while some forms of the board have been
migrated more fully to current build standards, these have not.  Remove
them.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-25 11:59:53 -05:00
Tom Rini
93ef93b60b arm: Remove sksimx6 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2021-02-25 11:59:53 -05:00
Tom Rini
53ad2db946 arm: Remove mx53smd board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:06 -05:00
Tom Rini
1c4bd238b5 arm: Remove mx53ard board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:05 -05:00
Tom Rini
2610bf14b5 arm: Remove mx25pdk board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:05 -05:00
Tom Rini
53e0fef5a7 Merge branch '2021-02-24-assorted-fixes'
- squashfs, btrfs fixes
- Kconfig CONFIG logic fixes
- hikey DM migration
- Some portability fixes for the build system
- Assorted code cleanups
2021-02-25 08:20:54 -05:00
Siew Chin Lim
2f7aa89703 common: Add "ifndef __ASSEMBLY__" in asm/global_data.h
Commit "common: Drop asm/global_data.h from common header" added
asm/global_data.h into secure.h. However, secure.h will be included
by psci.S. Adding asm/global_data.h has caused compilation failure in
pcsi.S. Add "ifndef __ASSEMBLY__" in asm/global_data.h.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:49 -05:00
Heinrich Schuchardt
df88a0e5cd net: cortina_ni: buffer overrun
When copying to a u32 field we should use sizeof(u32) and not
sizeof(*u32) in memcpy.

On 64bit systems like cortina_presidio-asic-emmc_defconfig using
sizeof(*u32) leads to a buffer overrun.

Fixes: febe13b438 ("net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2021-02-24 16:51:49 -05:00
Heinrich Schuchardt
6b0431dc21 mtd: rawnand: cortina_nand: missing initialization
ca_do_bch_correction() takes a random value from the stack and starts
counting bitflips from this value. Initialize the counter.

This passed unnoticed as the value is finally ignored in the call
hierarchy.

Fixes: 161df94b3c ("mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-24 16:51:49 -05:00
Heinrich Schuchardt
f0bbcdef1b dm: ddr: socfpga: don't assign values that are not used
The values of left_edge[0] and right_edge[0] are overwritten before they
are used. Remove the superfluous assignments.

Fixes: 285b3cb939 ("dm: ddr: socfpga: fix gen5 ddr driver to not use bss")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:49 -05:00
Siew Chin Lim
277b879906 lib: sha512: include "compiler.h"
Include "compiler.h" in sha512.c. This is needed by 'cpu_to_be64' macro
that used in 'sha512_base_do_finalize' function.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:49 -05:00
Peter Robinson
391a16b710 rng: iProc rng200: Rename ..._platdata variables to just ..._plat
In 8a8d24bd Simon dropped data from all the various _platdata calls
but it seems this wasn't caught for the RNG200 driver from when it
was posted to merged. This fixes that issue.

Fixes: 537f0018 (rng: Add iProc RNG200 driver)
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2021-02-24 16:51:49 -05:00
Heinrich Schuchardt
d5f85303bc test: missing dependency for test/cmd/setexpr.c
test/cmd/setexpr.c cannot be linked with CONFIG_CMD_SETEXPR=n:

ld.bfd: test/built-in.o: in function `setexpr_test_sub':
test/cmd/setexpr.c:227: undefined reference to `setexpr_regex_sub'
ld.bfd: test/built-in.o: in function `setexpr_test_backref':
test/cmd/setexpr.c:267: undefined reference to `setexpr_regex_sub'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:48 -05:00
Heinrich Schuchardt
bc18f31e4a lib: rsa: struct udevice build warning
Avoid build warnings observed with gcc 10.2

In file included from lib/rsa/rsa-keyprop.c:16:
include/u-boot/rsa-mod-exp.h:65:24: warning:
‘struct udevice’ declared inside parameter list will not be visible
outside of this definition or declaration
   65 | int rsa_mod_exp(struct udevice *dev, const uint8_t *sig,
      | uint32_t sig_len,
      |                        ^~~~~~~
include/u-boot/rsa-mod-exp.h:96:24: warning:
‘struct udevice’ declared inside parameter list will not be visible
outside of this definition or declaration
   96 |  int (*mod_exp)(struct udevice *dev, const uint8_t *sig,
      |

by defining struct udevice.

Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:48 -05:00
Matthias Brugger
872b1921d3 configs: BPI-R2: Disable EFI Grub workaround
The EFI Grub workaround on BananaPi R2 slows down the boot process to
the point, that the watchdog will trigger a reboot before the kernel can
reset it. Fix this by disabeling the workaround.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-24 16:51:48 -05:00
Sean Anderson
8f684bc120 lib: rsa: Add debug message on algo mismatch
Currently we fail silently if there is an algorithm mismatch. To help
distinguish this failure condition.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2021-02-24 16:51:48 -05:00
Diego Sueiro
9abe5e6803 vexpress64_fvp: Set DRAM to 4G to match with kernel devicetree
Currently, the kernel devicetree is setting the DRAM size to ~4G.

Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
2021-02-24 16:51:48 -05:00
Vincent Stehlé
25d34b936c virtio: fix off by one device id comparison
VIRTIO_ID_MAX_NUM is the largest device ID plus 1. Therefore a device id
cannot be greater or equal to VIRTIO_ID_MAX_NUM. Fix the comparison
accordingly.

Fixes: 8fb49b4c7a ("dm: Add a new uclass driver for VirtIO transport devices")
Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2021-02-24 16:51:48 -05:00
Roger Pau Monne
e420a38fa6 build/DTC: fix sed usage in DTC command
Current sed usage in the DTC command relies on GNU sed specific -i
option which has a slightly different syntax for BSD sed and always
expects an extension to be provided in order to create a backup file.

Instead drop the cat concatenation done before the sed call and use
sed itself to edit and concatenate the files.

No functional change intended.

Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
2021-02-24 16:51:48 -05:00
Roger Pau Monne
9907847245 scripts/check-config.sh: fix to be compatible with BSD sed
Fist use extended regexp in order to drop the '\' around the
parentheses which is not supported by BSD sed in regular mode.

Secondly use [[:blank:]] instead of \s, as the later is a GNU
extension.

No functional change intended.

Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:48 -05:00
Heinrich Schuchardt
c6bf4f3898 malloc: adjust memcpy() and memset() definitions.
Compiling the sandbox fails on armv7 due to conflicting definitions of
memcpy() and memset() in include/malloc.h and include/linux/string.h.

Use linux/string.h here.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:48 -05:00
Peter Robinson
db5f1a50ef config: hikey: convert to DM_USB and DM_ETH
Convert the hikey to use DM_USB and DM_ETH.

Conversion based on rpi as it has a similar DWC config.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2021-02-24 16:51:48 -05:00
Marek Behún
a70abcff5e cmd: pinmux: depend on PINCTRL
The pinmux command uses functions pinctrl_get_pin_*(), which are missing
if PINCTRL config option is disabled.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:48 -05:00
Klaus Heinrich Kiwi
4e040b4d24 Makefile: Add (default) DEVICE_TREE to SPL FIT
U-boot allows the default device tree to be overridden from
the build environment using the DEVICE_TREE variable.

Make sure that we include it in the SPL FIT mkimage build step.

This also fixes a broken image in case CONFIG_OF_LIST and
CONFIG_OF_OVERLAY_LIST are unset (i.e., expected to be supplied
by the DEVICE_TREE env var).

Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
2021-02-24 16:51:48 -05:00
Klaus Heinrich Kiwi
bdb7f2632b Kconfig: SPL_FIT_SIGNATURE requires SPL_LOAD_FIT
Having the ability to support firmware FIT signatures on the SPL sounds
not so useful if the SPL is not supporting to load a (U-boot) firmware
as a FIT image.

Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
2021-02-24 16:51:48 -05:00
Klaus Heinrich Kiwi
6ce28132b8 Kconfig: SPL_FIT_SIGNATURE selects FIT_SIGNATURE
Selecting SPL_FIT_SIGNATURE (without selecting U-boot proper
verified boot first) breaks the build due to
CONFIG_FIT_SIGNATURE_MAX_SIZE being undefined, in addition to Kconfig
warnings on RSA and IMAGE_SIGN_INFO unmet dependencies.

Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
2021-02-24 16:51:48 -05:00
Marek Behún
c65365d7ad fs: btrfs: change directory list output to be aligned as before
Since commit 325dd1f642 ("fs: btrfs: Use btrfs_iter_dir() to ...")
when btrfs is listing a directory, the output is not aligned:

  <SYMLINK>         15  Wed Sep 09 13:20:03 2020  boot.scr -> @/boot/boot.scr
  <DIR>          0  Tue Feb 02 12:42:09 2021  @
  <FILE>        108  Tue Feb 02 12:54:04 2021  1.info

Return back to how it was displayed previously, i.e.:

  <SYM>         15  Wed Sep 09 13:20:03 2020  boot.scr -> @/boot/boot.scr
  <DIR>          0  Tue Feb 02 12:42:09 2021  @
  <   >        108  Tue Feb 02 12:54:04 2021  1.info

Instead of '<FILE>', print '<   >', as ext4 driver.

If an unknown directory item type is encountered, we will print the type
number left padded with spaces, enclosed by '?', instead of '<' and '>',
i.e.:

  ? 30?        .............................  name

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Fixes: 325dd1f642 ("fs: btrfs: Use btrfs_iter_dir() to replace ...")
Cc: David Sterba <dsterba@suse.com>
Cc: Qu Wenruo <wqu@suse.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-02-24 16:51:48 -05:00
Marek Behún
e4cecb5667 fs: btrfs: skip xattrs in directory listing
Skip xattrs in directory listing. U-Boot filesystem drivers do not list
xattrs.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: David Sterba <dsterba@suse.com>
Cc: Qu Wenruo <wqu@suse.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-02-24 16:51:48 -05:00
Wasim Khan
402558b1fe cmd: fdt: skip board specific fixup using env variable
Sometimes it is useful to boot OS with already fixed-up
device tree. Check for env variable 'skip_board_fixup'
before calling ft_board_setup().
Current behaviour is unchanged, additionally user can
set skip_board_fixup to 1 to skip the fixup.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
2021-02-24 16:51:48 -05:00
Heinrich Schuchardt
220fa478fb fs/squashfs: NULL dereference in sqfs_closedir()
sqfs_opendir() called in sqfs_size(), sqfs_read(), sqfs_exists() may fail
leading to sqfs_closedir(NULL) being called. Do not dereference NULL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-24 16:51:48 -05:00
Tom Rini
da7991b38e cmd: pwm: Rework argc sanity checking
Currently, we check argc in a number of places to make sure that we have
all of the required arguments for each of the pwm sub-commands.
However, there's at least one place where we've got dead code as we'll
never have argc == 0, due to checking that argc was at least 4 earlier
and having only subtracted 3.  Rework things so that when we have
determined our subcommand make sure we have the right number of
arguments for it, or error out.  This means we can stop checking against
argc again later.

Reported-by: Coverity (CID: 316601)
Cc: Pragnesh Patel <pragnesh.patel@sifive.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-24 16:51:48 -05:00
Tom Rini
cbe607b920 Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
2021-02-23 10:45:55 -05:00
Brandon Maier
d9aa19efa8 spi: zynqmp_gqspi: fix set_speed bug on multiple runs
If zynqmp_qspi_set_speed() is called multiple times with the same speed,
then on the second call it will skip recalculating the baud_rate_val as
it assumes the speed is already configured correctly. But it will still
write the baud_rate_val to the configuration register and call
zynqmp_gqspi_set_tapdelay(). Because it skipped recalculating the
baud_rate_val, it will use the initial value of 0 . This causes the
driver to run at maximum speed which for many spi flashes is too fast and
causes data corruption.

Instead only write out a new baud_rate_val if we have calculated the
correct baud_rate_val.

This opens up another issue with the "if (speed == 0)", we don't save
off the new plat->speed_hz value when setting the baud rate on the
speed=0 path. Instead mimic what the Linux zynqmp gqspi driver does, and
have speed==0 just use the same calculation as a normal speed. That will
cause the baud_rate_val to use the slowest speed possible, which is the
safest option.

Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: jagan@amarulasolutions.com
CC: michal.simek@xilinx.com
CC: Ashok Reddy Soma <ashokred@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
3600d47b73 arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT name
Folder names corresponds to DT name. These boards have been renamed from
zc1275 to zcu1275 by commit shown below and this should be the part of that
commit.

Fixes: 420d446781 ("arm64: zynqmp: Rename zc1275 to zcu1275")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
a13a82186e net: gem: Fix error path in zynq_gem_probe
Clean up error path in connection where priv->rxbuffers and priv->tx_bd are
allocated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
T Karthik Reddy
ea4d4cb39a net: gem: Enable ethernet rx clock for versal
Enable rx clock along with tx clock for versal platform. Use compatible
data to enable/disable clocks in the driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-02-23 14:56:59 +01:00
T Karthik Reddy
8faa7913a4 i2c: i2c_cdns: Enable i2c clock
Enable i2c controller clock from driver probe function
by calling clk_enable().

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-23 14:56:59 +01:00
T Karthik Reddy
60b03f1cc4 clk: versal: Add support to enable clocks
Add clock enable functionality in versal clock driver to enable
clocks from peripheral drivers using clk_ops.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
T Karthik Reddy
a72a6ae362 clk: zynqmp: Add support to enable clocks
Add clock enable functionality in zynqmp clock driver to enable
clocks from peripheral drivers using clk_ops.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
9b7aac7536 clk: zynq: Add dummy clock enable function
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c11 ("clk: fixed_rate: add dummy enable() function").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
3aba25bc38 arm64: zynqmp: Do not clear reset reason
There is no need to clear reset reason register because it is protected by
PMUFW already which is reported when verbose log is enabled as:
pm_core.c@733 APU> No write permission to 0xFF5E0220

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michael Walle
8c02d842b6 fpga: zynqpl: fix buffer alignment
Due to pointer arithmetic, "sizeof(u32) * ARCH_DMA_MINALIGN" is
subtracted. It seems that the original intention was to just subtract
ARCH_DMA_MINALIGN. Fix it.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:55 +01:00
Tom Rini
8f7a16aac3 Merge tag 'u-boot-amlogic-20210222' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- adds adc-keys button driver
- fix meson-saradc driver to get reference voltage
- add adc-keys test for sandbox
- enable adc-keys for VIM3 & VIM3L boards
- fix button.h build
2021-02-22 12:37:02 -05:00
Tom Rini
bced796e2d Merge tag 'ti-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix ethernet on J721e
- Sync am335x DT nodes from Linux 5.9-rc7
- Minor Clock fixes
2021-02-22 09:12:04 -05:00
Tom Rini
a3ddc776fa Merge tag 'video-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- splash_source warning fix when building with 64-bit toolchains
 - lq123p1jx31 and nv101wxmn51 compatible in simple panel driver
 - remove not used mb862xx driver
 - add Himax HX8238D panel driver
 - s/video_uc_platdata/video_uc_plat/
2021-02-22 09:11:27 -05:00
Tom Rini
3c2ec6cb31 Merge branch '2021-02-21-mpc83xx-updates'
- mpc8379erdb DM_MMC conversion
- kmeter1 updates
- qe_uec fixes
2021-02-22 09:06:36 -05:00
Neil Armstrong
2d339efb1f button: add udevice forward declaration
After 401d1c4f5d ("common: Drop asm/global_data.h from common header")
build fails with :

drivers/button/button-uclass.c:13:5: error: conflicting types for 'button_get_by_label'
int button_get_by_label(const char *label, struct udevice **devp)
    ^~~~~~~~~~~~~~~~~~~

Adding struct udevice forward declaration in button.h solves the build error.

Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22 11:07:57 +01:00
Dario Binacchi
d67da448ff arch: sandbox: fix typo in clk.h
Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22 11:39:49 +05:30
Dario Binacchi
ecec33faa1 clk: remove a redundant header
The linux/err.h header file was included twice.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22 11:39:49 +05:30
Dario Binacchi
252ee3c5b9 arm: dts: sync am33xx-clocks with Linux 5.9-rc7
The commit 6337d53fdf ("arm: dts: sync am33xx with Linux 5.9-rc7")
synchronized the am33xx-clocks.dtsi file with Linux 5.9-rc7 with the
exception of two nodes. I think I was wrong and it is better to keep
the two files similar and possibly make changes to the *-u-boot.dtsi
files.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-22 11:39:48 +05:30
Dario Binacchi
d242a14533 clk: ti: improve debug messages for clkctrl driver
The previous version printed the same debug message for both the enable
and disable routines without highlighting whether you were enabling or
disabling the module. It is now clear whether you are enabling or
disabling the module.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-22 11:39:48 +05:30
Rasmus Villemoes
44a7cc82b3 uec.h: fix COFIG_DM typo
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21 18:46:41 -05:00
Rasmus Villemoes
69bd7dfc3a dm_qe_uec.c: fix indentation in uec_set_mac_if_mode()
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21 18:46:41 -05:00
Rasmus Villemoes
bdf319273b mdio-uclass.c: support fixed-link subnodes
When trying to port our mpc8309-based board to DM_ETH, on top of
Heiko's patches, I found that nothing in mdio-uclass.c seems to
support the use of a fixed-link subnode of the ethernet DT node. That
is, the ethernet node looks like

		enet0: ethernet@2000 {
			device_type = "network";
			compatible = "ucc_geth";
			...
			fixed-link {
				reg = <0xffffffff>;
				speed = <100>;
				full-duplex;
			};

but the current code expects there to be phy-handle property. Adding
that, i.e.

			phy-handle = <&enet0phy>;
			enet0phy: fixed-link {

just makes the code break a few lines later since a fixed-link node
doesn't have a reg property. Ignoring the dtc complaint and adding a
dummy reg property, we of course hit "can't find MDIO bus for node
ethernet@2000" since indeed, the parent node of the phy node does not
represent an MDIO bus. So that's obviously the wrong path.

Now, in linux, it seems that the fixed link case is treated specially;
in the of_phy_get_and_connect() which roughly corresponds to
dm_eth_connect_phy_handle() we have

    if (of_phy_is_fixed_link(np)) {
        ret = of_phy_register_fixed_link(np);
        ...
    } else {
        phy_np = of_parse_phandle(np, "phy-handle", 0);
	...
    }

    phy = of_phy_connect(dev, phy_np, hndlr, 0, iface);

And U-Boot's phy_connect() does have support for fixed-link
subnodes. Calling phy_connect() directly with NULL bus and a dummy
address does seem to make the ethernet work.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21 18:46:41 -05:00
Heiko Schocher
397ecc30b8 mpc83xx: kmeter1: increase malloc_f space
make malloc space before relocation bigger, set

CONFIG_SYS_MALLOC_F_LEN=0x800

Signed-off-by: Heiko Schocher <hs@denx.de>
2021-02-21 18:46:41 -05:00
Heiko Schocher
71523efc61 mpc83xx: kmeter1_defconfig add missing BAT4 config
BAT4 setup missed in defconfig, add it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2021-02-21 18:46:41 -05:00
Sinan Akman
a2c48cb757 mpc8379erdb: Convert to DM_MMC
Signed-off-by: Sinan Akman <sinan@writeme.com>
2021-02-21 18:46:41 -05:00
Sinan Akman
cbc3cd02a1 mpc8379erdb: Add device tree
Signed-off-by: Sinan Akman <sinan@writeme.com>
2021-02-21 18:45:26 -05:00
Tom Rini
bbc0fcc302 Merge tag 'efi-2021-04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-04-rc3

Bug fixes:

* Let EFI simple file protocol access last block of partition
* Correct conversion of multi-part device paths in
  EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText()

Documentation:

* booti and qfw man-pages
2021-02-21 11:17:30 -05:00
Tom Rini
b732c8780c Merge tag 'for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for v2021.04

new feature:
- Allow disabling driver model for I2C in SPL

fixes:
- i2c-gpio: Fix GPIO output
- at91: fix crash when using 'i2c probe'
2021-02-21 11:17:07 -05:00
Tom Rini
72993e8e03 Merge branch 'master' of git://git.denx.de/u-boot-sh
- RCar Gen3 updates
2021-02-21 11:16:38 -05:00
Heinrich Schuchardt
d46bee8c2d doc: qfw man-page
Provide a man-page for the qfw command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21 09:21:36 +01:00
Heinrich Schuchardt
bd3d75bb0c efi_loader: multi part device paths to text
Our current implementation of
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() truncates multi
part device paths after the first part. We should convert all parts.

Render device path instance ends as commas. This is not explicitly
described in the UEFI spec but mimics what EDK II does.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-02-21 09:21:35 +01:00
Heinrich Schuchardt
1edfc3fa9b efi_selftest: multi part device path to text
Test EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() for a multi
part device path.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-02-21 09:21:35 +01:00
Heinrich Schuchardt
512f092da2 efi_selftest: compiler flags for dtbdump.o
Fix a typo. Apply the correct compiler flags to dtbdump.o.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21 09:21:35 +01:00
Heinrich Schuchardt
f228049297 doc: booti man-page
Provide a man-page for the booti command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-21 09:21:35 +01:00
Heinrich Schuchardt
3af8d1c44c doc/README.distro: kernel_comp_addr_r
Add missing articles and preposition.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21 09:21:35 +01:00
Heinrich Schuchardt
611e7f860a doc: Add reference to U-Boot project in conf.py
With the last update of conf.py the references to U-Boot where replaced by
references to Linux.

Fix the project references in the generated documentation.

Reported-by: Simon Glass <sjg@chromium.org>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: 98f01cf7a2 ("doc: update Kernel documentation build system")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21 09:21:35 +01:00
Jesper Schmitz Mouridsen
e67beffee0 Allow last block to be read
The last block is of size media->block_size

Signed-off-by: Jesper Schmitz Mouridsen <jesper@schmitz.computer>

Simplify expression.
Apply same change to efi_disk_write_blocks().

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21 09:21:35 +01:00
Igor Opaniuk
2147a16983 dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.

CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.

All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
     's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-21 06:08:00 +01:00
Igor Opaniuk
a907dce88e board: freescale: drop CONFIG_DM_I2C undefs
Drop CONFIG_DM_I2C undefs from board header files, and make them
disabled on these boards in defconfigs instead.

Disabling on Kconfig symbol was done automatically with this script:

cd configs
files=(*ls1046a*)
files2=(*T104*RDB*)
files3=(ls1021atwr_*)
files4=("imx8mp_evk_defconfig phycore-imx8mp_defconfig")
combine=("${files[@]}" "${files2[@]}" "${files3[@]}" "${files4[@]}")
cd ..

for item in ${combine[*]}
do
   echo "Adjusting  $item"
   echo "# CONFIG_SPL_DM_I2C is not set" >> configs/$item
   make $item && make savedefconfig && cp defconfig configs/$item
done

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-21 06:07:45 +01:00
Igor Opaniuk
d1f3abe1e7 dm: i2c: allow disabling driver model in SPL
At present if U-Boot proper uses driver model for I2C, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.

This patch introduces a separate Kconfig symbols for enabling DM_I2C and
DM_I2C_GPIO support in SPL.

This will also help to get away from dirty workarounds to
achieve non-DM I2C support for SPL, which is currently used in some
board header files like:

ifdef CONFIG_SPL_BUILD
undef CONFIG_DM_I2C
endif

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-21 06:07:30 +01:00
Eugen Hristev
73c16692bc i2c: at91: fix crash when using 'i2c probe'
When issuing 'i2c probe', the driver was crashing, because at probe
there is a request with zero length buffer to write to i2c bus.
The xfer_msg function assumes the buffer is always there, and never
checks for the buffer length.

=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses:
data abort
pc : [<7ffa97dc>]          lr : [<7ffa96f8>]
reloc pc : [<66f277dc>]    lr : [<66f276f8>]
sp : 7fb7c110  ip : 7ff87a28     fp : 7ff99938
r10: 00000002  r9 : 7fb7dec0     r8 : 00000000
r7 : e181c600  r6 : 7fb88c20     r5 : 00000000  r4 : 7fb7c128
r3 : 00000000  r2 : 00000001     r1 : 00000000  r0 : 00000009
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
Code: eb0092f4 e1a00005 e8bd81f0 e594300c (e5d33000)
Resetting CPU ...

Fixes: 8800e0fa20 ("i2c: atmel: add i2c driver")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-02-21 06:05:08 +01:00
Harm Berntsen
6befb51f34 i2c: i2c-gpio: Fix GPIO output
The dm_gpio_set_dir_flags function cannot be used to update the
configuration of a GPIO pin because it does a bitwise OR with the
existing flags. Looks like commit 788ea83412 ("gpio: add function
_dm_gpio_set_dir_flags") has introduced this behaviour and the i2c-gpio
driver has been broken since.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Heiko Schocher <hs@denx.de>
CC: Patrick Delaunay <patrick.delaunay@st.com>
2021-02-21 06:04:49 +01:00
Marek Vasut
c98cc9b2e8 ARM: rmobile: Enable CONFIG_PCI_REGION_MULTI_ENTRY on RCar3
R-Car3 can have multiple regions of type memory in DT, enable
CONFIG_PCI_REGION_MULTI_ENTRY to handle those instead of using
just one of the memory regions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-02-20 22:38:28 +01:00
Marek Vasut
06183ac5f5 pci: renesas: Fix BAR mapping on Gen3
Because the first PCIExAR(n) register is configured with the mapping,
It is the second PCIExAR(n) register that must be written with 0, not
the last one. Update the n from 4 to 1 to select the correct register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20 22:38:28 +01:00
Marek Vasut
b169ef1798 pci: renesas: Make map address and mask power of two on Gen3
Both the map address and mask must be power of two per documentation,
adjust the code accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20 22:38:28 +01:00
Marek Vasut
b9616d8f90 pci: renesas: Add root bus handling on Gen3
Add code to access the PCIe root bus space and configure it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20 22:38:28 +01:00
Tom Rini
ea966d24ef Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H616 clock fix to enable video PLL
- sunxi-common.h cleanups
- support for UART1 as the console on sun8i
- removing wrong linux,stdout-path from DTs
2021-02-19 21:06:16 -05:00
Andre Przywara
e036a1d227 fdt/sunxi: Remove OF_STDOUT_PATH
OF_STDOUT_PATH was meant to hold the devicetree path to the serial
console, to be put into the linux,stdout-path property of the chosen node.

The only user of that was sunxi, and it was actually wrong for years
there: the paths hardcoded in sunxi_common.h were not matching the DTs,
evident by the leading 0's in nodenames, which have been removed years
ago.

On top of that, "linux,stdout-path" is now deprecated for a while (Linux
commit 2a9d832cc9aae from November 2014), and also all modern DTs
(including those included in U-Boot) carry a "stdout-path" property
already.

So remove the stanza from sunxi_common.h, and, since this was the last
user, also remove the associated bits from the rest of U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 23:29:47 +00:00
Tobias Schramm
7f4e294b57 sunxi: support boot console on uart1 for sun8i
The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on
GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins
as boot console.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-02-19 23:28:50 +00:00
Samuel Holland
c12c76d352 sunxi: Remove dead ifdefs in sunxi-common.h
As variables were moved to Kconfig, some of the surrounding ifdefs were
left around, even though they were empty. Clean them up.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-02-19 23:28:50 +00:00
Jernej Skrabec
bc24884c4c sunxi: spl: Fix H616 clock initialization
It turns out that there is a magic bit in PRCM region which seemingly
makes PLLs work if it's enabled. Sadly, there is no documentation what
it does exactly, so we'll just mimick BSP boot0 behaviour and enable it
before any clock is set up.

Fixes: b18bd53d6c ("sunxi: introduce support for H616 clocks")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-02-19 23:28:50 +00:00
Moses Christopher
0f425612c8 drivers: video: Add Support for Himax HX8238D Panel
* SPI based initialization for HX8238D
* Resolution: 320x240
* Color-Mode: RGB

* Initial Work is done by Sjoerd Simons
  https://gitlab.apertis.org/packaging/u-boot/-/blob\
  /5f259720e3e64965d50da89a841ad6eb256a47df/debian/patches\
  /apertis/powertools/0005-video-Add-Himax-HX8238-D-driver.patch

* Tested on Bosch Guardian Board

Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2021-02-19 23:38:06 +01:00
Dario Binacchi
196947b103 Replace video_uc_platdata with video_uc_plat
The video_uc_platdata structure no longer exists. It has been renamed
video_uc_plat.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-19 22:45:47 +01:00
Heinrich Schuchardt
3e831bfed4 video: remove unused include/mb862xx.h
CONFIG_VIDEO_MB862xx cannot be selected by any configuration.
So we can eliminate include/mb862xx.h.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 22:36:56 +01:00
Heinrich Schuchardt
9c1e098fb9 video: eliminate unused drivers/video/mb862xx.c
The mb862xx driver does not conform to the driver model and is unused.
Eliminate it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 22:35:49 +01:00
Alper Nebi Yasak
f457680ffb video: simple_panel: Add boe,nv101wxmn51 display
Add "boe,nv101wxmn51" to the compatible node. This is the panel for
chromebook_bob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 22:26:57 +01:00
Alper Nebi Yasak
92a8143c17 video: simple_panel: Add sharp,lq123p1jx31 display
Add "sharp,lq123p1jx31" to the compatible node. This is the panel for
chromebook_kevin.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 22:26:39 +01:00
Jaehoon Chung
a0b74acb9b common: splash_source: fix -Wint-to-pointer-cast warning
Fix -Wint-to-pointer-cast warning

common/splash_source.c: In function 'splash_load_raw':
common/splash_source.c:100:12: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  100 |  bmp_hdr = (struct bmp_header *)bmp_load_addr;
      |            ^
common/splash_source.c: In function 'splash_sf_read_raw':
common/splash_source.c:39:47: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   39 |  return spi_flash_read(sf, offset, read_size, (void *)bmp_load_addr);
      |                                               ^

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 22:17:10 +01:00
Tom Rini
a1a652e801 Merge tag 'mmc-2021-2-19' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- mmc_spi improvement
- added mmc-pwrseq to remove duplicated code
- fix response timeout after switch command
- sdhci: skip cache invalidation if DMA is not used
2021-02-19 11:56:14 -05:00
Jaehoon Chung
144d0574d5 configs: enable CONFIG_MMC_PWRSEQ configuration
Enable CONFIG_MMC_PWRSEQ configuration about boards that is using
rockchip_dw_mmc driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:11:33 +08:00
Jaehoon Chung
ba74bc1a0e ARM: mach-meson: select MMC_PWRSEQ config
Before time, PWRSEQ is selected since below commit.
commit 262d343633 ("board: amlogic: select PWRSEQ for all amlogic platform")
Select MMC_PWRSEQ config because of introducing CONFIG_MMC_PWRSEQ for
only eMMC module.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:11:21 +08:00
Jaehoon Chung
9d7e6611a0 mmc: rockchip_dw_mmc: use mmc_pwrseq instead of rockchip_mmc_pwrseq
Use mmc_pwrseq instead of rockchip_mmc_pwrseq.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:11:08 +08:00
Jaehoon Chung
a96ea4d8d5 mmc: meson_gx_mmc: use mmc_pwrseq instead of meson_mmc_pwrseq
Use mmc_pwrseq instead of meson_mmc_pwrseq.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-19 15:10:46 +08:00
Jaehoon Chung
caee38aef7 mmc: pwrseq: add mmc-pwrseq file to provide a generic interface
Add mmc-pwrseq file to provide a generic interface.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:10:41 +08:00
Bin Meng
46938abd2c mmc: mmc_spi: Document the 3 local functions
mmc_spi_sendcmd(), mmc_spi_readdata() and mmc_spi_writedata() are
currently undocumented. Add comment blocks to explain the arguments
and the return value.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:08:03 +08:00
Bin Meng
2f22cb40e5 mmc: mmc_spi: Fix potential spec violation in receiving card response
After command is sent and before card response shows up on the line,
there is a variable number of clock cycles in between called Ncr.
The spec [1] says the minimum is 1 byte and the maximum is 8 bytes.

Current logic in mmc_spi_sendcmd() has a flaw that it could only work
with certain SD cards with their Ncr being just 1 byte.

When resp_match is false, the codes try to receive only 1 byte from
the SD card. On the other hand when resp_match is true, the logic
happens to be no problem as it loops until timeout to receive as many
bytes as possible to see a match of the expected resp_match_value.
However not every call to mmc_spi_sendcmd() is made with resp_match
being true hence this exposes a potential issue with SD cards that
have a larger Ncr value.

Given no issue was reported as of today, we can reasonably conclude
that all cards being used on the supported boards happen to have a 1
byte Ncr timing requirement. But a broken case can be triggered by
utilizing QEMU to emulate a larger value of Ncr (by default 1 byte
Ncr is used on QEMU). This commit fixes such potential spec violation
to improve the card compatibility.

[1] "Physical Layer Specification Version 8.00"
     chapter 7.5.1: Command / Response
     chapter 7.5.4: Timing Values

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:07:53 +08:00
Bin Meng
781aad0de9 mmc: mmc_spi: Move argument check to the beginning of mmc_spi_sendcmd()
The argument check should happen before any transfer on the SPI lines.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:07:30 +08:00
Bin Meng
01962f8d7c mmc: mmc_spi: Print verbose debug output when crc16 check fails
Add some verbose debug output when crc16 check fails.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:06:53 +08:00
Stefan Bosch
8e2b0af721 mmc: fix response timeout after switch command
After issuing the switch command: Wait until 'current state' of the card
status becomes 'tran'. This prevents from response timeout at the next
command because of 'current state' = 'data'.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:04:15 +08:00
Yuezhang.Mo@sony.com
37e1362efc mmc: sdhci: skip cache invalidation if DMA is not used
If DMA(SDMA or ADMA) is not used, the cache invalidation
after reading is no need, should be skipped. Otherwise
U-Boot may hang at the cache invalidation.

Found this issue and tested this fix on DragonBoard 410c.

Fixes: commit 4155ad9aac ("mmc: sdhci: fix missing cache invalidation after reading by DMA")

Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Andy Wu <Andy.Wu@sony.com>
2021-02-19 15:03:25 +08:00
Jaehoon Chung
1019b19665 cmd: mmc: update the mmc command's usage about argument
It's confusing whether arguments are optional or mandatory.
Update the command's usage to clarify how to use.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19 15:00:34 +08:00
Jaehoon Chung
52ff04a216 mmc: initialize an err variable
Initialize an err variable to 0.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reported-by: Coverity (CID: 313548)
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-19 14:59:28 +08:00
Tom Rini
766927a759 Merge branch '2021-02-18-SPL-FIT-OP-TEE-Linux-improvements'
- Improve interactions between SPL / OP-TEE and Linux in FIT images
2021-02-18 12:02:11 -05:00
Ramon Fried
2dddc1bb29 net: tftp: Avoid sending extra ack on completion
in tftpboot, if ack was already sent previously for this
packet, don't send again.

Fixes: cc6b87ecaa ("net: tftp: Add client support for RFC 7440")

Reported-by: Suneel Garapati <suneelglinux@gmail.com>
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Suneel Garapati <suneelglinux@gmail.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
2021-02-18 08:20:34 -05:00
Tom Rini
56f1bcc4b7 Merge tag 'rpi-next-2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- add iProc RNG2000 driver for RPi4
- add support for CM4 and RPi400
2021-02-18 08:06:26 -05:00
Nicolas Saenz Julienne
0059ef0be9 video: arm: rpi: Add brcm,bcm2711-hdmi0 compatible
The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of
'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6
instead of VC4). This has no functional change as far as u-boot driver
is concerned. So simply add the compatible string.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:59:08 +01:00
Nicolas Saenz Julienne
74a9f68f7f configs: rpi4: Enable DM_DMA across all RPi4 configurations
The DM_DMA option is needed in order to translate physical address into
bus addresses on a per-device basis.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:59:08 +01:00
Nicolas Saenz Julienne
c89c96d322 mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys()
This will allow us to use DM variants of phys_to_bus()/bus_to_phys()
when relevant.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:59:08 +01:00
Nicolas Saenz Julienne
1a474559d9 xhci: translate virtual addresses into the bus's address space
So far we've been content with passing physical addresses when
configuring memory addresses into XHCI controllers, but not all
platforms have buses with transparent mappings. Specifically the
Raspberry Pi 4 might introduce an offset to memory accesses incoming
from its PCIe port.

Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these
limitations, and make sure we don't break non DM users.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: fix compilation for 32 bit]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>

fix from nicolas
2021-02-18 11:56:26 +01:00
Nicolas Saenz Julienne
30b20e6b3f dm: test: Add test case for dev_phys_to_bus()/dev_bus_to_phys()
By reusing DT nodes already available in sandbox's test DT introduce a
test to validate dev_phys_to_bus()/dev_bus_to_phys().

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
2a15a25c36 dm: Introduce dev_phys_to_bus()/dev_bus_to_phys()
These functions, instead of relying on hard-coded platform-specific
address translations, make use of the DMA constraints provided by the DM
core. This allows for per-device translations.

We can't yet get rid of the legacy phys_to_bus()/bus_to_phys()
implementations as some of its users are not integrated into the
device model.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
e88018769c dm: test: Add test case for dev->dma_offset
Add test to validate dev->dma_offset is properly set on devices.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
4abf68d57d dm: Introduce DMA constraints into the core device model
Calculating the DMA offset between a bus address space and CPU's every
time we call phys_to_bus() and bus_to_phys() isn't ideal performance
wise, as it implies traversing the device tree from the device's node up
to the root. Since this information is static and available before the
device's initialization, parse it before the probe call an provide the
DMA offset in 'struct udevice' for the address translation code to use
it.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
283628c412 dm: test: Add test case for dev_get_dma_ranges()
Introduce some new nodes in sandbox's test device-tree and dm tests in
order to validate dev_get_dma_range().

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
51bdb50904 dm: Introduce xxx_get_dma_range()
Add the following functions to get a specific device's DMA ranges:
 - dev_get_dma_range()
 - ofnode_get_dma_range()
 - of_get_dma_range()
 - fdt_get_dma_range()
They are specially useful in oder to be able validate a physical address
space range into a bus's and to convert addresses from and to address
spaces.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
c709243ee0 pci: pcie-brcmstb: Fix inbound window configurations
So far we've assumed a fixed configuration for inbound windows as we had
a single user for this controller. But the controller's DMA constraints
were improved starting with BCM2711's B1 revision of the SoC, notably
available in CM4 and Pi400. They allow for wider inbound windows. We can
now cover the whole address space, whereas before we where limited to
the lower 3GB.

This information is passed to us through DT's 'dma-ranges' property and
it's specially important for us to honor it since some interactions with
the board's co-processor assume we're doing so (specifically the XHCI
firmware load operation, which is handled by the co-processor after
u-boot has correctly configured the PCIe controller).

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
561bce3522 rpi: Add identifier for the new CM4
The Raspberry Pi Foundation released the new Compute Module 4 which we
want to detect, so we can enable Ethernet on it and know the correct
device tree file name.

Note that this sets the Ethernet option to true since the official CM4
IO board has an Ethernet port. But that might not be the case when using
custom ones.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
f10f536281 rpi: Add identifier for the new RPi400
The Raspberry Pi Foundation released the new RPi400 which we want to
detect, so we can enable Ethernet on it and know the correct device tree
file name.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Marek Szyprowski
6b3d18c2cb rpi: limit size of the RAM to the multiple of the MMU_SECTION_SIZE
When RPi4 is booted from USB Mass Storage, the firmware reports 947MiB of
the ARM memory (948 in case of the standard SD-card boot). This value is
not MMU_SECTION_SIZE aligned, so the dram_bank_mmu_setup() skips mapping
of the last 1MiB. This later causes u-boot in ARM 32bit mode to freeze,
because it relocated itself into that unmapped memory and fails to
execute.

Fix this by limiting the size of the first bank to the multiple of
MMU_SECTION_SIZE.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
85f3fddbcc pci: brcmstb: Cleanup controller state before handover
Make sure we handover the PCIe controller in a clean state. Some of the
devices hanging from the PCIe bus might need to be properly reset
through #PERST in order for Linux to be able to initialize them.

This is specially important in order to properly initialize Raspberry Pi
4 B and 400's USB chip.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
e3bbc1f74e usb: xhci-pci: Add DM_FLAG_OS_PREPARE flag
The PCIe bus the controller is connected to might need to be removed
prior the handover. Make sure xhci-pci is also removed so as to avoid
unexpected timeouts or hangs.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Matthias Brugger
1613cf506c config: Enable iProc RNG200 driver in RPi4 configs
We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
config so that it can be used.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: drop rpi_4_32b_defconfig]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:20 +01:00
Marek Szyprowski
289d0ead28 test: add a simple test for the adc-keys button driver
Add adc-keys device to the sandbox/test.dts and connect it to the channel
#3 of the sandbox_adc driver. The default values sampled by sandbox_adc
driver determines that button3 and button4 are released and button5 is
pressed.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Marek Szyprowski
a638fba9fc configs: khadas-vim3(l): enable Function button support
Add options required to check the 'Function' button state.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Marek Szyprowski
97ab802aa3 adc: meson-saradc: add support for getting reference voltage value
Add support for getting the 'vref-supply' regulator and register it as
ADC's reference voltage regulator, so clients can translate sampled ADC
values to the voltage.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Marek Szyprowski
c0165c85c3 button: add a simple Analog to Digital Converter device based button driver
Add a simple Analog to Digital Converter device based button driver. This
driver binds to the 'adc-keys' device tree node.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Marek Szyprowski
e1b03d6b0b dt-bindings: input: adc-keys bindings documentation
Dump adc-keys bindings documentation from Linux kernel source tree from
commit 698dc0cf9447 ("dt-bindings: input: adc-keys: clarify
description").

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Alexandru Gagniuc
71551055cb spl: fit: Load devicetree when a Linux payload is found
When a FIT config specifies a devicetree, we should load it, no
questions asked. In the case of the "simple" FIT loading path, a
difficulty arises in selecting the load address of the FDT.

The default FDT location is right after the "kernel" or "firmware"
image. However, if that is an OP-TEE image, then the FDT may end up in
secure DRAM, and not be accessible to normal world kernels.

Although the best solution is to be more careful about the FDT
address, a viable workaround is to only append the FDT after a u-boot
or Linux image. This is identical to the previous logic, except that
FDT loading is extended to IH_OS_LINUX images.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-02-17 19:46:43 -05:00
Alexandru Gagniuc
aeedeae407 spl: fit: Replace #ifdef blocks with more readable constructs
Use the IS_ENABLED() macro to control code flow, instead of the
caveman approach of sprinkling #ifdefs. Code size is not affected, as
the linker garbage-collects unused functions. However, readability is
improved significantly.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-17 19:46:43 -05:00
Alexandru Gagniuc
9e30423978 image: Do not #if guard board_fit_image_post_process() prototype
There's no point in guarding function prototypes with #ifdefs. If a
function is not defined, the linker will notice. Having the prototype
does not affect code size.

What the #if guard takes away is the ability to use IS_ENABLED:

	if (CONFIG_IS ENABLED(FIT_IMAGE_POST_PROCESS))
		board_fit_image_post_process(...)

When the prototype is guarded, the above form cannot be used. This
leads to the proliferation of #ifdefs, and unreadable code. The
opportunity cost of the #if guard outweighs any benefits. Remove it.

Since the original version of this patch, an empty definition was
added by commit f14e6eec6c ("image: cleanup pre-processor usage").
The empty definition can cause silent failures, when an implementation
of board_fit_image_post_process() is expected because the linker will
not catch the missing function. Thus this patch removes this empty
inline declaration.

Fixes: f14e6eec6c ("image: cleanup pre-processor usage")
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-17 19:46:43 -05:00
Alexandru Gagniuc
9e9aa0b473 spl: fit: Only look up FIT configuration node once
The configuration node a sub node under "/configurations", which
describes the components to load from "/images". We only need to
locate this node once.

However, for each component, spl_fit_get_image_name() would parse the
FIT image, looking for the correct node. Such work duplication is not
necessary. Instead, once the node is found, cache it, and re-use it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-17 19:46:43 -05:00
Alexandru Gagniuc
e4928270a4 spl: fit: Remove useless loop in spl_fit_get_image_name()
When a desired configuration is not found, conf_node will have a
negative value. Thus the for loop will start at the root "/" node of
the image, print the "/description" property, and stop.

It appears the intent of the loop was to print the names of the
subnodes under "/configurations". We would need the offset to the
"/configurations" node, which is abstracted by fit_find_config_node().

This change agrees that abstracting the node offset is the correct
design, and we shouldn't be parsing the configurations manually. Thus
the loop in spl_fit_get_image_name() is useless. Remove it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-17 19:46:43 -05:00
Alexandru Gagniuc
3dc2079733 spl: fit: Pass FIT context via a structure pointer
Several loose arguments describe the FIT image. They are thus related,
and it makes sense to pass them together, in a structure. Examples
include the FIT blob pointer, offset to FDT nodes, and the offset to
external data.

Use a spl_fit_info structure to group these parameters.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-17 19:46:42 -05:00
Alexandru Gagniuc
917fa369f6 spl: fit: Factor out FIT parsing and use a context struct
The logical steps in spl_load_simple_fit() are difficult to follow.
I think the long comments, ifdefs, and ungodly number of variables
seriously affect the readability. In particular, it violates section 6
of the coding style, paragraphs (3), and (4).

The purpose of this patch is to improve the situation by
  - Factoring out initialization and parsing to separate functions
  - Reduce the number of variables by using a context structure
This change introduces no functional changes.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-17 17:12:45 -05:00
Alexandru Gagniuc
efc4ad0bc7 spl: fit: Drop 'length' argument to board_spl_fit_post_load()
The size is derived from the FIT image itself. Any alignment
requirements are machine-specific and known by the board code. Thus
the total length can be derived from the FIT image and knowledge of
the platform. The 'length' argument is redundant. Remove it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Matt Porter <mporter@konsulko.com>
2021-02-17 17:12:45 -05:00
Matthias Brugger
537f00182f rng: Add iProc RNG200 driver
Add support for random number generator RNG200.
This is for example found on RPi4.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: adapt to new struct driver memebers]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-16 23:24:06 +01:00
Tom Rini
496f49464d Merge branch '2021-02-16-assorted-improvements'
- DSA switch support (Layerscape platforms)
- IOMUX cleanup / fixes
- i2c OP-TEE trampoline driver
2021-02-16 15:14:34 -05:00
Alex Marginean
d003434525 configs: ls1028a: Enable the Ethernet switch driver in defconfig
The switch driver for LS1028A Ethernet switch is now compiled in for
the NXP LS1028A reference design boards and for the Kontron SMARC-sAL28.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
2021-02-16 12:38:36 -05:00
Alex Marginean
cc32fd911a arm: dts: ls1028a: Add Ethernet switch node and dependencies
The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.  The switch node has the same structure as in Linux
and this patch enables it (and relevant ports) for the LS1028A RDB board.

ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled.  Ethernet port aliases were also
added to better manage the multitude of ports available now.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2021-02-16 12:38:36 -05:00
Alex Marginean
71a2d1e7b8 drivers: net: Add Felix DSA switch driver
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-02-16 12:38:36 -05:00
Claudiu Manoil
fc054d563b net: Introduce DSA class for Ethernet switches
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-02-16 11:48:20 -05:00
Vladimir Oltean
d0781c95bc net: phy: introduce fixed_phy_create for DSA CPU ports
The DSA (Distributed Switch Architecture) implementation has made a
design decision when it got introduced to the Linux kernel in 2008.
That was to hide away from the user the CPU-facing Ethernet MAC, since
it does not make sense to register it as a struct net_device (UCLASS_ETH
udevice for U-Boot), because that would never be beneficial for a user:
they would not be able to use it for traffic, since conceptually, a
packet delivered to the CPU port should loop back into the system.

Nonetheless, DSA has had numerous growing pains due to the lack of a
struct net_device for the CPU port, but so far it has overcome them.
It is unlikely at this stage of maturity that this aspect of it will
change.

We would like U-Boot to present the same information as Linux, to be at
parity in terms of number of interfaces, so that ethNaddr environment
variables could directly be associated between U-Boot and Linux.
Therefore, we would implicitly like U-Boot to hide the CPU port from the
user as well.

But the paradox is that DSA still needs a struct phy_device to inform
the driver of the parameters of the link that it should configure the
CPU port to. The problem is that the phy_device is typically returned
via a call to phy_connect, which needs an udevice to attach the PHY to,
and to search its ofnode for the 'fixed-link' property. But we don't
have an udevice to present for the CPU port.

Since 99% of DSA setups are MAC-to-MAC connections between the switch
and the host Ethernet controller, the struct phy_device is going to be a
fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY
does not need an MDIO bus, and does not need an attached dev either.
Basically, the phy_connect call doesn't do any connection, it just
creates the fixed PHY.

The proposal of this patch is to introduce a new fixed_phy_create
function which will take a single argument: the ofnode that holds this:

	port@4 {
		reg = <4>;
		phy-mode = "internal";

		fixed-link {
			speed = <2500>;
			full-duplex;
		};
	};

and probe a fixed PHY driver using the information from this ofnode.
DSA will probably be the only user of this function.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
2021-02-16 11:48:20 -05:00
Vladimir Oltean
56a5588340 net: phy: fixed: support speeds of 2500 and 10000
Unlike the Linux fixed PHY driver, the one in U-Boot does not attempt to
emulate the clause 22 register set of a gigabit copper PHY driver
through the swphy framework. Therefore, the limitation of being unable
to support speeds higher than gigabit in fixed-link does not apply to
the U-Boot fixed PHY driver. This makes the fixed-link U-Boot
implementation more similar to the one from phylink, which can work with
any valid link speed.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
2021-02-16 11:48:20 -05:00
Igor Opaniuk
9d1215be92 test: dm: tee: extend with RPC test
Extend existing DM tee tests adding test coverage for reverse RPC calls.
Currently this commit only adds tests for I2C requests from TEE driver
to TEE supplicant, for instance reading/writing data to emulated i2c
eeprom defines in standard sandbox test device tree
(arch/sandbox/dts/test.dtb):

=> i2c bus
Bus 0:	i2c@0  (active 0)
   2c: eeprom@2c, offset len 1, flags 0
   ...

Running TEE tests:
=> ut dm tee
Test: dm_test_tee: tee.c
Test: dm_test_tee: tee.c (flat tree)
Failures: 0

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-02-16 11:48:20 -05:00
Igor Opaniuk
592b98bb9a drivers: tee: sandbox: add rpc test ta emulation
This adds support for RPC test trusted application emulation, which
permits to test reverse RPC calls to TEE supplicant. Currently it covers
requests to the I2C bus from TEE.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-02-16 11:48:20 -05:00
Igor Opaniuk
f4a60b0363 test: py: add pygit2 and pyelftools to requirements.txt
Add pygit2 and pyelftools to the list of packages for virtualenv
needed to run all sets of pytests.This fixes warnings like:

binman.elf_test.TestElf.testDecodeElf (subunit.RemotedTestCase):
Python elftools not available

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-16 11:48:20 -05:00
Jorge Ramirez-Ortiz
4e96356185 drivers: tee: i2c trampoline driver
This commit gives the secure world access to the I2C bus so it can
communicate with I2C slaves (typically those would be secure elements
like the NXP SE050).

A similar service implementation has been merged in linux:
c05210ab ("drivers: optee: allow op-tee to access devices on the i2c
bus")

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-02-16 11:48:20 -05:00
Andy Shevchenko
eb5fd9e46c usb: kbd: destroy device after console is stopped
In case of IOMUX enabled it assumes that console devices in the list
are available to get them stopped properly via ->stop() callback.
However, the USB keyboard driver violates this assumption and tries
to play tricks so the device get destroyed while being listed as
an active console.

Swap the order of device deregistration and IOMUX update along with
converting to use iomux_replace_device() jelper to avoid the use-after-free.

Fixes: 3cbcb28928 ("usb: Fix usb_kbd_deregister when console-muxing is used")
Fixes: 8a83487030 ("dm: usb: Add a remove() method for USB keyboards")
Reported-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:08 -05:00
Andy Shevchenko
694cd5618c IOMUX: Introduce iomux_replace_device()
Some console devices may appear or disappear at run time. In order to
support such a hotplug mechanism introduce a new iomux_replace_device()
helper to update the list of devices without altering environment.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:08 -05:00
Andy Shevchenko
400797cad3 IOMUX: Split out for_each_console_dev() helper macro
It is not only less lines of code, but also better readability
when new macro is being in use. Introduce for_each_console_dev()
helper macro and convert current users to it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:08 -05:00
Andy Shevchenko
b672c1619b IOMUX: Split out iomux_match_device() helper
Deduplicate the code used in a few places by splitting out a common helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:08 -05:00
Andy Shevchenko
658d6c5836 IOMUX: Switch to use stdio_file_to_flags()
Deduplicate code by replacing with stdio_file_to_flags() helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:08 -05:00
Andy Shevchenko
09d8f07762 console: Set file and devices at one go
Logical continuation of the change that brought console_devices_set() is
to unify console_setfile() with it and replace in the callers.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:07 -05:00
Andy Shevchenko
20a7d35148 console: Set console device counter in console_devices_set()
console_devices_set() missed the console device counter to be set correctly.

Fixes: 45375adc97 ("console: add function console_devices_set")
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:07 -05:00
Andy Shevchenko
7b9ca3f89c console: Switch to use stdio_file_to_flags()
Deduplicate code by replacing with stdio_file_to_flags() helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:07 -05:00
Andy Shevchenko
d9b0ac90ba stdio: Introduce a new helper stdio_file_to_flags()
Let's deduplicate existing copies by splitting off to a new helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:07 -05:00
Andy Shevchenko
99cb2b996b stdio: Split out nulldev_register() and move it under #if
It's possible that NULLDEV can be disabled while it makes leftovers,
move entire device under #if.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:07 -05:00
Andy Shevchenko
c090e8f236 stdio: Get rid of dead code, i.e. stdio_deregister()
Nobody is using stdio_deregister(), remove for good.

Note, even its parameters are not consistent with stdio_register().
So, if anyone want to introduce this again, better with some consistency.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-02-16 11:16:07 -05:00
Dario Binacchi
f43d9e904d arm: dts: sync am33xx gpio nodes with Linux 5.9-rc7
Move gpio controller nodes from am33xx.dtsi to am33xx-l4.dtsi. Now both
files are more similar to those found in Linux 5.9-rc7. To be fully
operational as before it was also necessary to fix the am33xx-clock.dtsi
file. It too is now almost the same as the Linux kernel.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-16 10:30:11 +05:30
Vignesh Raghavendra
1e8f246563 ARM: dts: k3-j7200-common-proc-board-u-boot: Fix broken ethernet
Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts
into U-Boot") ranges have been added to CPSW node which results in
U-Boot CPSW driver failing to acquire phy_gmii_sel register range and
thus failing to configure GMII mode correctly.

Fix this by deleting ranges in -u-boot-dtsi just like its done for other
K3 platforms.

Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-02-16 10:29:57 +05:30
Tom Rini
767582cd4c Prepare v2021.04-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 22:34:56 -05:00
Tom Rini
b6f4c75795 Merge branch '2021-02-15-fix-CVE-2021-27097-CVE-2021-27138'
Fix CVE-2021-27097 and CVE-2021-27138.  For more details see
http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-27097 and
http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-27138
2021-02-15 22:31:54 -05:00
Simon Glass
3f04db891a image: Check for unit addresses in FITs
Using unit addresses in a FIT is a security risk. Add a check for this
and disallow it.

CVE-2021-27138

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 22:31:54 -05:00
Simon Glass
124c255731 libfdt: Check for multiple/invalid root nodes
It is possible to construct a devicetree blob with multiple root nodes.
Update fdt_check_full() to check for this, along with a root node with an
invalid name.

CVE-2021-27097

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 22:31:53 -05:00
Simon Glass
6f3c2d8aa5 image: Add an option to do a full check of the FIT
Some strange modifications of the FIT can introduce security risks. Add an
option to check it thoroughly, using libfdt's fdt_check_full() function.

Enable this by default if signature verification is enabled.

CVE-2021-27097

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 22:31:53 -05:00
Simon Glass
c5819701a3 image: Adjust the workings of fit_check_format()
At present this function does not accept a size for the FIT. This means
that it must be read from the FIT itself, introducing potential security
risk. Update the function to include a size parameter, which can be
invalid, in which case fit_check_format() calculates it.

For now no callers pass the size, but this can be updated later.

Also adjust the return value to an error code so that all the different
types of problems can be distinguished by the user.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 22:31:52 -05:00
Simon Glass
d5f3aadacb test: Add tests for the 'evil' vboot attacks
Add tests to check that these two attacks are mitigated by recent patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 19:17:33 -05:00
Simon Glass
fafafacb47 test: Add vboot_evil implementation
Add a library which performs two different attacks on a FIT.

Signed-off-by: Julien Lenoir <julien.lenoir@intel.com>
Signed-off-by: Bruce Monroe <bruce.monroe@intel.com>
Signed-off-by: Arie Haenel <arie.haenel@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-15 19:17:29 -05:00
Simon Glass
79af75f777 fit: Don't allow verification of images with @ nodes
When searching for a node called 'fred', any unit address appended to the
name is ignored by libfdt, meaning that 'fred' can match 'fred@1'. This
means that we cannot be sure that the node originally intended is the one
that is used.

Disallow use of nodes with unit addresses.

Update the forge test also, since it uses @ addresses.

CVE-2021-27138

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 19:17:25 -05:00
Simon Glass
8a7d4cf982 fdt_region: Check for a single root node of the correct name
At present fdt_find_regions() assumes that the FIT is a valid devicetree.
If the FIT has two root nodes this is currently not detected in this
function, nor does libfdt's fdt_check_full() notice. Also it is possible
for the root node to have a name even though it should not.

Add checks for these and return -FDT_ERR_BADSTRUCTURE if a problem is
detected.

CVE-2021-27097

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 19:17:18 -05:00
Tom Rini
6144438fb5 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 13:34:30 -05:00
Tom Rini
2ae80437fb Merge branch '2021-02-02-drop-asm_global_data-when-unused'
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15 10:16:45 -05:00
Tom Rini
76b7936e6f Merge branch '2021-02-14-remove-some-boards'
- Remove some boards that are behind on conversions and have had their
  removal acked or suggested by the relevant maintainers.
2021-02-15 10:16:25 -05:00
Tom Rini
73effc2dca sh: Remove sh7763rdp board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:24 -05:00
Tom Rini
f0debb2136 sh: Remove sh7757lcr board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

As this is the last SH4A board, remove that support as well.

Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:24 -05:00
Tom Rini
0c3cd2443b sh: Remove sh7753evb board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:24 -05:00
Tom Rini
da43d96f03 sh: Remove sh7752evb board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:23 -05:00
Tom Rini
215386e48c sh: Remove r7780mp board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Patch-cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Patch-cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:23 -05:00
Tom Rini
5617351532 sh: Remove MigoR board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:23 -05:00
Tom Rini
865acad78f ppc: Remove MPC8641HPCN board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-15 10:16:21 -05:00
Tom Rini
41bacbe142 ppc: Remove MPC8610HPCD board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-15 10:15:48 -05:00
Tom Rini
2dce449801 ppc: Remove MPC8572DS board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-15 10:15:13 -05:00
Tom Rini
23397775bc ppc: Remove MPC8544DS board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-15 10:14:03 -05:00
Tom Rini
22924317be arm: Remove db-88f6281-bp board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Chris Packham <judge.packham@gmail.com>
2021-02-15 10:11:38 -05:00
Tom Rini
2ce7b65d6d arm: Remove ls2080a_simu board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-15 10:11:38 -05:00
Tom Rini
a1361f4581 arm: Remove mx35pdk board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2021-02-15 10:11:38 -05:00
Tom Rini
8444860ca0 arm: Remove apx4devkit board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lauri Hintsala <lauri.hintsala@silabs.com<mailto:lauri.hintsala@silabs.com>>
Signed-off-by: Tom Rini <trini@konsulko.com<mailto:trini@konsulko.com>>
2021-02-15 10:11:37 -05:00
Tom Rini
e31350c3c4 Revert "fdtdec: Use CONFIG_IS_ENABLED in board_fdt_blob_setup()"
On Rockchip platforms we need this area of code in TPL, but there is no
TPL_SEPARATE_BSS symbol.

This reverts commit 0a2aaab0b6.

Reported-by: Markus Reichl <m.reichl@fivetechno.de>
Reported-by: Jesper Schmitz Mouridsen <jesper@schmitz.computer>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:06:23 -05:00
Tom Rini
a6ba59583a Merge tag 'efi-2021-04-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc2-2

Bug fixes:
* fix stack smashing in UEFI capsule updates
* correct loading of UEFI binaries where Virtual size is not a
  multiple of FileAlignment
* simplify detection of capsule files.
* buildman: use threading.is_alive() instead of removed method IsAlive()
2021-02-14 09:27:46 -05:00
Heinrich Schuchardt
fd434f47d4 buildman: 'Thread' object has no attribute 'isAlive'
The isAlive() method was deprecated in Python 3.8 and has been removed in
Python 3.9. See https://bugs.python.org/issue37804. Use is_alive() instead.

Since Python 2.6 is_alive() has been a synonym for isAlive(). So there
should be no problems for users using elder Python 3 versions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-14 11:32:04 +01:00
Heinrich Schuchardt
15bbcafab1 efi_loader: fix get_last_capsule()
fix get_last_capsule() leads to writes beyond the stack allocated buffer.
This was indicated when enabling the stack protector.

utf16_utf8_strcpy() only stops copying when reaching '\0'. The current
invocation always writes beyond the end of value[].

The output length of utf16_utf8_strcpy() may be longer than the number of
UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15 UTF-8
tokens. Hence, using utf16_utf8_strcpy() without checking the input may
lead to further writes beyond value[].

The current invocation of strict_strtoul() reads beyond the end of value[].

A non-hexadecimal value after "Capsule" (e.g. "CapsuleZZZZ") must result in
an error. We cat catch this by checking the return value of strict_strtoul().

A value that is too short after "Capsule" (e.g. "Capsule0") must result in
an error. We must check the string length of value[].

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-14 10:34:15 +01:00
Heinrich Schuchardt
841f7a4ebb efi_loader: '.' and '..' are directories
'.' and '..' are directories. So when looking for capsule files it is
sufficient to check that the attribute EFI_FILE_DIRECTORY is not set. We
don't have to check for these special names.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-14 10:34:15 +01:00
Asherah Connor
9d30a941cc efi_loader: don't load beyond VirtualSize
PE section table entries' SizeOfRawData must be a multiple of
FileAlignment, and thus may be rounded up and larger than their
VirtualSize.

We should not load beyond the VirtualSize, which is "the total size of
the section when loaded into memory" -- we may clobber real data at the
target in some other section, since we load sections in reverse order
and sections are usually laid out sequentially.

Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-14 10:34:15 +01:00
Tom Rini
7c82e12cc4 Merge tag 'u-boot-atmel-fixes-2021.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel fixes for 2021.04 cycle:

This small PR includes just two fixes but very important: one revert in
the clk subsystem which fixes the boot on many old boards
(sama5d2_xplained, sama5d4_xplained), which currently crash at boot; and
one small fix related to debug serial on sama7g5ek board.
2021-02-12 09:09:10 -05:00
Michael Walle
038e02455b net: gem: unregister mdio bus if probe fails
If probe fails, the mdio bus isn't unregistered. Fix it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-11 19:06:44 +01:00
Eugen Hristev
65bde1c087 clk: at91: compat: partially revert "dm: Remove uses of device_bind_offset()"
Revert changes in at91 compat.c that cause u-boot to fail booting on
sama5d4_xplained and sama5d2_xplained

Log below:

<debug_uart>
No serial driver found
Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Fixes: a2703ce10c ("dm: Remove uses of device_bind_offset()")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-11 09:26:40 +02:00
Eugen Hristev
5dc68b07e7 ARM: dts: at91: sama7g5ek: enable pull-up for serial debug line
If the serial tx/rx are floating, it can happen that bogus characters
are detected on the line at boot time. This leads to U-boot accidentally
thinking someone pressed a key to stop autoboot, thus stopping booting process.
This can happen if the serial cable is not connected. There are hardware
pull-ups on the board connected to serial cable VBUS.
To solve this when the cable is not plugged, enable internal pull-ups as well
for the tx/rx lines.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-02-11 09:26:40 +02:00
Tom Rini
80c7e4cf76 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- MediaTek updates
- xhci fixes
- dwc2 stm32 compatible update
2021-02-10 20:40:08 -05:00
Patrick Delaunay
db8fb2ffc4 usb: dwc2: change compatible st,stm32mp1-hsotg to st,stm32mp15-hsotg
The Linux kernel v5.7-rc1 introduced the compatible "st,stm32mp15-hsotg".

See Linux kernel commit d49850110434 ("dt-bindings: usb: dwc2: add
support for STM32MP15 SoCs USB OTG HS and FS")

This patch updates the supported compatible in DWC2 driver,
removes the add-on done in U-Boot dtsi and keeps the compatible
defined in SOC dtsi arch/arm/dts/stm32mp151.dtsi:

usbotg_hs: usb-otg@49000000 {
	compatible = "st,stm32mp15-hsotg", "snps,dwc2";
	reg = <0x49000000 0x10000>;
...
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-10 22:23:35 +01:00
Stefan Roese
cec804251d usb: xhci: Fix compare to use physical addresses in xhci_bulk_tx()
Testing with v2021.01 on MIPS Octeon has shown, that the latest patch
for the "short packet event trb handling" did introduce a bug on
platforms with virtual address != physical address. This patch fixes
this issue by using the correct address types in the compare (both
physical in this case).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
2021-02-10 22:23:24 +01:00
Pali Rohár
5a5024fee0 usb: xhci-pci: Check for errors from dm_pci_map_bar()
Function dm_pci_map_bar() may fail and returns NULL. Check this to prevent
dereferencing a NULL pointer.

In xhci-pci this may happen when board does not enable CONFIG_PCI_PNP and
PCI_BASE_ADDRESS_0 contains unconfigured zero address.

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-02-10 22:23:24 +01:00
Chunfeng Yun
eb885c98ed dt-bindings: usb: mtk-xhci: add optional properies to disable ports
Add optional properies to disable usb2 or usb3 ports, they are used
when provided ports are not used on some special platforms.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-02-10 22:23:24 +01:00
Chunfeng Yun
04232f78b3 usb: xhci-mtk: support option to disable ports
Add support to disable specific ports, it's useful for some
scenarios:
1. usb3 PHY is shared whith PCIe or SATA, the corresponding
   usb3 port can be disabled;
2. some usb2 or usb3 ports are not used on special platforms,
   they should be disabled to save power.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-02-10 22:23:24 +01:00
Tom Rini
c7182c02ce Merge tag 'u-boot-amlogic-20210210' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Add configuration helpers for MIPI D-PHY
- generic-phy: add configure op
- Add Amlogic AXG MIPI D-PHY driver & MIPI PCIe Analog PHY driver
- odroid: add runtime detection of the N2/N2+/C4/HC4 variants
2021-02-10 07:56:57 -05:00
Michal Simek
98757d87ee xilinx: Show silicon version in SPL
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is
useful to be aware.
The patch is also fixing possition of these bits on ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:21:12 +01:00
Michal Simek
fc3c6fd752 xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP
Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").

Fixes: 506009fc10 ("xilinx: common: Change macro handling in board_fdt_blob_setup()")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:20:27 +01:00
Marek Szyprowski
8bc780106c board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants
Use the ADC channel 1 to check the hardware revision of the board and
detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use
different dtb file, so adjust fdtfile environment variable to the
detected variant.

The ADC min/max values for each variant are taken from the vendor code,
adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit
mode).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
4547551aa0 phy: Add Amlogic AXG MIPI PCIe Analog PHY driver
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission
and Analog part of the PCIe lines.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
7ef19503ba phy: Add Amlogic AXG MIPI D-PHY driver
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI
panels.

This D-PHY depends on a separate analog PHY.

Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
f8da8a82c5 generic-phy: add configure op
Add the PHY configure op callback to the generic PHY uclass to permit
configuring the PHY.

It's useful for MIPI DSI PHYs to setup the link timings.

Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
afef20585a phy: dphy: Add configuration helpers
The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.

These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Tom Rini
8398d95ec2 Merge tag 'u-boot-stm32-20210209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Enable the fastboot oem commands in stm32mp15 defconfig
- Fixes pinctrol for stmfx and stm32
- Add support of I2C6_K in stm32mp15 clock driver
- Alignment with Linux kernel device tree v5.11-rc2 for ST boards
2021-02-09 17:06:44 -05:00
Patrick Delaunay
f050e3fe45 arm: dts: stm32mp15: alignment with v5.11-rc2
Device tree alignment with Linux kernel v5.11-rc2
- fix DCMI DMA features on stm32mp15 family
- Add alternate pinmux for FMC EBI bus
- Harmonize EHCI/OHCI DT nodes name on stm32mp15
- update sdmmc IP version for STM32MP15
- Add LP timer irqs on stm32mp151
- Add LP timer wakeup-source on stm32mp151
- enable HASH by default on stm32mp15
- enable CRC1 by default on stm32mp15
- enable CRYP by default on stm32mp15
- set bus-type in DCMI endpoint for stm32mp157c-ev1 board
- reorder spi4 within stm32mp15-pinctrl
- add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
- fix mdma1 clients channel priority level on stm32mp151
- fix dmamux reg property on stm32mp151
- adjust USB OTG gadget fifo sizes in stm32mp151
- update stm32mp151 for remote proc synchronization support
- support child mfd cells for the stm32mp1 TAMP syscon

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09 10:56:06 +01:00
Fabrice GIRARDOT
2220c2e84d ARM: dts: stm32: Fix cosmetic typo: use 'kHz' as kilohertz abbreviation
The kilohertz unit abbreviation should read 'kHz'.
Note to STM32 team: modified files were generated, it may be worth
to fix STM32CubeMX tool.

Signed-off-by: Fabrice GIRARDOT <fabrice.girardot@flowbird.group>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09 10:35:39 +01:00
Patrick Delaunay
789d764b9e clk: stm32mp1: add support of I2C6_K
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR =
I2C6EN: I2C6 peripheral clocks enable.

This patch allows customer to use I2C6 in SPL or in U-Boot
as other I2C instance, already support in clk driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09 10:34:27 +01:00
Patrick Delaunay
4363aac051 pinctrl: stm32: bind only the enabled GPIO subnode
Bind only the enabled GPIO subnode, to avoid to probe the node
"gpio-controller" present in SOC dtsi (disabled by default) but
not enabled in the included pincontrol dtsi file.

For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent:
 gpioj: gpio@5000b000
 gpiok: gpio@5000c000

Then these GPIO are absent in output of command "dm tree" and
"gpio status -a"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09 10:31:04 +01:00
Patrick Delaunay
1da426919d pinctrl: stm32: correct management pin display of OTYPE
OTYPE can be used for output or for alternate function to select
PP = push-pull or OP = open-drain mode, according reference manual
(Table 81. Port bit configuration table).

This patch removes this indication for input pins and adds it
for AF and output pins for pinmux command output.

Fixes: b305dbc08b ("pinctrl: stm32: display bias information for all pins")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09 10:31:04 +01:00
Patrice Chotard
ca5cc312d4 pinctrl: stmfx: Use PINNAME_SIZE for pin's name size
Instead of redefining a pin's name size, use PINNAME_SIZE defined
in include/dm/pinctrl.h

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09 10:26:01 +01:00
Patrice Chotard
54f5bf3d61 pinctrl: stmfx: Fix pin configuration issue
pin-controller pin's name must be equal to pin's name used in device
tree with "pins" DT property.

Issue detected on stm32mp157c-ev1 board with goodix touchscreen.
In DT, the goodix's pin is declared in DT with the node:

        goodix_pins: goodix {
		pins = "gpio14";
		bias-pull-down;
	};

Whereas in stmfx pin-controller driver, pin's name are equal to
"stmfx_gpioxx" where xx is the pin number.
This lead to not configure stmfx's pins at probe because pins is
identified by its name (see pinctrl_pin_name_to_selector() in
pinctrl-generic.c) and stmfx pin "gpio14" can't be found.

To fix this issue, come back to the original stmfx pin's name.

Revert "pinctrl: stmfx: update pin name"

This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09 10:25:31 +01:00
Patrick Delaunay
8c005c731f configs: stm32mp1: enable the fastboot oem command bootbus
Enable the fastboot oem command bootbus, used to configure the eMMC
boot behavior, with same format than 'mmc bootbus'
and with parameter: boot_bus_width reset_boot_bus_width boot_mode

On stm32mp1 boards the expected command is
$> fastboot oem partconf:0 0 0

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09 10:08:24 +01:00
Patrick Delaunay
6c57154925 configs: stm32mp1: enable the fastboot oem command partconf
Enable the fastboot oem command partconf, used to select the correct
eMMC boot partition, with same format than 'mmc partconf'
with parameter: boot_ack boot_partition
On stm32mp1 family:
- boot_ack = 1 (Boot Acknowledge is needed by ROM code)
- boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot)

So on EV1 board the expected commands to select boot partition 1 or 2
$> fastboot oem partconf:1 1
$> fastboot oem partconf:1 2

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09 10:07:55 +01:00
Jean-Philippe ROMAIN
f35ce379fe configs: stm32mp1: enable the fastboot oem command format
Enable the fastboot oem command format and set the variable
"partitions" with default eMMC partitions list.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09 10:04:13 +01:00
Jean-Philippe ROMAIN
26858a3ee2 configs: stm32mp1: enable fastboot support of eMMC boot partition
Activate fastboot support on boot partition for eMMC, mmc1 device
on STMicroelectronics board (EV1).

Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09 10:02:25 +01:00
Tom Rini
e14d5762de Merge git://git.denx.de/u-boot-marvell
- Espressobin: Set default env values at runtime (Pali)
- Espressobin: Set the maximum slave SPI speed to 40MHz (Pali)
- theadorable: PCIe test code enhancement and early deemphasis
  enabling (Stefan)
- pci_mvebu: Disable config access to PCI host bridge ports (Stefan)
- mv_sdhci: parse device-tree entry (Baruch)
2021-02-08 10:55:51 -05:00
Tom Rini
a10d06add7 Merge git://git.denx.de/u-boot-fsl-qoriq
Layerscape: Enable gpio
Bug fixes & updates related to dspi, qspi, pciep, SVR mask,
stream-id, env variables, mdio for LAyerscape Platforms
Add SATA, network variant 1, 2 support on sl28
powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile
Bug fixes and updates for keymile, Kontron
2021-02-08 10:55:28 -05:00
Tom Rini
88262788fe Merge git://git.denx.de/u-boot-sh
- Beacon EmbeddedWorks RZG2H/N Dev Kit support
2021-02-08 10:54:37 -05:00
Tom Rini
461b754a8b Merge branch 'master' of git://git.denx.de/u-boot-usb 2021-02-08 10:54:01 -05:00
Biwen Li
5e7a207ebf configs: lx2160aqds: enable CMD_GPIO
Enable CMD_GPIO for board lx2160aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:22:39 +05:30
Biwen Li
28e3bfc01f configs: lx2160ardb: enable CMD_GPIO
Enable CMD_GPIO for board lx2160ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
f5a9b76b37 configs: ls1088ardb: enable DM_GPIO and CMD_GPIO
Enable DM_GPIO and CMD_GPIO for board ls1088ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
010e61339f configs: ls1088aqds: enable DM_GPIO and CMD_GPIO
Enable DM_GPIO and CMD_GPIO for board ls1088aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
bf965a2838 configs: ls2088aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls2088aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
1fd573e587 configs: ls2088ardb: enable DM_GPIO and CMD_GPIO
Enable DM_GPIO and CMD_GPIO for board ls2088ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
327c539cea configs: ls1046aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1046aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
ece1fc4fca configs: ls1046ardb: enable CMD_GPIO
Enable CMD_GPIO for board ls1046ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
9c7ae9a6c5 configs: ls1043ardb: enable CMD_GPIO
Enable CMD_GPIO for board ls1043ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
614d28b9d0 configs: ls1043aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1043aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
230b5a6d67 configs: ls1028ardb: enable CMD_GPIO
Enable CMD_GPIO for board ls1028ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
dd5186c530 configs: ls1028aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1028aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
7379bd5246 configs: ls1021atwr: enable CMD_GPIO
Enable CMD_GPIO for ls1021atwr

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
d268833b0d configs: ls1021aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1021aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:22 +05:30
Biwen Li
fb35072ce6 configs: ls1012ardb: enable CMD_GPIO
Enable CMD_GPIO for ls1012ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
0c6dd90119 configs: ls1012afrwy: enable CMD_GPIO
Enable CMD_GPIO for ls1012afrwy

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
d58ea6380e configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
7c1f095aca configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
0077d711c9 configs: ls1046a: enable MPC8XXX_GPIO
Enable MPC8XXX_GPIO for SoC LS1046A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
2a95d7c76f configs: lx2160a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
04f26d616d configs: ls208xa: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for LS208xA

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
97e8120850 configs: ls1088a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for LS1088A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:21 +05:30
Biwen Li
90281f4c27 configs: ls1028a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
be7b6d5944 configs: ls1043a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
c5d0bd5dc8 configs: ls1012a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
eeeab2750e arm64: dts: ls208xa: add gpio node
Add gpio node for SoC LS208xA

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
d62cbea84a arm64: dts: ls1088a: add gpio node
Add gpio node for SoC LS1088A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
b7ddedfab5 arm64: dts: ls1046a: add gpio node
Add gpio node for SoC LS1046A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
b609f1ad04 arm64: dts: ls1043a: add gpio node
Add gpio node for SoC LS1043A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:20 +05:30
Biwen Li
f9428d761b arm64: dts: ls1028a: add gpio node
Add gpio node for SoC LS1028A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Biwen Li
5609300521 arm64: dts: ls1012a: add gpio node
Add gpio node for SoC LS1012A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Biwen Li
2b3393cb3c arm: dts: ls1021a: add gpio node
Add gpio node for SoC LS1021A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Biwen Li
781188097d gpio: mpc8xxx_gpio: Fix for litte endian
Update gpio driver to use same logic for big-endian and little-endian

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Hou Zhiqiang
c9cd2a31cc configs: T1042: Drop the CONFIG_VIDEO
Drop the CONFIG_VIDEO to fix the following build warning.
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
UPD     include/generated/dt.h
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
UPD     include/generated/timestamp_autogenerated.h
====================================================

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Priyanka Jain
43d1d391f6 mpc8xxx: fsl_pamu: Update data type in config_pamu
Update data type of '1' to '1ull' in below assignment
size = 1ull << sizebit;

to fix incorrect assignment issue.
e.g: when sizebit was 31, 0x80000000 got sign extended to
0xffffffff_80000000

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Dean Saridakis <dean.saridakis@baesystems.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Hou Zhiqiang
19dba8bf9f armv7: ls102xa: Enable I-Cache to speed up the boot time
Enable the I-Cache to speed up the boot time, especailly for the NOR
boot, currently it takes about 15 seconds from power up to the U-Boot
prompt, and with the I-Cache enabled it only takes around 2.5 seconds.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:19 +05:30
Aleksandar Gerasimovski
a1f57c3933 board/km: move km i2c deblock declarations to a km/common.h
Cleanup, move the declarations to keymile/common.h instead declaring them
per-board config.h

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Hou Zhiqiang
d167667d1b pci: kconfig: layerscape: Change LX2162A PCIe node compatible string
LX2162A is not like LX2160A which has different PCIe controller
in rev1 and rev2 silicon. It supports only one configuration of
PCIe controller, which is same as LS2088A. So update PCIe
compatible string same as LS2088A.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Hou Zhiqiang
584107337b pci: layerscape: Remove the shadow SVR definitions
This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Mathew McBride
fd20097336 spi: fsl_qspi: apply the same settings for LS1088 as LS208x
The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL
workaround as the LS208x and also has a 64 byte TX buffer.

With the previous settings SPI-NAND reads over AHB were
corrupted.

Fixes: 91afd36f38 ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Mathew McBride
6b4eb604ea spi: fsl_qspi: Ensure width is respected in spi-mem operations
Adapted from kernel commit b0177aca7aea
From: Michael Walle <michael@walle.cc>

Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.

Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.

Fixes: 91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Mathew McBride
af6266c1c2 mem: spi-mem: add declaration for spi_mem_default_supports_op
spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.

It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Niel Fourie
37bfd9cb50 PowerPC: keymile: Add support for kmcent2 board
Add basic support for the Hitachi Power Grids kmcent2 board, based
on the NXP QorIQ T1040 SoC.

Signed-off-by: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Fixed blank line at EOF errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:18 +05:30
Niel Fourie
df86d324c7 keymile: common: update to set_env_hex(), fix "pram" radix
Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().

In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:17 +05:30
Niel Fourie
c1a215b455 PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10
Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:17 +05:30
Aleksandar Gerasimovski
e081d9441e board/km/common: fix pnvramaddr and varaddr
Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:17 +05:30
Aleksandar Gerasimovski
d141f4b298 keymile: common: qrio: print QRIO id and revision number
Add show_qrio function to print chip id and revision information.
There are already multiple QRIO chip versions available and the upcoming
designs may want to show used version.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:17 +05:30
Aleksandar Gerasimovski
b99cc27111 board: keymile: common: fix qrio compilation for arm
This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:16 +05:30
Wasim Khan
67477bd0ac armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.

Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:16 +05:30
Nipun Gupta
3dbc47c9e5 armv8: ls1028a: fix stream id allocation
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:16 +05:30
Michael Walle
805b2423b4 board: sl28: add SATA support
Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.

We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:16 +05:30
Michael Walle
b463010be0 board: sl28: add network variant 2 support
Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:16 +05:30
Michael Walle
4029d356e6 board: sl28: add network variant 1 support
This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:15 +05:30
Michael Walle
feed9008b3 board: sl28: move ethernet aliases to variant specific dtsi
The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.

This might leave a hole if there is no ethernet1 alias. This is
intended.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:15 +05:30
Ye Li
440b28a8c6 net: eqos: Reduce the MDIO wait time
Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:15 +05:30
Zhao Qiang
905c8e649e armv8: dts: fsl-lx2162a: add dspi node into qds dts
Add dspi node into lx2162aqds device tree

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:15 +05:30
Wasim Khan
cbfa8f7c7a armv8: lx2162aqds: disable non existing pcie controllers
disable non existing pcie controllers on lx2162aqds

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:15 +05:30
Biwen Li
166e40bda6 configs: ls1088aqds: add COMMON_ENV to fix distroboot
Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
	## Executing script at 80000000
	load - load binary file from a filesystemUsage:
	load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
	    - Load binary file filename from partition part on device
	       type interface instance dev to address addr in memory.
	      bytes gives the size to load in bytes.
	      If bytes is 0 or omitted, the file is read until the end.
	      pos gives the file byte position to start reading from.
	      If pos is 0 or omitted, the file is read from the start.
	...
	Bad Linux ARM64 Image magic!
	SCRIPT FAILED: continuing...

Signed-off-by: Biwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:14 +05:30
Ioana Ciornei
64a0fb4cc3 net: memac_phy: add a timeout to MDIO operations
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.

Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.

Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:14 +05:30
Michael Walle
46fdf763b8 board: kontron: disable flash unlock all
Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.

Circumvent that by not disabling the write protection in the first
place.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:14 +05:30
Michael Walle
5d867bcc23 mtd: spi-nor: add unlock all config option
Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.

Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.

For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/

Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:13 +05:30
Baruch Siach
24a0f8cfe5 mmc: mv_sdhci: parse device-tree entry
Call mmc_of_parse() so that generic DT properties like 'non-removable'
are taken into account.

This fixes boot on Clearfog with eMMC on SOM that requires the
non-removable property.

Reported-by: Thorsten Spille <thorsten_spille@netcor.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2021-02-08 08:53:14 +01:00
Konstantin Porotchkin
6e2748452a arm: mvebu: Espressobin: Set the maximum slave SPI speed to 40MHz
While the SPI controller speed is defined by DTS, the maximum
slave speed (connected devices) is limited by the pre-defined
configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz
This patch increases this maximum SPI slave device speed to 40MHz

Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59516
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-02-08 08:53:14 +01:00
Pali Rohár
32771530e6 cmd: mvebu/bubt: Fix default options in help
Default options depends on compile time defines.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-02-08 08:53:14 +01:00
Stefan Roese
61b70422c3 arm: mvebu: theadorable: Set deephasis bit in PCIe configs very early
Testing has shown, that the quality of the PCIe signals and also the
stability of correct link establishment on the 2 PCIe ports is better,
when the deemphasis bit is set in the PCIe config register.

This needs to be done very early, even before the SERDES setup code is
run. This way, the first link will already be established with this
setup.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-02-08 08:53:14 +01:00
Stefan Roese
54504de24d arm: mvebu: theadorable: Enhance "pcie" test cmd to check link width/speed
This patch changes the board specific "pcie" U-Boot command to not only
check for PCIe device existance but also for the correct link speed
and width that has been established. This cmd can be used by U-Boot
scripts for automated testing, if the PCIe setup is correct. Meaning,
that all PCIe devices are correctly detected and the link speed and
width is corrent.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-02-08 08:53:14 +01:00
Stefan Roese
6a2fa284ae pci: pci_mvebu: Disable config access to PCI host bridge ports
This patch changes the PCI config routines in the Armada XP / 38x driver
to not allow access to the PCIe root ports.

While updating the Armada XP based theadorable to the latest mainline
and testing it with the DM PCI driver I noticed, that the PCI root
bridge was being configured incorrectly. Resulting in the PCIe Intel
WiFi was not working correctly in Linux. With this patch applied, all
PCIe devices work without any issues in Linux again.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
2021-02-08 08:53:14 +01:00
Pali Rohár
44be835d25 arm: mvebu: Espressobin: Set default value for $ethNaddr env variable
On Espressobin board are MAC addresses stored in U-Boot env area. Therefore
they are not present in default_environment[] array constructed at compile
time.

This change puts permanent MAC addresses into default_environment[] array
at board runtime. Espressobin board has enabled DEFAULT_ENV_IS_RW option
and therefore can modify this array.

This change ensure that 'env default -a' does not delete permanent MAC
addresses from Espressobin env storage area.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
2021-02-08 08:53:08 +01:00
Pali Rohár
c4df0f6f31 arm: mvebu: Espressobin: Set default value for $fdtfile env variable
On Espressobin board value for $fdtfile cannot be determined at compile
time and is calculated at board runtime code. This change uses a new option
DEFAULT_ENV_IS_RW to allow modifying default_environment[] array at runtime
and set into it correct value.

This change also ensure that 'env default -a' set correct value to $fdtfile.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
2021-02-08 08:53:08 +01:00
Pali Rohár
93f4048bc2 env: Allow to set default_environment[] from board code via compile option DEFAULT_ENV_IS_RW
This change allows board code to modify default_environment[] array when
compile option DEFAULT_ENV_IS_RW is specified in board config file.

Some board default variables depend on runtime configuration which is not
known at compile time. Therefore allow to set default_environment[] array
as non-const and allow board code to modify it when it is needed.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
2021-02-08 08:52:50 +01:00
Adam Ford
0099dfd5e5 ARM: rmobile: Add Beacon EmbeddedWorks RZG2H Dev Kit
The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also
known as the RZ/G2H.

The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.  It shares much of the same design as
the RZ/G2M and RZ/G2N dev kits.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-02-07 21:12:57 +01:00
Adam Ford
6001b49920 ARM: rmobile: Add Beacon EmbeddedWorks RZG2N Dev Kit
The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also
known as the RZ/G2N.

The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.  It shares much of the same design as
the RZ/G2M dev kit.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-02-07 21:12:57 +01:00
Adam Ford
2b6cf2e94d arm: dts: r8a774b1: Import DTS queued for Linux 5.12-rc1
Update the RZ/G2N dtsi from Renesas repo destined to become 5.12-rc1.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-02-07 21:12:57 +01:00
Adam Ford
70266e1c18 arm: dts: r8a774e1: Import DTS queued for Linux 5.12-rc1
Update the RZ/G2H dtsi from Renesas repo destined to become 5.12-rc1.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-02-07 21:12:57 +01:00
Adam Ford
b2c86f596c arm: dts: r8a774a1: Import DTS queued for Linux 5.12-rc1
Update the RZ/G2M dtsi and r8a774a1-beacon-rzg2m-kit kit
from Renesas repo destined to become 5.12-rc1.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-02-07 21:12:57 +01:00
Adam Ford
de811ee46c dt-bindings: Sync versaclock.h with upcoming 5.12-rc1
The versaclock doesn't have a driver yet, but there are a bunch
of device tree updates for the Beacon RZ/G2 boards that won't
compile without these.  A driver is coming, so sync the bindings
for now

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-02-07 21:12:56 +01:00
Roman Stratiienko
adb5daf090 fastboot: reinit partition after storing GPT or MBR
In case MMC has MBR system and fastboot writes GPT,
MMC is still recognized as MBR.
Invoke part_init() to purge cached data and update
information about partition table type.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
2021-02-07 19:22:55 +01:00
Patrick Delaunay
0c0394b502 fastboot: add command to select the eMMC boot configuration
Add command oem bootbus which executes the command
``mmc bootbus <id> <arg>`` on the current fastboot mmc device
(<i> = CONFIG_FASTBOOT_FLASH_MMC_DEV) to set the eMMC boot
configuration on first update, with
<arg> =  boot_bus_width reset_boot_bus_width boot_mode

$> fastboot oem bootbus:<boot_bus_width> <reset_boot_bus_width> <boot_mode>

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-07 19:22:55 +01:00
Patrick Delaunay
b2f6b97b78 fastboot: add command to select the default emmc hwpart for boot
Add fastboot command oem partconf which executes the command
``mmc partconf <id> <arg> 0`` on the current <id> mmc device
to configure the eMMC boot partition with
<arg>: boot_ack boot_partition, so the command is:

$> fastboot oem partconf:<boot_ack> <boot_partition>

The partition_access argument is forced to 0 (userdata)

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[lukma - Kconfig adjustments after merging this patch]
2021-02-07 19:22:55 +01:00
Patrick Delaunay
3acbc7b2aa fastboot: mmc: extend flash/erase for both emmc hwpart 1 and 2
Update the code and the configs for eMMC boot and userdata
partitions acces
- FASTBOOT_MMC_BOOT_SUPPORT: boot partition 1 and 2 (erase/write)
- FASTBOOT_MMC_BOOT1_NAME: boot partition 1, default name="mmc0boot0"
- FASTBOOT_MMC_BOOT2_NAME: boot partition 2, default name="mmc0boot1"

This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-07 19:22:55 +01:00
Patrick Delaunay
7596696bc5 fastboot: mmc: Add CONFIG_FASTBOOT_MMC_USER_SUPPORT
Split userdata and boot partition support for eMMC update
and correct the description (update is supported).

The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT
allows to activate support of userdata partition update,
based on target name=CONFIG_FASTBOOT_MMC_USER_NAME

This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-07 19:22:55 +01:00
Roman Kovalivskyi
a362ce214f fastboot: Implement generic fastboot_set_reboot_flag
It is possible to implement fastboot_set_reboot_flag in a generic way
if BCB commands are turned on for a target. Using
bcb_set_reboot_reason allows to do this by simply passing string with
correct reboot reason that should be handled during next boot process.

If BCB are turned off, then bcb_set_reboot_reason would simply return
error, so it won't introduce any new behaviour for such targets.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2021-02-07 19:22:54 +01:00
Roman Kovalivskyi
f80798122a Revert "fastboot: Add default fastboot_set_reboot_flag implementation"
This reverts commit 0ebf9842e5.

Current generic implementation of fastboot_set_reboot_flag is somewhat
messy and requires some additional configuration option to be enabled
besides CMD_BCB, so it reverts that implementtion in order to bring a
new cleaner one.

Next commit introduces new generic implementation of
fastboot_set_reboot_flag.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2021-02-07 19:22:54 +01:00
Heinrich Schuchardt
a045bc18d6 dfu: dfu_sf: use correct print code
For printing unsigned int %u has to be used.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-07 19:22:54 +01:00
Tom Rini
3936fd9986 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- introduces some standard sysinfo options as a source, e.g. to read
  strapping pins to determine the board revision
- allows the U-Boot version number to be included
- allows the version number to be provided programmatically, e.g. to
  support the build system adding information after U-Boot is built
2021-02-06 09:45:58 -05:00
Simon Glass
07c9e683a4 smbios: Allow a few values to come from sysinfo
While static configuration is useful it cannot cover every case. Sometimes
board revisions are encoded in resistor straps and must be read at
runtime.

The easiest way to provide this information is via sysinfo, since the
board can then provide a driver to read whatever is needed.

Add some standard sysinfo options for this, and use them to obtain the
required information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:20:36 +08:00
Simon Glass
2764cf5e97 x86: coral: Add sysinfo ops
These ops are missing at present which is not permitted. Add an empty
operation struct.

Note: If the uclass requires operations then the drivers should provide
them. Otherwise, checking for missing operations must be done in every
uclass operation, so it adds to code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:20:34 +08:00
Simon Glass
2b8e5c8dfa sysinfo: Move #ifdef so that operations are always defined
At present the struct is not available unless SYSINFO is enabled. This is
annoying since code it is not possible to use compile-time checks like
CONFIG_IS_ENABLED(SYSINFO) with this header.

Fix it by moving the #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:20:29 +08:00
Simon Glass
e9adaa75bb smbios: Add more options for the BIOS version string
At present the version string is obtained from PLAIN_VERSION. Some boards
may want to configure this using the device tree, since the build system
can more easily insert things there after U-Boot itself is built. Add this
option to the code.

Also in some cases the version needs to be generated programmatically,
such as when it is stored elsewhere in the ROM and must be read first.
To handle this, keep a pointer around so that it can be updated later.
This works by storing the last string in the context, since it is easier
than passing out a little-used extra parameter.

Provide a function to update the version string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:20:27 +08:00
Simon Glass
fd3b826da8 smbios: Track the end of the string table
Add a new member to the context struct which tracks the end of the string
table. This allows us to avoid recalculating this at the end.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:20:23 +08:00
Simon Glass
0c95fff342 smbios: Drop the eos parameter
We can store this in the context and avoid passing it to each function.
This makes it easier to follow and will also allow keeping track of the
end of the string table (in future patches).

Add an 'eos' field to the context and create a function to set it up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Simon Glass
1e8989ad8a smbios: Use a struct to keep track of context
At present we pass the ofnode to each function. We also pass the 'eos'
pointer for adding new strings. We don't track the current end of the
string table, so have smbios_string_table_len() to find that.

The code can be made more efficient if it keeps information in a
context struct. This also makes it easier to add more features.

As a first step, switch the ofnode parameter to be a context pointer.
Update smbios_add_prop() at the same time to avoid changing the same
lines of code in consecutive patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Simon Glass
7617f996e6 smbios: Set BIOS release version
We may as well include the U-Boot release information in the type-0 table
since it is designed for that purpose.

U-Boot uses release versions based on the year and month. The year cannot
fit in a byte, so drop the century.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Simon Glass
dc090586a0 smbios: Use char consistently for the eos member
At present a few of the structs use u8 instead of char. This is a string,
so char is better. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Simon Glass
0e89b85906 smbios: Move smbios_write_type to the C file
This type is not used outside the smbios.c file so there is no need for it
to be in the header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Simon Glass
68f6a90ec2 Makefile: Provide numeric versions
For SMBIOS we want to store the numeric version numbers in the tables. It
does not make sense to parse the strings. Instead, add new #defines with
the version and patchlevel.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Simon Glass
9b95f3f7ff README: Add doumentation for version information
There are quite a few available version options in U-Boot. Add a list of
the available Makefile variables and #defines, along with examples.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-06 19:18:41 +08:00
Tom Rini
8308a28af8 Merge tag 'ti-v2021.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Sync DTS from Linux kernel for all K3 platforms
- Add MMC higher speed nodes for AM65x, J721e, J7200
- Convert Nokia RX-51 to use CONFIG_DM_MMC
- Minor fixes for LEGO MINDSTORMS
2021-02-05 09:39:31 -05:00
Tom Rini
55ffabec7f Merge tag 'efi-2021-04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc2

Bug fixes:

* do not allow creating of files with filenames on FAT file system
* install UEFI System Partition GUID on ESP handle
* in dtbdump.efi test tool use GUID to find ESP handle

Documentation:

* man-page for load command
* describe end of life of plat_auto
2021-02-04 17:35:50 -05:00
Heinrich Schuchardt
5489448cd7 doc: dm: describe end of life of plat_auto
Describe when plat_auto is freed.

Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-04 20:36:07 +01:00
Heinrich Schuchardt
4038c6e848 doc: return value exception command
If the exception cannot be raised, the command returns.
Currently the return values are not all the same.

Remove the sub-chapter 'Return value'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-04 20:36:06 +01:00
Heinrich Schuchardt
f074209ce9 doc: describe load command
Man-page for load command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-04 20:36:06 +01:00
Heinrich Schuchardt
02fc018a35 efi_loader: VenMedia device path node
The Load File2 protocol exposes a device path with a VenMedia() node. Hence
our implementation of the device path to text protocol should support this
node.

Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-04 20:12:41 +01:00
Heinrich Schuchardt
6bca36cee2 efi_selftest: use GUID to find ESP in dtbdump
If dtbdump.efi is loaded from memory when calling LoadImage the loaded
image protocol will not indicate the partition from where it was loaded.
In this case use the EFI system partition for the 'load' and 'save'
commands.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-04 20:09:03 +01:00
Heinrich Schuchardt
b9b0ea30c7 efi_loader: install UEFI System Partition GUID
On the handle for the UEFI System Partition we must install the System
Partition GUID (with a NULL interface).

Let the efidebug command display the GUID.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-04 20:09:02 +01:00
Heinrich Schuchardt
1bc9fc3483 efi_loader: only check size if EFI_DT_APPLY_FIXUPS
In the implementation of the EFI_DT_FIXUP_PROTOCOL:

* Only check the buffer size when EFI_DT_APPLY_FIXUPS is set.
* In this case the field totalsize of the device-tree may not exceed the
  buffer size.
* Install device-tree only if EFI_DT_INSTALL_TABLE is set.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-04 20:09:02 +01:00
Lokesh Vutla
6239cc8c4e arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot
Sync all J7200 related v5.11-rc6 Linux kernel dts into U-Boot.
MCU R5F nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid regressions, r5f nodes are kept intact.
These will be added in kernel in future.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-02-04 20:37:57 +05:30
Lokesh Vutla
70e167495a arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot
Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot.
HBMC nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid any regressions, hbmc nodes are kept
intact. These will be added in kernel in future.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-02-04 20:37:57 +05:30
Lokesh Vutla
e497876343 arm: dts: k3-am65: Sync Linux v5.11-rc6 dts into U-Boot
Sync all AM65 related v5.11-rc6 Linux kernel dts into U-Boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
489274eb6c configs: am65x_evm: Add configs for UHS modes
Add configs for voltage switching and UHS modes for the SD card
and HS200 for the eMMC.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
9aa4302c02 arm: dts: k3-am654-base-board: Limit Sd card to High speed modes
There's an issue with the base board in which the power cycle
circuit takes way longer to power down than expected by mmc core.
code. This prevents the card from enumerating in UHS modes.

Disable UHS modes for this board until a new board revision fixes
the issue.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
0758e9fe3f arm: dts: k3-am65-main: Add itapdly and clkbuf-sel values
Add the appropriate itapdly and clkbuf-sel values required for
some lower speed modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
79a30b1128 configs: j7200_evm: Add support for UHS modes
Add configs to support UHS modes for the SD card and HS200 for the eMMC.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
d1d34f7985 configs: j721e_evm: Add support for UHS modes
Add configs to support UHS modes for the SD card and HS200 for the eMMC.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
b4e85ca0ba arm: dts: k3-j7200-common-proc-board: Enable support for UHS modes
Add support for UHS modes by adding the regulators to power cycle
and voltage switch the card. Also add pinmuxes required for each
node

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
f695347066 arm: dts: k3-j7200-main: Add support for gpio0
Add support for the main_gpio0 node

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
f0a496a3d2 arm: dts: k3-j721e-common-proc-board: Add support for UHS modes for SD card
Add support for regulators to power cycle and switch IO voltage to the
SD card. This enables support for UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
52de3c324d arm: dts: k3-j721e-main: Update otap-delay values
Update otap delay values to match with the latest Data Manual[1].

[1] https://www.ti.com/lit/gpn/dra829v

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
2121c7e2d5 arm: dts: k3-am65: Fix mmc nodes
Because of fundamental interface issues in am65x pg1, only the
initial sdhci1 node at 25 MHz was added in the u-boot.dtsi
from which both the base-board.dts and r5-base-board.dts
inherit the node. Move the node out to k3-am65-main.dtsi
where it belongs and add the board specific properties
in base-board.dts and r5-base-board.dts

This ensures dts compatibility with the kernel dts in the
base-board.dts and enables the SD card interface at 50 MHz
and High Speed mode

While we are here, also fix the main_mmc0_pins_default
property to be included and inherit from the base-board.dts
instead of the u-boot.dtsi

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
e9fbbba4e3 mmc: am654_sdhci: Use sdhci_set_control_reg()
Use the generic sdhci_set_control_reg() instead of duplicating
in platform driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
27a87c834f mmc: am654_sdhci: Fix HISPD bit configuration in some lower speed modes
According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.

To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.

Use the sdhci writeb callback to implement this condition.

[1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
a759abf569 mmc: am654_sdhci: Add support for software tuning
With the new SW tuning App note[1], a custom tuning algorithm is
required for eMMC HS200, HS400 and SD card UHS modes. The algorithm
involves running through the 32 possible input tap delay values and
sending the appropriate tuning command (CMD19/21) for each of them
to get a fail or pass result for each of the values. Typically, the
range will have a small contiguous failing window. Considering the
tuning range as a circular buffer, the algorithm then sets a final
tuned value directly opposite to the failing window.

[1] https://www.ti.com/lit/pdf/spract9

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
194c3756c8 mmc: am654_sdhci: Add support for writing to clkbuf_sel
Add support for writing new clock buffer select property for both
the am654x and j721e 4 bit IPs

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
c964447ea3 mmc: am654_sdhci: Add support for input tap delay
DLL need only be enabled for speed modes and clock frequencies at or
above 50 MHz. For speed modes that don't enable the DLL, we need to
configure a static input delay value. This involves reading an optional
itap-del-sel-* value from the device tree and configuring it for the
appropriate speed mode.

Therefore, move all dll configurations to their own functions and gate it
with 50 MHz speed and a minimum mode. If both these conditions are not
satisfied then configure delay chain modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
8c32b5f370 mmc: am654_sdhci: Add support for AM65x SR2.0
Add Support for AM65x PG2.0. Use the SoC bus framework to fixup
the platform data and do DLL calibration if the revision is 1.0

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
5b29fd4a8d mmc: am654_sdhci: Add flag for PHY calibration
Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB
flag to indicate the same.

Also move the write of trm_icp and driver strength to the set_clock()
function to match the kernel configuration flow.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
144e131d47 mmc: am654_sdhci: Convert flag fields to BIT macro
Convert the flags field defines to use the BIT() macro.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
c604e204ef mmc: am654_sdhci: Unconditionally switch off DLL in the beginning of ios_post()
There are some speed modes that work without switching the dll on.
Unconditionally switch off the DLL before setting clock frequency to
support this case. The software will automatically enable DLL for speed
modes that require it. This also means the dll_on priv data member is no
longer required.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Faiz Abbas
43392b550e mmc: sdhci: Add helper functions for UHS modes
Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-04 20:37:57 +05:30
Dario Binacchi
bfefa3a4eb configs: am335x_evm: enable CONFIG_SPL_ALLOC_BD
With commit 38d6b7ebda ("spl: Drop bd_info in the data section") you
need to enable this option to boot from mmc.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-04 20:37:56 +05:30
Suman Anna
468ec2f3ef remoteproc: k3_r5: Sync to upstreamed kernel DT property names
The K3 R5F remoteproc driver in U-Boot was upstreamed prior to the
equivalent remoteproc driver in the Linux kernel. Some of the DT
properties used in U-Boot got upstreamed using different names
in Linux kernel.

The modified property names include the R5F cluster mode configuration
property "lockstep-mode"; and three different individual R5F core config
properties - "atcm-enable", "btcm-enable" and "loczrama". The property
names were updated as follows:
  lockstep-mode => ti,cluster-mode
  atcm-enable   => ti,atcm-enable
  btcm-enable   => ti,btcm-enable
  loczrama      => ti,loczrama

Update the K3 R5F remoteproc driver, the corresponding binding, and
all the existing usage in AM65x, J721E and J7200 dts files all at
once to use the new properties and to not break any bisectability.

Signed-off-by: Suman Anna <s-anna@ti.com>
2021-02-04 20:37:56 +05:30
Aswath Govindraju
59a51c3076 configs: am65x_evm_a53: Enable config for phandle check while getting sequence number
AM65x SoC has two USB subsystems and their corresponding device tree nodes
have the same name but different path. While allocating sequence numbers
for these device tree nodes using alias, phandles can be used to
distinguish them.

Enable config for phandle check while getting sequence number to
distinguish the USB device tree nodes.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-02-04 20:37:56 +05:30
David Lechner
2ea852c69f configs: legoev3: disable non-Linux boot options
This disables booting to non-Linux OSes.

This board is uncomfortably close to its 256K size limit, so every
few KB saved helps.

Signed-off-by: David Lechner <david@lechnology.com>
2021-02-04 20:37:56 +05:30
David Lechner
b228f0295d configs: legoev3: disable CONFIG_NET
This disables the CONFIG_NET setting for LEGO MINDSTORMS EV3. This board
does not have any built-in networking, so it does not make sense to
enable this feature.

This also fixes the warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: David Lechner <david@lechnology.com>
2021-02-04 20:37:56 +05:30
David Lechner
f4e2c10a71 ARM: legoev3: drop bi_arch_number
This drops assigning bi_arch_number on LEGO MINDSTORMS EV3. This board
never had its own unique number and since we are using device tree,
we no longer need to pass an arch number to Linux.

Signed-off-by: David Lechner <david@lechnology.com>
2021-02-04 20:37:56 +05:30
David Lechner
68432b5d12 ARM: legoev3: set serial# env var
This sets the serial# environmet variable instead of using ATAGs on
LEGO MINDSTORMS EV3.

Also fix some nomenclature while we are touching this code (Bluetooth
address is not the same as MAC address, EEPROM version is not the same
as board version).

Signed-off-by: David Lechner <david@lechnology.com>
2021-02-04 20:37:56 +05:30
Pali Rohár
64fd2d2614 Nokia RX-51: Convert to CONFIG_DM_MMC
Move twl4030_power_mmc_init() from board_mmc_power_init() to misc_init_r()
and disable CONFIG_SYS_MALLOC_F. Otherwise U-Boot cannot initialize MMC.
Also disable CONFIG_CMD_SLEEP CONFIG_DM_DEVICE_REMOVE CONFIG_MMC_VERBOSE to
free some space.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-04 20:37:56 +05:30
Tom Rini
21cb717e79 Merge tag 'dm-pull-3feb21' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Support late device removal
Allow booting a 32-bit system with a top memory address beyond 4 GiB
2021-02-04 08:19:23 -05:00
Tom Rini
67472aa059 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Fix broken multi-core boot for QEMU x86
- Add zboot support to boot x86 Linux kernel image in the PXE sysboot
  utility
2021-02-04 08:18:57 -05:00
Kory Maincent
18c2582183 cmd: pxe_utils: sysboot: Add zboot support to boot x86 Linux kernel image
Add "zboot" command to the list of supported boot in the
label_boot function.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add component tags in the summary]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-03 23:16:44 +08:00
Kory Maincent
ff0287ec28 cmd: pxe_utils: Replace ifdef by IS_ENABLED
Replace all the macro ifdef by IS_ENABLED.

All of these configs are set in the defconfig files and not in the
include board headers files.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: keep the preprocessor case unchanged]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-03 23:16:36 +08:00
Kory Maincent
d3a3d44fe2 command.h: Remove extern from the header
Remove the extern of the header because they are useless.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[bmeng: minor edit on the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-03 23:01:18 +08:00
Bin Meng
8cd1a0cf52 x86: qemu: Fix broken multi-core boot
Unfortunately the multi-core boot for QEMU x86 has been broken since
commit 77a5e2d3bc ("x86: mp_init: Set up the CPU numbers at the start").

In order to support QEMU x86 multi-core boot, the /cpus node must be
bound before any actual fix up in qemu_cpu_fixup(). This adds the
uclass_get() call to ensure this, just like what was done before.

Fixes: 77a5e2d3bc ("x86: mp_init: Set up the CPU numbers at the start")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 22:54:56 +08:00
Brandon Maier
f1fd79afad spi: zynqmp_gqspi: support dual and quad mode
The dm_spi_ops.xfer() API does not support dual and quad SPI modes. It
also doesn't allow the zynqmp_gqspi driver to calculate the correct
number of dummy cycles for some NOR ops (as doing so also requires the
buswidth).

Port the zynqmp_gqspi driver to spi_controller_mem_ops, which gives us
the buswidth values to correctly support all SNOR_PROTO_X_X_X commands
and to properly calculate dummy cycles.

Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: jagan@amarulasolutions.com
CC: michal.simek@xilinx.com
CC: Ashok Reddy Soma <ashokred@xilinx.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-03 13:36:44 +01:00
Heinrich Schuchardt
3ecc5277f4 fs: fat: remove trailing periods from long name
The FAT32 File System Specification [1] requires leading and trailing
spaces as well as trailing periods of long names to be ignored.

[1]
    Microsoft Extensible Firmware Initiative
    FAT32 File System Specification
    Version 1.03, December 6, 2000
    Microsoft Corporation
    https://www.win.tue.nl/~aeb/linux/fs/fat/fatgen103.pdf

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-03 11:41:02 +01:00
Heinrich Schuchardt
6f5edbaf93 firmware: smci: possible NULL dereference
sandbox_scmi_devices_ctx() may return NULL. We should not dereference this
value in sandbox_scmi_devices_remove().

The problem was indicated by 'gcc-11 -fanalyzer'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Heinrich Schuchardt
c30a7093e8 sandbox: mark os_abort() as noreturn
gcc -fanalyzer needs the information that a function does not return to
provide accurate information.

os_abort() does not return. Mark it accordingly.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Bin Meng
6424fba1bc bdinfo: Change to use bdinfo_print_num_ll() where the number could be 64-bit
There are some calls to bdinfo_print_num_l() with parameters that
could be a 64-bit value on a 32-bit system. Change those calls to
use bdinfo_print_num_ll() instead.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Bin Meng
98592c7509 bdinfo: Rename function names to be clearer
At present we have bdinfo_print_num() to print unsigned long numbers.
We also have print_phys_addr() which accept numbers that might be
64-bit on a 32-bit platform.

Rename these 2 functions to be clearer:

bdinfo_print_num() => bdinfo_print_num_l()
print_phys_addr()  => bdinfo_print_num_ll()

While we are here, make bdinfo_print_num_ll() public so that it can
be used outside cmd/bdinfo.c in the future.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Bin Meng
86c915628d riscv: Change phys_addr_t and phys_size_t to 64-bit
phys_addr_t and phys_size_t are currently defined as `unsigned long`,
but RV32 supports 34-bit physical address, hence both phys_addr_t and
phys_size_t should be defined to 64-bit using `unsigned long long`.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Bin Meng
d17e9d2558 fdtdec: Cast prior_stage_fdt_address with uintptr_t
At present prior_stage_fdt_address is declared as phys_addr_t. On
a 32-bit platform where phys_addr_t can be 64-bit, assigning its
value to gd->fdt_blob which is a pointer, can cause warnings.

Cast it to uintptr_t before the assignment.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Bin Meng
673625c459 net: ftmac100: Cast priv->iobase with uintptr_t
priv->iobase was declared as phys_addr_t which is now a 64-bit
address. In a 32-bit build, this causes the following warning
seen when building ftmac100.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Cast priv->iobase with uintptr_t.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Bin Meng
b7324b5d53 riscv: ax25-ae350: Cast addr with uintptr_t
addr was delcared as fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building ax25-ae350.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Cast addr with uintptr_t.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Bin Meng
5c7c9e623c serial: sifive: Cast dev_read_addr() with uintptr_t
dev_read_addr() returns fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building serial_sifive.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Cast the return value with uintptr_t.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Bin Meng
37dc958947 global_data.h: Change ram_top type to phys_addr_t
It's possible to have ram_top above 4 GiB in a 32-bit system, hence
we need to declare ram_top as `phys_addr_t`.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Bin Meng
65f354cd8d arm: rockchip: Explicitly cast gd->ram_top in dram_init_banksize()
The min() macro used in dram_init_banksize() requires two elements
to compare have the same type. Let's explicitly cast gd->ram_top.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Bin Meng
85c714d8dc riscv: Adjust board_get_usable_ram_top() for 32-bit
When testing QEMU RISC-V 'virt' machine with a 2 GiB memory
configuration, it was discovered gd->ram_top is assigned to
value zero in setup_dest_addr().

While gd->ram_top should not be declared as type `unsigned long`,
which will be updated in a future patch, the current logic in
board_get_usable_ram_top() can be updated to cover both 64-bit
and 32-bit RISC-V.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-03 03:38:41 -07:00
Simon Glass
7a3c628c43 dm: core: Add documentation about device removal
Make mention of this feature in the core documentation so people can
discover it without looking at a header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
6224dc9ba4 arm: Remove vital devices last
Update announce_and_cleanup() to remove all devices, with the vital ones
being removed last.

This is an extra patch on top of the recent RFC:

   http://patchwork.ozlabs.org/project/uboot/list/?series=223280

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Marek Vasut
cc6f4c8f25 dm: core: Add late driver remove option
Add another flag to the DM core which could be assigned to drivers and
which makes those drivers call their remove callbacks last, just before
booting OS and after all the other drivers finished with their remove
callbacks. This is necessary for things like clock drivers, where the
other drivers might depend on the clock driver in their remove callbacks.
Prime example is the mmc subsystem, which can reconfigure a card from HS
mode to slower modes in the remove callback and for that it needs to
reconfigure the controller clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
c51d2e704a dm: core: Avoid partially removing devices
At present if device_remove() decides that the device should not actually
be removed, it still calls the uclass pre_remove() method and powers the
device down.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
b1f25fcfef dm: core: Remove children before advising uclass
At present the uclass pre-remove method is called before the children are
removed. But the children may refused to be removed, in whch case the
uclass is in a tricky situation. At present we handle this by calling
the uclass' post_probe() method. But it seems better to avoid doing
anything with the uclass in this case.

Switch the ordering so that we make sure the children can be removed
before advising the uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
4d7bab1adb dm: pci: Correct use of wrong flag name
Update a driver that uses the incorrect flag. Add a comment to hopefully
prevent furture mistakes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
a547fcb828 dm: Rename DM_FLAG_REMOVE_WITH_PD_ON
This flag has the word 'REMOVE' in it which means it conflicts with
the DM_REMOVE flags. Rename it to DM_FLAG_LEAVE_PD_ON which seems to
indicate its purpose well enough.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
f724f0af2b nand: brcmnand: Don't use -EPROBE_DEFER
This has no useful meaning in U-Boot and will never be returned. We want
to reserve this flag for internal driver model use.

Drop the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Simon Glass
e96777b71e smem: Don't use -EPROBE_DEFER
This has no useful meaning in U-Boot. Use -ENOMEM since that appears to
be what has gone wrong in this case. We want to reserve this flag for
internal driver model use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-03 03:38:41 -07:00
Heinrich Schuchardt
0be286cd6d fs: fat: must not write directory '.' and '..'
Directories or files called '.' or '..' cannot be created or written to
in any directory. Move the test to normalize_longname() to check this
early.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-03 11:10:37 +01:00
Heinrich Schuchardt
4c4006b694 fs: fat: usage basename in file_fat_write_at, fat_mkdir
This patch involves no functional change. It is just about code
readability.

Both in file_fat_write_at() and fat_mkdir() the incoming file or directory
path are split into two parts: the parent directory and the base name.

In file_fat_write_at() the value of the variable basename is assigned to
the filename parameter and afterwards the variable filename is used instead
of basename. It is more readable to use the variable basename and leave
filename unchanged.

In fat_mkdir() the base name variable is called directory. This is
confusing. Call it basename like in file_fat_write_at(). This allows to
rename parameter new_directory to directory in the implementation of
fat_mkdir() to match the function declaration.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-03 09:52:51 +01:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Tom Rini
fdcb93e170 Merge branch '2021-02-01-assorted-fixes'
- Assorted fixes
2021-02-02 09:24:10 -05:00
Bin Meng
aa8544e0d1 azure: Add -E back for the world build script
Commit dd5c954e91 ("travis/gitlab/azure: Use -W to avoid warnings check")
added -W to avoid warnings check, but it mistakenly dropped -E for
the world build script in the azure pipelines.

This caused builds on the azure pipelines fail to report warnings. Let's
add it back.

Fixes: dd5c954e91 ("travis/gitlab/azure: Use -W to avoid warnings check")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-01 16:33:02 -05:00
Stephen Warren
372497572b test/py: fix runtest wrapper for pytest 6
The implementation of pytest_runtest_protocol() must call
pytest_runtest_logstart() and pytest_runtest_logfinish(). This appears to
be necessary even in pytest 5.2.1 judging by the default version of
pytest_runtest_protocol(), but evidently some form of code reorganization
in pytest only made this have a practical effect in the newer version. I'd
previously been under the impression that 100% of the required work of
pytest_runtest_protocol() was handled by the fact it called
runtestprotocol() as its implementation. However, it appears that custom
implementations do need to do a little more than this.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-01 16:33:02 -05:00
Ramon Fried
9644bd0d01 MAINTAINERS: Add maintainer to network subsystem
Add myself as co maintainer to network subsystem
Acked-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2021-02-01 16:33:01 -05:00
Gary Bisson
f14c5ee5ab disk: part_dos: update partition table entries after write
Fixes issues when switching from GPT to MBR partition tables.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-02-01 16:32:06 -05:00
Ravik Hasija
7a01882eb3 common: Kconfig.boot: Add FIT_PRINT config option
Config allows to disable printing contents of fitImage to optimize boottime.

Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-01 16:32:06 -05:00
Heinrich Schuchardt
ec9d19be8d cmd: load, emit error message for invalid block device
The load command should not silently return to the console prompt if an
invalid block device is specified and no file is loaded.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-01 16:32:06 -05:00
Pali Rohár
e18bf3943b arm: Remove #include <version.h> from armv8/fwcall.c
No version information is used in armv8/fwcall.c therefore do not include
version.h header file. This change prevents recompiling fwcall.o when
SOURCE_DATE_EPOCH changes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-01 16:32:06 -05:00
Ilies CHERGUI
2b139b3992 tools/fit_check_sign.c: Update usage function.
Add "-c" option to set the configuration name when
checking the FIT image signature.

Signed-off-by: Ilies CHERGUI <ilies.chergui@gmail.com>
2021-02-01 16:32:06 -05:00
Tom Rini
1aa9c3b930 Prepare v2021.04-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-01 10:28:20 -05:00
Tom Rini
7ee6205a5f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Fix CMD_ACPI dependency in Kconfig
- Correct overflow in __udelay() in TSC timer driver
- Add a devicetree node for eMMC for Coral
- Minor improvements on image loading
- Reduce size of Samus image
2021-02-01 08:15:46 -05:00
Simon Glass
77f898d040 x86: Reduce size of samus image
With the recent addition of ACPI generation, the image size has got beyond
its current limit.

Samus does not actually use this, nor x86 emulation for PCI ROMs, so
disable both features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:26 +08:00
Simon Glass
3138e4603c x86: tpl: Show next stage being booted
Enhance the debugging to show the next stage being booted as well as a
dump of the start of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:25 +08:00
Simon Glass
02840ca1b0 x86: spl: Clear BSS unconditionally
This should be done even if not using TPL, since BSS may be in use or
boards that only use SPL. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:25 +08:00
Simon Glass
06c085c0d2 x86: zimage: Improve command-line debug handling
At present if the command line is very long it is truncated by the
printf() statement, which works within a limited buffer. Use puts()
instead. Also show better debugging with the command-line setup
fails.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:25 +08:00
Simon Glass
577c4ad055 x86: zimage: Allow dumping the image from outside the module
At present it is possible to dump an image within the zimage command, but
it is also useful to be able to dump it from elsewhere, for example in a
loader that has special handling for the different zimage stages.

Export this feature as a new function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:25 +08:00
Simon Glass
f82438948f x86: Update Chromium OS GNVS names
The Global Non-Volatile Storage struct has some fields with particular
meanings. Rename these to make things easier to follow. Also add a few
more boot flags.

GNVS should not be confused with GNVQ (Going Nowhere Very Quickly).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:24 +08:00
Simon Glass
76baecf670 x86: spl: Make moving BSS conditional
At present BSS is always placed in SDRAM. If a separate BSS is not in use
this means that BSS doesn't work as expected. Make the setting conditional
on the SEPARATE_BSS option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:24 +08:00
Simon Glass
37c664e825 x86: Make sure the SPL image ends on a suitable boundary
The part of U-Boot that actually ends up in u-boot-nodtb.bin is not built
with any particular alignment. It ends at the start of the BSS section.
The BSS section selects its own alignment, which may larger.
This means that there can be a gap of a few bytes between the image
ending and BSS starting.

Since u-boot.bin is build by joining u-boot-nodtb.bin and u-boot.dtb (with
perhaps some padding for BSS), the expected result is not obtained. U-Boot
uses the end of BSS to find the devicetree, so this means that it cannot
be found.

Add 32-byte alignment of BSS so that the image size is correct and
appending the devicetree will place it at the end of BSS.

Example SPL output without this patch:

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         000142a1  fef40000  fef40000  00001000  2**4
                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
  1 .u_boot_list  000014a4  fef542a8  fef542a8  000152a8  2**3
                  CONTENTS, ALLOC, LOAD, RELOC, DATA
  2 .rodata       0000599c  fef55760  fef55760  00016760  2**5
                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
  3 .data         00000970  fef5b100  fef5b100  0001c100  2**5
                  CONTENTS, ALLOC, LOAD, RELOC, DATA
  4 .binman_sym_table 00000020  fef5ba70  fef5ba70  0001ca70  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .bss          00000060  fef5baa0  fef5baa0  00000000  2**5
                  ALLOC

You can see that .bss is aligned to 2**5 (32 bytes). This is because of
the mallinfo struct in dlmalloc.c:

 17 .bss.current_mallinfo 00000028  00000000  00000000  000004c0  2**5
                  ALLOC

In this case the size of u-boot-spl-nodtb.bin is 0x1ba90. This matches up
with the _image_binary_end symbol:

fef5ba90 g       .binman_sym_table      00000000 _image_binary_end

But BSS starts 16 bytes later, at 0xfef5baa0, due to the 32-byte
alignment. So we must align _image_binary_end to a 32-byte boundary. This
forces the binary size to be 0x1baa0, i.e. ending at the start of bss, as
expected.

Note that gcc reports __BIGGEST_ALIGNMENT__ of 16 on this build, even
though it generates an object file with a member that requests 32-byte
alignment.

The current_mallinfo struct is 40 bytes in size. Increasing the struct to
68 bytes (i.e. just above a 64-byte boundary) does not cause the alignment
to go above 32 bytes. So it seems that 32 bytes is the maximum alignment
at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add more details in the commit message to help people understand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:29:02 +08:00
Simon Glass
0b2bedbc6d x86: apl: Enhance debugging in the SPL loader
Move to log_debug() and make use of the new SPL function to find the
text base.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:42 +08:00
Simon Glass
86c372af1a x86: spl: Add a function to find the text base
It is useful to know the TEXT_BASE value for the image being loaded in
TPL/SPL. Add a new spl_get_image_text_base() function to handle this.

Make use of this in the x86 SPL handler, instead of having the logic
there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:41 +08:00
Simon Glass
6754393d26 x86: acpi_gpe: Update driver name to match devicetree
Use a driver name in line with the compatible string so that of-platdata
can use this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:41 +08:00
Simon Glass
8a655272d7 acpi: Tidy up documentation for struct acpi_gpio
Some comments were provided after this patch was applied. Address them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:41 +08:00
Simon Glass
0751cda574 x86: coral: Add a devicetree node for eMMC
Add a node for this so we can indicate that it is does not require any
ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:41 +08:00
Simon Glass
9edf20f156 x86: tsc_timer: Correct overflow in __udelay()
At present long delays such as msleep(2000) can cause an overflow in this
function. There is no need for this, since it already uses a 64-bit int.

Add a cast to correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:40 +08:00
Heinrich Schuchardt
12218c1ff4 cmd: CMD_ACPI depends on ACPIGEN
Trying to compile qemu-x86_64_defconfig with CONFIG_CMD_ACPI=y and
CONFIG_ACPIGEN=n fails with

ld.bfd: cmd/built-in.o: in function `do_acpi_items':
cmd/acpi.c:162: undefined reference to `acpi_dump_items'

Add the missing configuration dependency.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:11:40 +08:00
Tom Rini
d039975f07 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Allwinner H616 Ethernet support
- sunxi ata debug fix
2021-01-31 19:44:45 -05:00
Dario Binacchi
a38bb0d037 ata: sunxi: fix debug messages
It is useless and misleading to print the ret variable that is not set
by the dev_read_addr routine. Also, move the '\n' character after the
round bracket that contains the error code.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-31 23:55:56 +00:00
Andre Przywara
36ff6f00fb sunxi: OrangePi Zero 2: Enable Ethernet
With the fixes to the sun8i-emac driver, we can now enable Ethernet
support on the OrangePi Zero2.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-31 23:55:56 +00:00
Andre Przywara
eb5a2b6710 net: sun8i-emac: Determine pinmux based on SoC, not EMAC type
The pinmux choice for the RMII/RGMII pins the EMAC is connected to is
not dependent on the EMAC IP, but on the SoC it is integrated in.
Deriving the pinmux from the DT compatible string (as we do at the
moment) will thus cause problems with certain EMAC IP / SoC combinations.

To avoid this exact issue with the H616, let's use our Kconfig MACH
symbols to choose the correct pinmux setup.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-31 23:55:56 +00:00
Andre Przywara
b14e520517 net: sun8i-emac: Always clear syscon EPHY register
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect the EPHY select bit to be cleared for
proper operation with an external PHY.

Rework sun8i_emac_set_syscon_ephy() to be called regardless of the EMAC
model, and clear the H3_EPHY_SELECT bit if no internal PHY is used.

We get away without it so far because SoCs like the A64 clear this bit
on reset, but we need to explicitly clear it on the H616, for instance.
The Linux driver does so as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-31 23:55:56 +00:00
Tom Rini
b4804cdd57 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- Assorted gadget changes including:
  - dfu: Fix handling of UBI partitions in MTD backend
  - gadget: f_thor: fix wrong file size cast
  - Extend cmd: bcb
  - Fixes for fastboot and rockchip gadgets
  - dfu: Add SCRIPT and SKIP entities
  - dfu/thor: Add `dfu_alt_info` reinitialization from flashed script
  - u-boot: Reduce size of u-boot as usbd_device_* arrays are not exported
2021-01-31 14:24:35 -05:00
Tom Rini
fad42d3afb Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- Sync r8a774a1 DT files, tmio sdhi DMA fix
2021-01-31 14:23:47 -05:00
Tom Rini
242ef48ea7 Merge tag 'dm-pull-30jan21' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
tpm fixes for coral
binman fixes support for symbols in sub-sections
support for additional cros_ec commands
various minor fixes / tweaks
2021-01-31 08:49:53 -05:00
Li Jun
723fd5668f usb: gaget: ci: set ep's desc when enable ep
As we need standard usb_ep's desc, so set it when enable ep.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
27c9141b11 usb: gadget: fastboot: use correct max packet size
Change to use wMaxPacketSize of current speed EP desc for request
length wrap up.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
54b22f409c usb: udc: ci: update speed handling
Remove the gadget driver speed check, and set its max_speed to
be USB_SPEED_HIGH.

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
4df50f89f5 usb: composite: force gadget to be USB2 for HS only function
If one of functions is not super speed capable, we need force the udc
to be high speed, this is an equivalent implementation of
usb_gadget_udc_set_speed() in kernel but simple, which set the gadget
max_speed to be high speed, so afterwards when start gadget duc can
set the HW to be USB 2.0 mode.

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
429e2f299f usb: gadget: dnl: set dnl to be super speed
Set its max_speed to be super speed.

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
761dfe0fb2 usb: fastboot: add super speed support
Add super speed EP config.

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
8745b9ebcc usb: gadget: add super speed support
This patch is to add usb gadget super speed support in common
driver, including BOS descriptor and select the super speed
descriptor from function driver.

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Jun Li
42a594de14 usb: gadget: update os_desc_config when add config
Always use the new added config for os_desc_config to fix cdev->
os_desc_config may miss set in case we restart usb gadget driver.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Jun Li
4e643671f5 usb: gadget: set correct usb_configuration for os_desc_config
The current way to set cdev->os_desc_config is wrong if user restart
fastboot, as the old config is not used anymore and new allocated
usb_configuration will be used, so set the os_desc_config while
usb_add_config.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
8043cf8fbd usb: gadget: fastboot: add ext properties for WCID
Add device interface GUID for Microsoft Extended Properties Feature
Descriptor.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
37e4fc3354 usb: gadget: add WCID support for mfgtool
Enable WCID(Microsoft Compatible ID Feature Descriptor) for mfgtool.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
a764c94128 usb: gadget: OS Feature Descriptors support
This is a proting patch from linux kernel: 37a3a533429e
("usb: gadget: OS Feature Descriptors support"), the original commit
log see below:

There is a custom (non-USB IF) extension to the USB standard:

http://msdn.microsoft.com/library/windows/hardware/gg463182

They grant permission to use the specification - there is
"Microsoft OS Descriptor Specification License Agreement"
under the link mentioned above, and its Section 2 "Grant
of License", letter (b) reads:

"Patent license. Microsoft hereby grants to You a nonexclusive,
royalty-free, nontransferable, worldwide license under Microsoft鈥檚
patents embodied solely within the Specification and that are owned
or licensable by Microsoft to make, use, import, offer to sell,
sell and distribute directly or indirectly to Your Licensees Your
Implementation. You may sublicense this patent license to Your
Licensees under the same terms and conditions."

The said extension is maintained by Microsoft for Microsoft.

Yet it is fairly common for various devices to use it, and a
popular proprietary operating system expects devices to provide
"OS descriptors", so Linux-based USB gadgets whishing to be able
to talk to a variety of operating systems should be able to provide
the "OS descriptors".

This patch adds optional support for gadgets whishing to expose
the so called "OS Feature Descriptors", that is "Extended Compatibility ID"
and "Extended Properties".

Hosts which do request "OS descriptors" from gadgets do so during
the enumeration phase and before the configuration is set with
SET_CONFIGURATION. What is more, those hosts never ask for configurations
at indices other than 0. Therefore, gadgets whishing to provide
"OS descriptors" must designate one configuration to be used with
this kind of hosts - this is what os_desc_config is added for in
struct usb_composite_dev. There is an additional advantage to it:
if a gadget provides "OS descriptors" and designates one configuration
to be used with such non-USB-compliant hosts it can invoke
"usb_add_config" in any order because the designated configuration
will be reported to be at index 0 anyway.

This patch also adds handling vendor-specific requests addressed
at device or interface and related to handling "OS descriptors"."

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Peng Fan
16fd832e0e usb: gadget: add Kconfig for OS descriptors
Add Kconfig for OS descriptors

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
6777483f5d usb: gadget: move utf8_to_utf16le to header file
As other users may use utf8_to_utf16le() to convert the utf8
to utf16 for usb, so move it to head file.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
1c7aacb9a8 usb: gadget: OS String support
This is a porting patch from linux kernel: 19824d5eeece
("usb: gadget: OS String support"), original commit log
see below:

"There is a custom (non-USB IF) extension to the USB standard:

http://msdn.microsoft.com/library/windows/hardware/gg463182

They grant permission to use the specification - there is
"Microsoft OS Descriptor Specification License Agreement"
under the link mentioned above, and its Section 2 "Grant
of License", letter (b) reads:

"Patent license. Microsoft hereby grants to You a nonexclusive,
royalty-free, nontransferable, worldwide license under Microsoft鈥檚
patents embodied solely within the Specification and that are owned
or licensable by Microsoft to make, use, import, offer to sell,
sell and distribute directly or indirectly to Your Licensees Your
Implementation. You may sublicense this patent license to Your
Licensees under the same terms and conditions."

The said extension is maintained by Microsoft for Microsoft.

Yet it is fairly common for various devices to use it, and a
popular proprietary operating system expects devices to provide
"OS descriptors", so Linux-based USB gadgets whishing to be able
to talk to a variety of operating systems should be able to provide
the "OS descriptors".

This patch adds optional support for gadgets whishing to expose
the so called "OS String" under index 0xEE of language 0.
The contents of the string is generated based on the qw_sign
array and b_vendor_code.

Interested gadgets need to set the cdev->use_os_string flag,
fill cdev->qw_sign with appropriate values and fill cdev->b_vendor_code
with a value of their choice.

This patch does not however implement responding to any vendor-specific
USB requests."

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Li Jun
c93edbf538 usb: gadget: don't change ep name for dwc3 while ep autoconfig
As the SDP protocol use the predefined ep num for communication, we can't
change its name hence reset its ep num while do ep autoconfig, this is
only apply for SPL.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Ye Li
71a5732b43 usb: gadget: Add ep_config call back to usb_gadget_ops
Since some new fields in usb_ep structure been moved to usb_ss_ep.
The CDNS3 gadget driver should replies on this operation to bind the
usb_ss_ep with the endpoint descriptor when function layer uses
usb_ep_autoconfig to add endpoint descriptors to gadget. So that
CDNS3 driver can know the EP information and configure the EP once
the set configuration request is received.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-31 14:08:56 +01:00
Pali Rohár
f2fa499883 usb: gadget: Do not export usbd_device_* arrays
Each array is used only in one file (core.c or ep0.c). Move their content
to correct file, mark them as static and do not export out of current file.

This change allows to decrease size of u-boot.bin as more of those strings
are not used.

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-01-31 14:08:56 +01:00
Marek Szyprowski
e47431aa5c thor: add support for the dfu_alt_info reintialization from the flashed script
Reinitialize dfu_env_entities after flashing the 'SCRIPT' entity to
ensure that the potential changes to the 'dfu_alt_info' environment
variable are applied.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-31 14:08:56 +01:00
Marek Szyprowski
9129f2f164 dfu: add support for the dfu_alt_info reintialization from the flashed script
Reinitialize DFU USB gadget after flashing the 'SCRIPT' entity to ensure
that the potential changes to the 'dfu_alt_info' environment variable are
applied.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[lukma - I've moved the bool retry to avoid build (CI) errors]
2021-01-31 14:08:56 +01:00
Marek Szyprowski
c533f94c10 dfu: add 'SCRIPT' entity
Define a new 'SCRIPT' type for DFU entities. The downloaded data are
treated as simple u-boot's scripts and executed with run_command_list()
function.

Flashing the 'SCRIPT' entity might result in changing the 'dfu_alt_info'
environment variable from the flashed script, so add a global variable
for tracking the potential need to reinitialize the dfu_alt_info related
structures.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-31 14:08:56 +01:00
Jaehoon Chung
b5f3405b9d dfu: add 'SKIP' entity
Define a new 'SKIP' type for the DFU entities. The flashed data for that
entity is simply ignored without returning any error values.

This allows to have one flashing procedure and images for the different
board types or variants, where each board uses only the images relevant
to it and skips the rest. This is especially usefull for the THOR
protocol, which usually transfers more than one file in a single session.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
[mszyprow: rephrased commit message and docs for easier reading, changed
	   subject to "dfu: add 'SKIP' entity"]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-31 14:08:56 +01:00
Marek Szyprowski
f21358ad6c dfu: mmc: use the default MMC device if entity specifies it as -1
Use the default MMC device set in the command line if entity specifies it
as -1. This allows to use the same dfu_alt_info string for different MMC
devices (like embedded eMMC and external SD card if data layout is the
same on both devices).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-31 14:08:56 +01:00
Marek Szyprowski
c954ff5fbf cmd: usb_mass_storage: show device interface name
Show the interface name (i.e. 'mmc') in the information string to ease
user checking which device is exported via USB Mass Storage protocol.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2021-01-31 14:08:56 +01:00
Andy Shevchenko
6ffc8e2993 f_fastboot: Avoid use-after-free in the global pointer variable
In case of usb_add_function() failure the error path has an issue,
i.e the global pointer variable is assigned to garbage

Fix the above mentioned issue by assigning pointer to NULL.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-31 14:08:56 +01:00
Andy Shevchenko
ff52577c1b f_rockusb: Avoid use-after-free in the global pointer variable
In case of usb_add_function() failure the error path has two issues:
 - the potentially allocated structure isn't getting freed
 - the global pointer variable is assigned to garbage

Fix the above mentioned issues by freeing memory and assigning NULL.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-31 14:08:56 +01:00
Andy Shevchenko
0234609d96 f_rockusb: Use NULL instead of 0 for pointers
get_rkusb() mistakenly uses integers without cast.
Convert them to proper type.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-31 14:08:56 +01:00
Eugeniu Rosca
bafdf4caac cmd: bcb: Add support for processing const string literals in bcb_set()
On request/suggestion from Simon Glass back in May 22 2019 [1], the
'strsep' mechanism implemented in bcb_set() was set to work directly
with user-provided argv strings, to avoid duplicating memory and for
the sake of simpler implementation.

However, since we recently exposed bcb_write_reboot_reason() API to be
called by U-Boot fastboot, the idea is to be able to pass const string
literals to this new BCB API, carrying the reboot reason.

Since 'strsep' (just like its older/superseded sibling 'strtok')
modifies the input string passed as parameter, BCB command in its
current state would attempt to perform in-place modifications in a
readonly string, which might lead to unexpected results.

Fix the above with the cost of one dynamic memory allocation ('strdup').
This will also ensure no compiler warnings when passing string literals
to bcb_write_reboot_reason().

[1] http://u-boot.10912.n7.nabble.com/PATCH-v2-0-2-Add-bcb-command-to-read-modify-write-Android-BCB-td369934i20.html#a370456

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2021-01-31 14:08:56 +01:00
Eugeniu Rosca
e74670adfe cmd: bcb: Expose 'bcb_write_reboot_reason' to external callers
Fastboot is evolving and beginning with commit [1], the
upstream implementation expects bootloaders to offer support for:
 - reboot-recovery
 - reboot-fastboot

The most natural way to achieve the above is through a set of
pre-defined "reboot reason" strings, written into / read from
the BCB "command" field, e.g.:
 - bootonce-bootloader [2]
 - boot-fastboot [3]
 - boot-recovery [4]

Expose the first 'bcb' API meant to be called by e.g. fastboot stack,
to allow updating the BCB reboot reason via the BCB 'command' field.

[1] https://android.googlesource.com/platform/system/core/+/dea91b4b5354af2
    ("Add fastbootd.")
[2] https://android.googlesource.com/platform/bootable/recovery/+/cba7fa88d8b9
    ("Add 'reboot bootloader' to bootloader_message.")
[3] https://android.googlesource.com/platform/bootable/recovery/+/eee4e260f9f6
    ("recovery: Add "boot-fastboot" command to BCB.")
[4] https://android.googlesource.com/platform/system/core/+/5e98b633a748695f
    ("init: Write the reason in BCB on "reboot recovery"")

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
[lukma - added missing #include <linux/errno.h> to avoid build breaks]
2021-01-31 14:08:56 +01:00
Eugeniu Rosca
e2ffb3be49 cmd: bcb: Extract '__bcb_store' from 'do_bcb_store' for internal needs
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.

A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).

This third patch makes '__bcb_store' available for internal needs.

No functional change intended.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2021-01-31 14:08:56 +01:00
Eugeniu Rosca
02ebe6deae cmd: bcb: Extract '__bcb_set' from 'do_bcb_set' for internal needs
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.

A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).

This second patch makes '__bcb_set' available for internal needs.

No functional change intended.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2021-01-31 14:08:56 +01:00
Eugeniu Rosca
24e85bbd69 cmd: bcb: Extract '__bcb_load' from 'do_bcb_load' for internal needs
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.

A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).

This first patch makes '__bcb_load' available for internal needs.

No functional change, except for a tiny update in error handling.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2021-01-31 14:08:56 +01:00
Seung-Woo Kim
8b387f112b gadget: f_thor: fix wrong file size cast
Casting 32bit int value directly into 64bit unsigned type causes
wrong value for file size equal or larger than 2GB. Fix the wrong
file size by casting uint32_t first.

Fixes: commit 1fe9ae76b1 ("gadget: f_thor: update to support more than 4GB file as thor 5.0")
Reported-by: Junghoon Kim <jhoon20.kim@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-31 14:08:56 +01:00
Guillermo Rodriguez
1b3c4cb1e3 dfu: Fix handling of UBI partitions in MTD backend
For UBI partitions ("partubi" in dfu_alt_info), dfu_fill_entity_mtd sets
the mtd.ubi flag; however other functions incorrectly check for nand.ubi
instead. Fix this by checking for the correct flag.

Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2021-01-31 14:08:56 +01:00
Marek Vasut
8a73bef338 mmc: tmio: sdhi: Configure internal DMA bus width
The R-Car3 SDHI should set these two bits in DMA_MODE register according
to the specification, to indicate 64bit bus width. No other bus width
options are permitted and the default value is 0, which is incorrect.
Set the bits accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-01-31 14:08:45 +01:00
Biju Das
32568ee5b9 arm: dts: rmobile: r8a774a1: Synchronize DTs with Linux 5.10
DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and
r8a774a1-u-boot.dtsi have been imported from linux 5.10
commit 2c85ebc57b3e1817 ("Linux 5.10").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-01-31 14:08:45 +01:00
Heinrich Schuchardt
f84eda89e5 disk: part: sandbox support in dev_print()
Commands like 'fatinfo' call dev_print() to print device information. If
the block device is created via 'host bind', we should print accurate
information.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-30 14:25:42 -07:00
Heinrich Schuchardt
168e313b5b sandbox: fill block device meta information
Provide information about host backed block device.

Mark the device created by 'host bind' as removable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-30 14:25:42 -07:00
Dario Binacchi
fabae8711f dm: replace auto_alloc_size with auto
The auto_alloc_size members of struct driver has been renamed auto.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Stanislav Pinchuk
a00e0f7ae5 do not pass NULL pointer to libfdt
Re-send because of line-wraps.

Without this patch, u-boot just hangs if the fdt pointer is
not initialized. The diagnostic subsystems are not yet initialized,
so all you get is a blind hang.

Signed-off-by: Stanislav.Pinchuk@kaspersky.com
2021-01-30 14:25:42 -07:00
Heinrich Schuchardt
43db07507a sandbox: keep time offset when resetting
The UEFI Self Certification Test (SCT) checks the SetTime() service with
the following steps:

* set date
* reset
* check date matches

To be compliant the sandbox should keep the offset to the host RTC during
resets. The implementation uses the environment variable
UBOOT_SB_TIME_OFFSET to persist the offset.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Simon Glass
5e6c9029cd binman: Print a debug message when binman selects a node
Add some debugging to indicate which node the binman library is looking
at.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Simon Glass
3306eeca89 Add a symlink for ctype.h
Libraries that link with U-Boot typically may expect to be able to include
ctype.h but this file is in a different place in U-Boot. Add a symlink to
make this work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Simon Glass
ff5fa7d626 dm: core: Update ofnode_read_fmap_entry() to read hashes
At present this function uses the old format for reading hashes. Add
support for the current format.

Add a test while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Simon Glass
017d421828 dm: core: Add a comment about pinctrl_select_state()
The use of pinctrl in the core of driver model is useful but can provoke
some strange behaviour. Add a comment to aid debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Simon Glass
0dc2bf2b6e clk: x86: Correct the driver name
The current driver name does not match its compatible string, so
of-platdata does not work correctly. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
5c5992cb90 clk: Add debugging for return values
Use the log_msg_ret() mechanism to get error-return information when
clocks fail to probe, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
ef79ef21a8 dm: core: Don't inline dev_read...() calls with of-platdata
At present if these calls are used with of-platdata, a confusing error is
produced, referring to a function not actually called by the code causing
the problem.

Fix this by not inlining, so that the error mentions the dev_read_...()
function and it is more obvious what is going on.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
d85f2c4f29 sandbox: Disable I2C emulators in SPL
These cannot work with of-platdata since they currently need the
devicetree at runtime. Disable the emulators and the sandbox I2C driver
that needs them. We can enable these later, if needed for testing.

Switch the of_plat_parent test over to use a simple bus instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-30 14:25:41 -07:00
Simon Glass
dfb5bfbc20 i2c: desigware: Add an alias for Intel Apollo Lake
Add an alias so that this driver can be used in TPL on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-30 14:25:41 -07:00
Simon Glass
442e6305b5 x86: coral: Support TPM and RTC in SPL
Update the devicetree so that the TPM and RTC can be used in SPL. Also
enable the pins used for getting the memory configuration settings while
we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
1426174f3f spl: Tidy up SPL/TPL malloc sizes
The current help talks about relocation which doesn't apply to SPL and
TPL. Update it to avoid confusion.

Also make the TPL size default to the same as the SPL size, since this is
more likely to be a useful value than the one used by U-Boot proper, which
may be quite a bit larger.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
10f746591f cros_ec: Add vstore support
The EC can store small amounts of data for the benefit of the
verified boot process. Since the EC is seldom reset, this can allow the
AP to store data that survives a reboot or a suspend/resume cycle.

Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
d9ffaef6fe cros_ec: Allow use with of-platdata
Avoid reading the device tree when of-platdata is in use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
3ae338299e cros_ec: Show events in human-readable form
Add a command to show the current events as a list of names. This is
easier to decipher than a bit mask.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
3a6c994f38 cros_ec: Add support for switches
On x86 platforms the EC provides a way to read 'switches', which are
on/off values determined by the EC.

Add a new driver method for this and implement it for LPC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
2b4b653391 cros_ec: Add documentation for cros_ec driver operations
Add comments to these methods so it is documented in this central place,
not just in each driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
8aec32f6ab cros_ec: Support reading EC features
The EC can support a variety of features and provides a way to find out
what is available. Add support for this.

Also update the feature list to the lastest available while we are here.
This is at:

   https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/include/ec_commands.h

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
7791df576c cros_ec: Add support for reading the SKU ID
This allows reading strapping pins attached to the EC. Add an
implementation for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
698e30f7a8 cros_ec: Add run-time check for input buffer overflow
This should not happen in normal operation, but the EC might have a bug,
so add a run-time check just in case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
2525e53c27 cros_ec: Tidy up a few delays
Allow a longer time for the EC to reboot. Also use a constant for the
hash delay time, so it is clear what it is for.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
d8e9a93895 cros_ec: Add a function for the hello message
This is used several times in this file. Put it in a function to avoid
code duplication.

Also add a test for this function. There are no cros_ec tests at present,
so it is time to update the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Heinrich Schuchardt
3096ee866e doc/sandbox: improve formatting of command line options
Show the command line options in bold.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Heinrich Schuchardt
b680c5539a sandbox: fix sandbox_cmdline_cb_test_fdt()
fmt does not foresee any parameter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Heinrich Schuchardt
a0df924928 x86: typo segement
%s/segement/segment/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-01-30 14:25:41 -07:00
Simon Glass
5c6ba71bbe binman: Allow for skip_at_start when reading entries
The offset of an entry needs to be adjusted by its skip-at-start value.
This is currently missing when reading entry data. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
6eb9932668 binman: Support alignment of files
When packing files it is sometimes useful to align the start of each file,
e.g. if the flash driver can only access 32-bit-aligned data. Provides a
new property to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
5af9ebc4bc binman: Allow vblock to include devicetree blobs
At present if a devicetree blob is included in a vblock it does not deal
with updates. This is because the vblock is created once at the start and
does not have a method to update itself later, after all the entry
contents are finalised.

Fix this by adjusting how the vblock is created.

Also simplify Image.ProcessEntryContents() since it effectively duplicates
the code in Section.ProcessContents().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
939d1062d0 binman: Support reading an image with entry args
Normally when an entry is created, any entry arguments it has are required
to be provided, so it can actually generate its contents correctly.

However when an existing image is read, Entry objects are created for each
of the entries in the image. This happens as part of the process of
reading the image into binman.

In this case we don't need the entry arguments, since we do not intend to
regenerate the entries, or at least not unless requested. So there is no
sense in reporting an error for missing entry arguments.

Add a new property for the Image to handle this case. Update the error
reporting to be conditional on this property.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
870a9ead56 binman: Support finding symbols in sub-sections
At present binman only supports resolving symbols in the same section as
the binary that uses it. This is quite limited because we often need to
group entries into different sections.

Enhance the algorithm to search the entire image for symbols.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
1ecf3b8f27 binman: Fix a few file comments
Two files have the wrong comment at the top of them. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
5b378e4d0b binman: Show the size when writing entries
Update the log output to show the size, since this is useful information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
397a770254 binman: Update the TODO list
Two of the items have been completed and I thought of another one. Update
the list.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
6deff872cf patman: Correct lz4 compression parameters
At present on large files, lz4 uses a larger block size (e.g. 256KB) than
the 64KB supported by the U-Boot decompression implementation. Also it is
optimised for maximum compression speed, producing larger output than we
would like.

Update the parameters to correct these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
9fc6ebd8fe dtoc: binman: Drop Python 2 code
Drop a few more Python 2 relics that are no-longer needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
5c53da2b30 x86: coral: Enable CONFIG_BOOTARGS_SUBST
Enable this option so that the boot-script substitutions of %U works as
expected. With this, it can boot into Chrome OS.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
30e486f3a5 x86: coral: Update an unused pin to reduce power
GPIO_25 is not used on coral, so set it up in deep sleep.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
3039fc7e96 tpm: cr50: Rename driver to work with of-platdata
Update the driver name to match the compatible string, so it can work
with of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
5372fc772e tpm: cr50: Add a better description and more debug
Update the TPM description to include the interrupt mechanicm since this
is useful to know. Also add a warning if the TPM cannot be found and a
debug line if it succeeds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Simon Glass
6208975e23 tpm: cr50: Check for valid locality
When the Cr50 starts up it doesn't have a valid locality. The driver sets
it to -1 to indicate that. Tracking this allows cr50_i2c_cleanup() to
avoid releasing a locality that was not claimed.

However the helper functions that generate the flags use a u8 type which
cannot support -1, so they return a locality of 0xff.

Fix this by updating the type. With this, 'tpm startup TPM2_SU_CLEAR'
works as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:41 -07:00
Tom Rini
76404f86a2 Merge tag 'efi-2021-04-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc1-4

Bug fixes:

* re-read the partition table after writing GPT
* fix a problem booting ARMv7 boards with PSCI without UEFI
* make aarch64 UEFI test programs compatible with GRUB linux command
* correct the alignment check in the EFI_BLOCK_IO_PROTOCOL
* check EFI_BLOCK_IO_PROTOCOL.Media->LastBlock in unit test
2021-01-30 14:49:17 -05:00
Heinrich Schuchardt
18dd984c56 efi_loader: add Linux magic to aarch64 crt0
Add the Linux magic to the EFI file header to allow running our test
programs with GRUB's linux command. Now we can dump the fixed-up device
tree with our dtbdump.efi tool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 20:22:40 +01:00
Heinrich Schuchardt
850d27b4b9 tools: add mkeficapsule to .gitignore
mkeficapsule is a build product. Add it to .gitignore

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 20:22:40 +01:00
Gary Bisson
4e9bd06237 disk: part_efi: update partition table entries after write
Fixes fastboot issues when switching from mbr to gpt partition tables.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 20:22:40 +01:00
Heinrich Schuchardt
82d01f04fa efi_loader: switch to non-secure mode later
Some ARMv7 boards using PSCI require to be in secure-mode when booted via
'bootz' or 'bootm'. During distro-boot 'bootefi bootmgr' is called to check
if booting via UEFI is possible.

With the change we change the switch from secure mode to non-secure mode is
moved from the UEFI subsystem setup to just before calling StartImage().

Cc: Jernej Škrabec <jernej.skrabec@gmail.com>
Reported by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 20:22:40 +01:00
Heinrich Schuchardt
688e88256f efi_loader: correct block IO alignment check
If the field Media->IoAlign of the EFI block IO protocol is zero, no
alignment is required. Our code required 4 GiB alignment in this case.

Don't check buffer alignment if Media->IoAlign == 0.

Fixes: f59f0825e8 ("efi_loader: parameter checks BLOCK_IO_PROTOCOL")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 20:22:40 +01:00
Heinrich Schuchardt
74a614d70a efi_selftest: test EFI_BLOCK_IO_PROTOCOL.Media->LastBlock
The field Media->LastBlock of the EFI_BLOCK_IO_PROTOCOL must be filled
with the index of the last logical block (LBA) for the block device that
our test driver provides.

After calling ConnectController() U-Boot exposes the block IO protocol for
the partition check that the value of Media->LastBlock equals the partition
size minus one.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 20:22:40 +01:00
Tom Rini
472a716b8f configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-29 13:56:04 -05:00
Tom Rini
79382e9766 Merge branch '2021-01-29-assorted-fixes'
- Assorted test fixes
- Assorted minor FAT fixes
- Assorted Kconfig dependency fixes
- MediaTek, vexpress_aemv8a improvements
- Other assorted minor fixes
2021-01-29 13:50:06 -05:00
Heinrich Schuchardt
7fd892b215 cmd: add more implementation IDs to sbi command
Additional SBI implementation IDs have been added to the upcoming
next version of the SBI specification.

https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 10:36:49 -05:00
Heinrich Schuchardt
9d43b4106e test: inconsistent string tests
Excluding ut str in test/cmd_ut.c but compiling test/str_ut.c results in
failure of the Python test invoking the C unit tests as observed on
sipeed_riscv_smode_defconfig:

FAILED test/py/tests/test_ut.py::test_ut[ut_str_upper]

Allow to compile test/str_ut.c on all boards.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-29 10:36:49 -05:00
Heinrich Schuchardt
fe158657a5 test: inconsistent bootm tests
Excluding ut bootm in test/cmd_ut.c but compiling test/bootm.c results in
failure of the Python test invoking the C unit tests as observed on
sipeed_riscv_smode_defconfig:

FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_nop]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_nospace]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_silent]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_silent_var]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst_both]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst_var]

Only compile test/bootm.c on the sandbox.

Fixes: f158ba15ee ("bootm: Add tests for fixup_silent_linux()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-29 10:36:49 -05:00
Patrick Delaunay
ea5641ec22 env: sf: cosmetic: remove unnecessary space
Remove the unnecessary space before the 2 "done:" labels
in env_sf_save().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-29 10:36:49 -05:00
Tom Rini
a59e59c9be test: Update test_fs to not use deprecated pytest.yield_fixture()
As noted in comments, yield_fixture has been deprecated for longer than
our minimum required version of pytest.  Newer versions of pytest cause
this to be a louder warning, and as the migration is trivial, perform it
now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-29 10:36:49 -05:00
Heinrich Schuchardt
89d52afa5d test: correct entry point to pytest
With Pytest 6.0.2 'make tests' fails:

sandbox: Traceback (most recent call last):
  File "./test/py/test.py", line 20, in <module>
    sys.exit(load_entry_point('pytest', 'console_scripts', 'pytest')(args))
TypeError: console_main() takes 0 positional arguments but 1 was given

The definition of console_scripts has changed as follows:

Pytest 4.6.1:

[options.entry_points]
console_scripts =
        pytest=pytest:main
        py.test=pytest:main
        
Pytest 6.0.2:
        
[options.entry_points]
console_scripts =
    pytest=pytest:console_main
    py.test=pytest:console_main

The new function console_main() has a comment:
"This function is not meant for programmable use; use `main()`"

Hence let's call pytest.main() directly.
Move args processing into the __main__ paragraph.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
2021-01-29 10:36:49 -05:00
Heinrich Schuchardt
34d7f72a1d test: pr_cont_test.o depends on CONFIG_LOG=y
Compiling wandboard_defconfig with CONFIG_UT_LOG=y leads to a build error:

test/log/pr_cont_test.c: In function ‘log_test_pr_cont’:
test/log/pr_cont_test.c:28:14: error:
‘gd_t’ {aka ‘volatile struct global_data’} has no member named ‘log_fmt’
  log_fmt = gd->log_fmt;

We do not want to let CONFIG_UT_LOG depend on CONFIG_LOG=y because we have
tests for logging functions called with CONFIG_LOG=n.

Fix the build dependency.

Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 10:36:49 -05:00
Matthias Brugger
8921ac9747 fs: btrfs: Select SHA256 in Kconfig
Since commit 565a4147d1 ("fs: btrfs: Add more checksum algorithms")
btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
it. This leads to compilation errors:
fs/built-in.o: In function `hash_sha256':
fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-01-29 10:36:49 -05:00
Heinrich Schuchardt
84ca3055f0 fs: fat: remove superfluous assignments
Do not assign a value to a variable if it is not used.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 10:36:48 -05:00
Heinrich Schuchardt
41ac28c672 fs: fat: avoid out of bounds access warning
When copying short name plus extension refer to the encapsulating structure
and not to the short name element.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29 10:36:48 -05:00
Heinrich Schuchardt
9c3808deba avb: AVB_VERIFY depends on MMC
AVB Verified Boot uses functions related to MMC.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-01-29 10:36:48 -05:00
Stanislav Pinchuk
ef7db7a3e8 vexpress_aemv8a: allow overriding BOOTCOMMAND
Re-send because of line-wraps.

This patch fixes the behaviour of the menuconfig's BOOTCOMMAND
setting. Which is just ignored without that patch on
vexpress_aemv8a platform.

Signed-off-by: Stanislav.Pinchuk@kaspersky.com
2021-01-29 10:36:48 -05:00
SkyLake.Huang
3f1250a9e2 arm: dts: enable MTK SPI NOR controller driver
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629.
2. Enable quad mode for read and single mode for write.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
2021-01-29 10:35:14 -05:00
SkyLake.Huang
7a49d61742 spi: mtk_snor: add support for MTK SPI NOR controller
This patch adds support for MTK SPI NOR controller, which you
can see on mt7622 & mt7629.

1. This controller is designed only for SPI NOR. We can't adjust
its bus clock dynamically. Set clock in dts instead.
2. This controller only supports 1-1-1 write mode.
3. Remove mtk_snor_match_read() since upper SPI-MEM layer already
handles command.
4. sf read/write/update commands are tested with this driver.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
2021-01-29 10:35:14 -05:00
Tom Rini
e6b8e948ab test: test_ofplatdata: Mark as sandbox specific
This test checks for output specific to the sandbox device tree, mark it
as sandbox specific.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-29 10:34:34 -05:00
Tom Rini
07394fb05e Merge branch '2021-01-27-assorted-fixes-and-improvements'
- A wide variety of fixes throughout the tree.
2021-01-28 11:37:58 -05:00
Marek Szyprowski
54f884bb0b cmd: misc: Fix return value for the sleep command
If sleeping has been interrupted, return CMD_RET_FAILURE instead of -1
(CMD_RET_USAGE).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-27 17:07:48 -05:00
Ying-Chun Liu (PaulLiu)
e89ef172f8 doc: device-tree-bindings: rtc: Abracon AB x80x i2c rtc
Document the bindings for abracon,abx80x and related compatibles.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2021-01-27 17:07:48 -05:00
Ying-Chun Liu (PaulLiu)
8d612ccde9 rtc: add rtc-abx80x, a driver for the Abracon AB x80x i2c rtc
This is a basic driver for the ultra-low-power Abracon AB x80x series
of RTC chips. It supports in particular, the supersets AB0805 and AB1805.
It allows reading and writing the time, and enables the supercapacitor or
battery charger.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2021-01-27 17:07:48 -05:00
Yuezhang.Mo@sony.com
e088f0c3d8 autoboot: fix illegal memory access when stop key and delay key are empty
If both stop key and delay key are empty, the length of these
keys is 0. The subtraction operation will cause the u_int type
variable to overflow, will cause illegal memory access in key
input loop.

This commit fixes this bug by using int type instead of u_init.
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-27 17:07:48 -05:00
Simon Glass
1e35a4d228 binman: Allow reading entries from a subnode
Some images may have multiple copies of the same thing, e.g. two versions
of the read/write U-Boots. It is necessary to read data from one or other
of these under selection of the verified-boot logic. Add a function to
select the subnode to use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
76b54d8ca1 binman: Move selection of the binman node into a function
Move this logic out of the main init function so it is available for
other purpose.

Use a different error when multiple-images is in use but no subnode is
available. This makes it easier to determine what is wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
ec5f101a37 crc32: Exclude crc32 from TPL
Unfortunately the toolchain often brings in the crc32 table even if the
function is not actually used. For now, exclude it from the TPL build,
which is very sensitive to size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
8a8a8314ce mmc: pci_mmc: Set the removable flag
Set this flag so that it is available to those looking at the device. For
non-removable devices there is no need to check for insertion/removable
since the media can never change.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-27 17:03:16 -05:00
Simon Glass
60868632f6 mmc: pci_mmc: Only generate ACPI code for the SD card
At present if an eMMC part is in the system, the ACPI table generated
will include information about that, as well as the SD card. We only need
to include the SD card, since it has a card-detect GPIO. Use a different
compatible string for each option, and add code only for the SD card.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-27 17:03:16 -05:00
Simon Glass
f8a2d191cf uuid: Add a comment for UUID_STR_LEN
This macro is the length of the string but excludes the terminator. Users
must add 1 when declaring a large-enough string. Add a comment to make
this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
ac42fe539c display_options: Use USE_TINY_PRINTF for SPL check
At present this code uses a simple printf() format if running in SPL. But
SPL can use the full printf. Use USE_TINY_PRINTF instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
0a2aaab0b6 fdtdec: Use CONFIG_IS_ENABLED in board_fdt_blob_setup()
This setting may be different in SPL and TPL. Update the code to check
the correct setting.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
e1d23f569b fdtdec: Update the missing-devicetree message
This includes information about sandbox which is not relevant for most
boards. Drop it.

Also add the address to help figure out the problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
177e7f9ce7 net: Use CONFIG_IS_ENABLED() in eth_dev_get_mac_address()
This function may be used in SPL where devicetree is not available.
Use the correct macro so that the function does not try to read it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
7d70116fc7 video: Allow syncing the entire framebuffer to the copy
In some cases so much of the framebuffer is updated that it is not worth
copying the changes piece by piece to the copy framebuffer. Add a function
to copy the whole thing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
02d7a53ce6 bloblist: Add missing tag names
Add tag names for recently added types.

Fixes: d2cb7a22da (x86: Allow putting some tables in the bloblist)
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
9fe064646d bloblist: Support relocating to a larger space
Typically in TPL/SPL the bloblist is quite small. But U-Boot proper may
want to add a lot more to it, such as ACPI tables.

Add a way to expand the bloblist by relocating it in U-Boot proper, along
with the other relocation activities.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
09d9ba9097 spl: Add functions for next and previous phase
It is useful to be able to figure out which phase we are loading next and
which phase we came from. Add some functions to handle this as well as
returning the name of a phase. This allows messages like "Booting to x"
where x is the next phase.

At present, TPL says 'Jumping to U-Boot' at the end, when in fact it is
jumping to SPL. This is confusing, so use the new functions to correct
this.

Tests for this will come with an upcoming minor SPL test refactor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Philippe Reynes
040fad3791 lib: rsa: rsa-verify: don't look for keys in the FIT image
In the function rsa_verify_hash, if the "main" key doesn't
work, u-boot try others keys. But it searches those keys
in the FIT image instead of the u-boot device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Stefan Roese
a7a029d14d pci: Remove CONFIG_PCI_ENUM_ONLY as it's not used (any more)
This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as
it is not configured for any board (any more). With this removal, some
PCI related files get cleaned up a bit.

Additional, dm_pciauto_setup_device() is now static, as it's not
referenced from any code outside of this C file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Alexandru Gagniuc
76c78a5481 common: fit-sig: Fix error message in fit_config_verify_sig()
In fit_config_verify_sig(), when no 'signature*' subnode exists in
the configuration node, the fdt_for_each_subnode() loop is a no-op.
Therefore, no error flags are set, and 'err_,sg' is not populated
with an error string. This is incorrect behavior.

Populate err_msg to indicate that no 'signature' is found, before
entering the loop. The first call to fit_image_verify_sig() will
override clear err_msg, or set it to a more specific message.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Volodymyr Babchuk
b7cfe32e18 smccc: fix sign bit expansion
Signed ARM_SMCCC_FAST_CALL value is shifted to 31'st bit. Then, it is expanded
to 64 bit value, which results in 1s in higher 32 bits.

This causes corrupted values in 64-bit SMC IDs and issues in buggy handlers of
32-bit calls.

We need to make ARM_SMCCC_FAST_CALL unsigned long, so it would work properly
on 32 bit architectures.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-01-27 16:58:57 -05:00
Philippe Reynes
4d145f26dd bootcount: allow to use this feature on TPL
This commit add an option TPL_BOOTCOUNT_LIMIT to
use bootcount on TPL.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 16:58:57 -05:00
Pali Rohár
e9ebc17e59 Makefile: Do not call useless command 'true'
Macro 'cmd_objcopy_uboot' currently does not work with passed empty command
expanded from 'cmd_static_rela' and therefore dummy command 'true' is set
in 'cmd_static_rela' to workaround this issue.

Eliminate it now by fixing 'cmd_objcopy_uboot' macro to work also with
empty 'cmd_static_rela' macro and remove useless invocation of command
'true'.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 16:13:11 -05:00
Tom Rini
8b195f4b71 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Disable slot when emmc is not present (Pali)
- DS414; config header cleanup (Phil)
- PCI: auto-config enhancement (Phil)
- pci_mvebu: Also map IO region (Phil)
- serial: a3720: Implement pending method for output direction (Pali)
- turris_mox: Enable a few commands (Marek)
- helios4 & ClearFog changes (Dennis)
- Plus some minor misc changes
2021-01-27 11:39:31 -05:00
Tom Rini
290e40b2aa Merge tag 'doc-2021-04-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for documentation tag doc-2021-04-rc1-3

Update the build system for the HTML documentation to allow using
Sphinx 3.

Man-page for exception command.
2021-01-27 11:32:23 -05:00
Tom Rini
e6738b56e6 Merge branch '2021-01-27-assorted-net-updates'
- e1000 fixes for MIPS
- netconsole and ping fix
- cortina_ni driver
- micrel PHY fix
- Add fdtoverlays keyword to extlinux file parsing
2021-01-27 11:30:31 -05:00
Neil Armstrong
69076dff22 cmd: pxe: add support for FDT overlays
This adds support for specifying FDT overlays in an extlinux/pxelinux
configuration file.

Without this, there is no simple way to apply overlays when the kernel
and fdt is loaded by the pxe command.

This change adds the 'fdtoverlays' keyword for a label, supporting multiple
overlay files to be applied on top of the fdt specified in the 'fdt' or
'devicetree' keyword.

Example:
  label linux
    kernel /Image
    fdt /soc-board.dtb
    fdtoverlays /soc-board-function.dtbo
    append console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait

This code makes usage of a new variable called fdtoverlay_addr_r used to load
the overlay files without overwritting anything important.

Cc: Tom Rini <trini@konsulko.com>
Cc: Andre Heider <a.heider@gmail.com>
Cc: Jernej Škrabec <jernej.skrabec@siol.net>
Cc: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Jernej Škrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Škrabec <jernej.skrabec@siol.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-27 10:47:54 -05:00
Marek Vasut
b5f09df246 net: phy: micrel: Try default PHY ofnode first
The phydev structure has a PHY OF node pointer in it, use that OF node
first when looking up PHY OF node properties, since that is likely the
correct PHY OF node pointer. If the pointer is not valid, which is the
case e.g. on legacy DTs, fall back to parsing MAC ethernet-phy subnode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2021-01-27 10:47:54 -05:00
Alex Nemirovsky
c34a927566 board: presidio-asic: Add CAxxxx Ethernet support
Add CAxxxx Ethernet support for the Cortina Access
Presidio Engineering Board

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
2021-01-27 10:47:52 -05:00
Abbie Chang
a70d7b0192 net: phy: ca_phy: Add driver for CAxxxx SoCs
Add phy driver support for MACs embedded inside Cortina Access SoCs

Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>

CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Tom Rini <trini@konsulko.com>
CC: Aaron Tseng <aaron.tseng@cortina-access.com>

Moved out PHY specific code out of Cortina NI Ethernet driver
and into a Cortina Access PHY interface driver
2021-01-27 10:47:47 -05:00
Aaron Tseng
febe13b438 net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs
Add Cortina Access Ethernet device driver for CAxxxx SoCs.
This driver supports both legacy and DM_ETH network models.

Signed-off-by: Aaron Tseng <aaron.tseng@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com>

CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Abbie Chang <abbie.chang@Cortina-Access.com>
CC: Tom Rini <trini@konsulko.com>
2021-01-27 10:47:44 -05:00
Yang Liu
d9506cd41c net: fix ping in netconsole
Should not init eth device when doing ping in netconsole.

Signed-off-by: Yang Liu <yliu@cybertec.com.au>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2021-01-27 08:25:31 -05:00
Stefan Roese
14807449a4 net: e1000: Add missing address translations
Add some missing address translations from virtual address in local DRAM
to physical address, which is needed for the DMA transactions to work
correctly.

This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
2021-01-27 08:25:31 -05:00
Stefan Roese
919c8ede86 net: e1000: Use virt_to_phys() instead of pci_virt_to_mem()
Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual
address in local DRAM to a physical address. The correct macro here
is virt_to_phys() so switch to using this macro.

As virt_to_bus() is now not used any more, this patch also removes
both definitions (DM and non-DM).

This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
2021-01-27 08:25:31 -05:00
Stefan Roese
55f0103567 net: e1000: Remove unused bus_to_phys() macro
bus_to_phys() is defined but not referenced at all. This patch removes
it completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
2021-01-27 08:25:31 -05:00
Marek Behún
177cecdc4e arm: mvebu: turris_mox: enable setexpr command in defconfig
Enable setexpr command in defconfig for Turris MOX. We have found that
this is sometimes useful in U-Boot scripts and there is enough space in
NOR memory on MOX.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 13:12:51 +01:00
Marek Behún
a4ced7b3a4 arm: mvebu: turris_mox: enable wdt command in defconfig
Enable wdt command in defconfig for Turris MOX. This is useful when
doing debugging.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 13:12:51 +01:00
Pali Rohár
279b573657 arm64: a37xx: pci: Fix printing debug messages
Value pcie->dev in function pcie_advk_probe() is not initialized yet
so use dev as argument for dev_dbg()/dev_warn().

Function pcie_advk_wait_pio() itself prints error message on failure
so do not print duplicate error message in caller.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 13:12:51 +01:00
Pali Rohár
aea2f72105 serial: a3720: Implement pending method for output direction
To check if some output characters are waiting either in Transmitter
Holding Register or Transmitter Shift Register we need to look at
TX_EMPTY bit of UART Status Register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 13:12:51 +01:00
Heinrich Schuchardt
25be4d336f doc: exception command
Create man-page for exception command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-27 12:52:57 +01:00
Heinrich Schuchardt
98f01cf7a2 doc: update Kernel documentation build system
Update the documentation build system according to Linux v5.11-rc1.

Deactive the automarkup.py extension module which on Gitlab CI is
incompatible with Unicode.

With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-27 12:52:57 +01:00
Heinrich Schuchardt
836049d63e .gitlab-ci: install doc/sphinx/requirements.txt
Install all requirements according to doc/sphinx/requirements.txt in the
virtual environment used for testing 'make htmldocs'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-27 12:52:57 +01:00
Heinrich Schuchardt
a6aaeb2a91 doc: fix doc/develop/logging.rst
Sphinx 3 builds fail due to doc/develop/logging.rst producing duplicate
labels.

Include logging.h only once in the API section and use cross-references for
the enums log_level_t and log_category_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-27 12:52:57 +01:00
Heinrich Schuchardt
c7d2b2ccd3 doc: board: fix Microchip MPFS Icicle Kit doc
Two sibling headings (here eMMC) cannot have the same title.

Warning, treated as error:
doc/board/microchip/mpfs_icicle.rst:423:duplicate label
board/microchip/mpfs_icicle:emmc, other instance in
doc/board/microchip/mpfs_icicle.rst
make[1]: *** [doc/Makefile:69: htmldocs] Error 2

* Correct the heading levels.
* Add missing empty lines after headings.

Fixes: 9e550e1830 ("doc: board: Add Microchip MPFS Icicle Kit doc")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-27 12:52:57 +01:00
Phil Sutter
ba8ae03eab pci: pci_mvebu: Define an IO region as well
Configure an IO region and window for PNP identical to how MEM region is
set up. Linux does this only if the DT defines a pcie-io-aperture
property for the SOC, but since all supported boards do this should not
be needed.

Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 07:29:43 +01:00
Phil Sutter
c1b1263b16 pci: Make auto-config code a little more robust
On my DS414, some PCI devices return odd values when probing BAR sizes.
An obvious case is all-ones response, the Linux driver
(drivers/pci/probe.c) catches those explicitly and a comment explains
that either bit 0 or bit 1 must be clear (depending on MEM or IO type).
Other BARs return e.g. 0xfff0000f or 0xfff00004 and thus manage to break
size calculation due to the "middle" zeroes. Mitigate that copying more
or less what Linux does and do a "find least bit set".

Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 07:29:43 +01:00
Phil Sutter
7d3c6c6e9f arm: mvebu: ds414: Config header mini-review
A few minor changes:

* Get rid of leftover comments, other commits removed the defines they
  referred to.

* CONFIG_SYS_NETA_INTERFACE_TYPE is not used anymore since commit
  e3b9c98a23 ("net: mvneta: Convert to driver model").

* Drop CONFIG_USB_MAX_CONTROLLER_COUNT: it is per-HCI type, so XHCI and
  EHCI could still both work be used.

* Unconditionally define CONFIG_EHCI_IS_TDI: it has no effect on XHCI so
  that conditional doesn't make any sense.

* Define a larger PHY_ANEG_TIMEOUT: In my test bed, the NIC is directly
  connected to some RTL8111 and the default 8s timeout was often too
  short.

Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 07:29:43 +01:00
Pali Rohár
9d716339fb arm: mvebu: Espressobin: Disable slot when emmc is not present
This change extends previous commit 061c6d1b23 ("arm: mvebu: Espressobin:
Detect presence of emmc at runtime") and when emmc is not present then emmc
is removed from U-Boot DM and corresponding slot is disabled. Therefore on
Espressobin board without soldered emmc, state of emmc hw should be same as
if emmc was disabled in DTS.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 07:29:43 +01:00
Dennis Gilmore
9c690314db ARM: mvebu: ClearFog make sure that SATA and UART images are buildable
SATA and UART ClearFog imaages are not buildable as ENV_SECT_SIZE is not defined
set values for both possible targets

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2021-01-27 07:25:39 +01:00
Dennis Gilmore
827bed4456 ARM: mvebu: helios4 dts changes to enable SPI
Move all aliases defintions into the main dts file
Add u-boot definiton to i2c0 based on clearfog
set spi1 status to okay

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2021-01-27 07:25:39 +01:00
Dennis Gilmore
5a3db5d1af ARM: mvebu: helios4 adjust env sizes to enable SPI to work
mirror the clearfog setup to enable SPI to work

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2021-01-27 07:25:39 +01:00
Harm Berntsen
98b64fe70b gpio: Add support for DM GPIO for Kirkwood
The Armada driver also works on Nedap's custom Kirkwood board with a
Marvell 88F6180 CPU. The original commit of that driver,
commit 704d9a645e ("gpio: Add DM GPIO driver for Marvell MVEBU"),
also mentions that this driver would be suitable for Kirkwood. This
does not completely replace the Kirkwood specific driver as there
are still boards depending on that driver.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Stefan Roese <sr@denx.de>,
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 07:25:39 +01:00
Dennis Gilmore
74f8977ee9 ARM: Distro boot: document the need for fdtfile variable to be set
When testing builds provided in https://github.com/openwrt/openwrt/pull/3360
I discovered that fdtfile was not set and as a result the firmware was not
functional. So I am documenting what is needed.

Signed-off-by: Dennis Gilmore <dennis@ausil.us>

Cc: Atish Patra <atish.patra@wdc.com>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Karsten Merker <merker@debian.org>
2021-01-27 07:25:39 +01:00
Tom Rini
e262b2973e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- New Allwinner H616 SoC support (sans Ethernet & USB)
- H6 DT update
- Tanix TX6 TV box support
- OrangePi 3 support
- OrangePi Zero2 (H616) support
2021-01-25 19:46:02 -05:00
Jernej Skrabec
38be6b8387 sunxi: Add support for OrangePi Zero2
OrangePi Zero2 is SBC based on Allwinner H616 with 1 GiB of RAM, SD card
support, gigabit ethernet, micro HDMI, WIFI, Bluetooth and 1 USB 2.0
port. It also has two GPIO headers which allows further peripherals to
be used.

The devicetree file is taken from v3 of the OrangePi Zero2 Linux
submission [1], which it's not yet merged.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632084.html

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
1dc70ffa1c clk: sunxi: Add support for H616 clocks
This commit introduces DM H616 clock driver.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
7836ccf673 sunxi: gpio: introduce compatible for H616
H616 pinctrl is no different configuration wise than others, so just add
compatible for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
80b2c65bc2 arm: sunxi: add initial H616 DTSI and headers
This commit introduces H616 DTSI file and dt-bindings headers needed for
device tree files.

Files are taken from v3 Linux H616 support submission[1], as the
H616 .dtsi file is not merged upstream yet.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
3d594efdd0 sunxi: Add H616 FEL support
H616 uses different address for reset. Add it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
8ec293e063 sunxi: Add support for H616 SoC
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Andre Przywara
0237b3047e mmc: sunxi: Refactor mod clock register offset
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.

To avoid becoming trapped with some compatible fallback strings, let's
remove the whole struct sunxi_mmc_variant, and replace this with a SoC
based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols.

This will later simplify H616 support.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
f4317dbd06 sunxi: Add H616 DRAM support
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.

Controller and MBUS are very similar to H6 but PHY is completely
unknown.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
d0b07c15c2 sunxi: add support for R_I2C on H616
This port is needed for communication with PMIC. SPL uses it to set DRAM
voltage on H616 boards.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
c13d98b77e sunxi: add support for H616 uart0
This port is used for debug terminal on all known H616 boards.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
b18bd53d6c sunxi: introduce support for H616 clocks
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Andre Przywara
c0b417b2f1 sunxi: support loading with SPL > 32KB
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
driver and need for PMIC configuration, which pulls several drivers which
are not needed otherwise.

spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with
that, reported in SPL header. If size in header is bigger, it will use
that value instead.

In the process of function rework, also add missing function argument.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
57e7623776 sunxi: Add support for I2C on H6 like SoCs
I2C support, especially R_I2C port, will be needed in future. Upcoming
support for H616 will need R_I2C to adjust DRAM voltage.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
807d94258c sunxi: prcm: Add memory map for H6 like SoCs
There was no need to have prcm definitions for H6 and similar SoCs till
now. However, support R_I2C will be needed soon in SPL.

Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h.
One of those files will be selected in common prcm.h based on defined
macros.

This commit doesn't do any functional change.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
b296800203 i2c: mvtwsi: sunxi: update macro
While currently none of the newer Allwinner SoCs currently has I2C
support implemented in U-Boot, this will change soon. mvtwsi driver is
good as it is for them except one macro. Update it to be ready once I2C
support lands for those SoCs.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
aaebb900c6 mmc: sunxi: Replace H6 ifdefs with H6 gen macro
It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
44726096cf sunxi: Introduce common symbol for H6 like SoCs
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
fbd37d8d28 sunxi: Add support for AXP305 PMIC
This PMIC can be found on H616 boards and it's very similar to AXP805
and AXP806.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Andre Przywara
e9ad1b8dc5 sunxi: Properly check for SATAPWR and MACPWR
The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as
string Kconfig symbols are always "defined" from the preprocessor's
perspective. This lead to unnecessary calls to the GPIO routines, but
also always added a half a second delay to wait for a SATA disk to power
up. Many thanks to Peter for pointing this out!

Fix this by properly comparing the Kconfig symbols against the empty
string. strcmp() would be nicer for this, but GCC does not optimise this
away, probably due to our standalone compiler switches.

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi WinPlus
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-25 21:52:00 +00:00
Andre Heider
c81877a919 sunxi: Add support for Orange Pi 3
dts file is taken from Linux 5.11-rc1 tag.

The Bluetooth controller of this device ships with a default address,
use the new CONFIG_FIXUP_BDADDR option to fix it up.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[Updated OrangePi 3 DT, rebase and config update]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
a54b2925a6 sunxi: Add support for Tanix TX6
This commit adds support for Tanix TX6 TV box, based on H6. It's low end
H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
peripherals.

DT file is taken from Linux 5.11-rc1 release.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
750cabc87b ARM: dts: sunxi: h6: Update DT files
Updated H6 DT files are based on Linux 5.11-rc1 release.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Andre Przywara
219a5d5a97 net: sun8i-emac: Allow all RGMII PHY modes
So far all GBit users of the sun8i-emac driver were using the "rgmii"
PHY mode, even though this turns out to be wrong. It just worked because
the PHY driver doesn't do the proper setup (yet).
In fact for most boards the "rgmii-id" or "rgmii-txid" PHY modes are the
correct ones.

To allow the DTs to describe the phy-mode correctly, and to stay
compatible with Linux, at least allow those other RGMII modes in the
driver.

This avoids breakage if mainline DTs will be synced with U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 21:52:00 +00:00
Tom Rini
c99be953e7 Merge tag 'mips-pull-2021-01-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- MIPS: add support for Mediatek MT7620 SoCs
2021-01-25 14:38:40 -05:00
Tom Rini
4057b98ff2 Merge tag 'u-boot-imx-20210125' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Changes for 2020.04
-------------------

- new board:
	Phytec phyCORE-i.MX8MP
	i.MX8MN Beacon EmbeddedWorks devkit

- Fixes:
	several nanbcb fixes
	fix for imx8mm_beacon
- further switch to distro boot commands
- DM:
	DM Ether for MX6UL

CI:

https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
2021-01-25 09:02:35 -05:00
Tom Rini
7f10b8eed4 Merge tag 'doc-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for documentation tag doc-2021-04-rc1 (2)

* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
2021-01-25 09:02:06 -05:00
Tom Rini
aee5bcce35 Merge tag 'u-boot-atmel-2021.04-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel features for 2021.04 cycle

This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
2021-01-25 09:01:28 -05:00
Heinrich Schuchardt
5b6dac01e6 doc: describe command conitrace
Provide a man-page for the conitrace command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
bce86e075f doc: describe the false command
Provide a man-page for the false command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
a03185a3ec dm: core: describe uclass_root_s
'make htmldocs' creates a warning:

./include/asm-generic/global_data.h:443:
warning: Function parameter or member 'uclass_root_s'
not described in 'global_data'

Correct the member descriptions.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
9d4445bc6d doc: document true command
Create a man-page for the true command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
a3ad3079c0 doc: describe loady command
Create a man-page for the loady command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
b911208f41 cmd: correct long text loadb, loadx, loady
The first argument is the load address and not an offset.

The second argument cannot be entered without the first one.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
750ff62da7 doc: document echo command
Provide a man-page for the echo command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
c0445c18d3 test: unit test for echo command
Provide a unit test for the unit command

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
d018734c0c cmd: change suppress newline in echo command
By default the echo command emits its arguments followed by a line feed.

If any of the arguments contains the sub-string "\c", the line feed is
suppressed.

This does not match shells used in Linux and BSD where the first argument
has to be -n to suppress the line feed.

The hush shell interferes with the parsing of backslashes. E.g. in the
following command line quadruple backslashes are required for suppressing
the line feed:

for i in 1 2 3; do for j in 4 5; do echo \\\\c ${i}${j}; done; echo; done;

To avoid unexpected behavior the patch changes echo to use -n as first
argument to suppress the line feed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
de702493c4 doc: document for statement
Create a man-page for the for statement.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
627b57bde0 doc: describe exit command
Man-page for exit shell command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
9c6d050966 doc: document sbi command
Add a man-page for the sbi command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:33 +01:00
Weijie Gao
9f03585e8d MAINTAINERS: add maintainer for MediaTek MIPS platform
Update maintainer for MediaTek MIPS platform

Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
8d6465ba53 reset: reset-mtmips: add DM_FLAG_PRE_RELOC flag
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
e58e68d93e mmc: mtk-sd: assign plat->cfg.f_max with a correct value
Currently this driver does not set the value of plat->cfg.f_max, which
results in that MMC framework will always run at the lowest frequency.

This patch sets plat->cfg.f_max to the maximum allowed frequency, which
equals to the source clock frequency.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
2a505cd1c7 mmc: mtk-sd: add pad control settings for MediaTek MT7620/MT76x8 SoCs
The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.

This patch adds default pad control settings for mt7620_compat.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
f875a12578 mmc: mtk-sd: fix sclk cycles shift value
It turns out that the sclk cycles used by mt7620/mt7628 is the same as
other chips (20 bits, 1048576), not 65536.

This patch removes sclk_cycle_shift from dev_comp, and uses a macro with
a value 20 instead.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
17ade70b6a net: add ethernet driver for MediaTek MT7620 SoC
This patch adds  ethernet driver for MediaTek MT7620 SoC.

The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).

The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.

This driver supports MT7530 giga switch connects to port 5.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
b4f214f044 phy: add USB PHY driver for MediaTek MT7620 SoC
This patch adds USB PHY driver for MediaTek MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
2db6fba051 spi: add spi controller support for MediaTek MT7620 SoC
This patch adds spi controller support for MediaTek MT7620 SoC.

The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
ca610ddf97 gpio: add GPIO controller driver for MediaTek MT7620 SoC
This patch adds GPIO controller driver for MediaTek MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
bba4ec81fd watchdog: add watchdog driver for MediaTek MT7620 SoC
This patch adds watchdog support for the Mediatek MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
a9a3a3aafc pinctrl: mtmips: add support for MediaTek MT7620 SoC
This patch adds pinctrl support for MediaTek MT7620 SoC.
The MT7620 SoC supports only pinmux.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
4075928c36 reset: mtmips: add reset controller support for MediaTek MT7620 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
d9a5da72d7 clk: add clock driver for MediaTek MT7620 SoC
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
2161f1fcb3 serial: add uart driver for MediaTek MT7620 SoC
This patch adds uart support for MediaTek MT7620 and earlier SoCs.

The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).

The driver supports of-platdata which is useful for tiny SPL.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
803c8ad204 configs: mtmips: refresh for mt7628 based boards
Since mt7620 is added into Kconfig, the CONFIG_SOC_MT7628=y which is
omitted by default must be added back, otherwise make xxx_defconfig for
these boards will be configured for mt7620 platform.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
76880b08c4 mips: mtmips: add two reference boards for mt7620
The mt7620_rfb board supports integrated 10/100M PHYs plus two external
giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB.

The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a
16MB SPI-NOR flash.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
dd4fdc0b14 mips: mtmips: add support for MediaTek MT7620 SoC
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
f0a865bd55 mips: mtmips: add support to initialize SDRAM
This patch adds support for mtmips SoCs to initialize the SDRAM.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
50d34f0eaa mips: enable _machine_restart for spl
The sysreset driver has a config CONFIG_SPL_SYSRESET for the spl stage.
Change CONFIG_SYSRESET to CONFIG_IS_ENABLED(SYSRESET) will give spl a
chance to use _machine_restart instead of the sysreset driver.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
9bf72ba6f6 mips: mtmips: fix dram size detection in dram_init
CONFIG_SYS_SDRAM_BASE points to cached memory, i.e. KSEG0, which is not
suitable for detecting memory size.

Replace CONFIG_SYS_SDRAM_BASE with KSEG1, and make dram_init() always do
memory size detection in any stage.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
7fcc740ffe mips: mtmips: select SYSRESET for mt7628 only
Currently only mt7628 needs the sysreset driver, do not select it for
mt7620.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
451abbbedd mips: mtmips: move mt7628 related Kconfig into mt7628 subdirectory
This patch is a preparation for add a new soc fot mtmips.

Move all mt7628 related Kconfig (boards and UART selection) into mt7628
subdirectory and make sure the top directory of mtmips contains only
selection for SoCs.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
da41a56059 mips: dts: switch to board defines for dtb for mtmips
Previous the dts files for gardena-smart-gateway-mt7688 and
linkit-smart-7688 are set to be built when mtmips is selected.

This can lead to a compilation error if another soc is added to this arch
with different dtsi files.

So it's better to build the dtb only if their board is selected.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Tom Rini
69d29fe1c0 Merge tag 'efi-2021-04-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc1-3

Bug fixes for UEFI sub-system:

* correct value of  EFI_BLOCK_IO_PROTOCOL.Media.LastBlock
* correct GUID when closing of EFI_LOAD_FILE_PROTOCOL
* error handling in mkeficapsule tool

Bug fixes for FAT file system:

* consistent error handling for flush dir()
2021-01-23 19:07:00 -05:00
Tom Rini
e716c90229 Revert "doc: update Kernel documentation build system"
Unfortunately we now see a number of now-fatal warnings about duplicate
labels.  It is often unclear how best to re-write the document in
question to not duplicate these otherwise logical headings.

This reverts commit 10a1df3cd4.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-23 12:51:37 -05:00
Tom Rini
757cec3a03 Merge branch '2021-01-22-tool-updates'
- Assorted updates to the tools/ code
2021-01-23 09:55:35 -05:00
Tom Rini
b577bc1c5f Merge branch '2021-01-22-doc-updates'
- Assorted documentation updates
2021-01-23 09:54:02 -05:00
Heinrich Schuchardt
12316967ad doc: move README.menu to HTML documentation
Convert README.menu to reStructured text and add it to the HTML
documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 09:53:46 -05:00
Heinrich Schuchardt
0157619d5c doc: move test/py/README.md to HTML documentation
Convert test/py/README.md to restructured text and add it to the generated
HTML documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-23 09:53:46 -05:00
Heinrich Schuchardt
ca6583d4e0 doc: move test/README to HTML documentation
Move test/README to the 'Develop U-Boot' chapter of the HTML documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-23 09:53:46 -05:00
Heinrich Schuchardt
948991f764 doc: structure doc/develop/index.rst
Provide sub-chapters for 'Develop U-Boot'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-23 09:53:46 -05:00
Patrick Delaunay
9153924bc1 doc: update help message
Update the help message used for 'make help':

  Documentation targets:
    Linux kernel internal documentation in different formats from ReST:
=>
    U-Boot documentation in different formats from ReST:

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-01-23 09:53:46 -05:00
Heinrich Schuchardt
10a1df3cd4 doc: update Kernel documentation build system
Update the docomentation build system according to Linux v5.11-rc1.

With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Fix warning in b4860qds.rst about "Switch Settings"]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-23 09:53:17 -05:00
Marek Vasut
4f37aa9579 ARM: imx: add i.MX8MN lpddr4 image cfg file
Add cfg file for i.MX8MN LPDDR4

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-01-23 14:01:59 +01:00
Adam Ford
8e95883e46 imx: Add support for i.MX8MN Beacon EmbeddedWorks devkit.
Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M
Nano SoC consisting of baseboard + SOM.

The kit is based on the same design as the Beacon dev kit with
the i.MX8M Mini.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 14:01:49 +01:00
Marc Ferland
5df34feb24 arm: dart6ul: fix ddr size macro
The previous macro was off by one bit and so we were getting a ddr
size which was twice the real size. This commit refactors the macro so
it returns the right size in _bytes_ and modifies the printf call so the
size is still printed in MiB.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
2021-01-23 13:47:50 +01:00
Marek Vasut
38b92ca196 spi: imx: Use clock framework if enabled
In case the clock framework is enabled, enable the SPI controller clock
and obtain max frequency from the clock framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-01-23 13:40:29 +01:00
Marek Vasut
6cd4f48b64 spi: imx: Define register bits in the driver
The CSPI/ECSPI register bits do not differ between newer SoCs, instead
of having multiple copies of the same thing for each iMX SoC, define
the bits in the driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-01-23 13:40:29 +01:00
Marek Vasut
85b1c11989 clk: imx: Add ECSPI to iMX8MN
Add ECSPI clock entries to iMX8MN clock driver. Only make those entries
available in case SPI support in U-Boot is enabled at all to conserve
space, esp. in SPL.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 13:40:29 +01:00
Adam Ford
3796ab8fac arm64: dts: imx8mm-beacon: Resync imx8mm-beacon-som with 5.11-rc4
In order to support the QSPI chip on the SOM, the Flexspi bus
needs to be configured to talk with the SPI chip.
Resync the som device tree with 5.11-rc4

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 13:40:29 +01:00
Adam Ford
415bb8654d imx8mm_beacon: Enable QSPI Support
There is a QSPI chip connected to the FSPI.  Enable the defconfig
to support it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 13:40:29 +01:00
Adam Ford
5fb6b82471 spi: nxp_fspi: Enable support for nxp,imx8mm-fspi
The i.MX8M Mini can use the FlexSPI driver.  Add support
for it to the driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-01-23 13:40:29 +01:00
Heiko Schocher
50125bd5e6 mmc: fsl_esdhc_imx.c: fix compiler warning
prevent unsued variable compiler warning if
DM_REGULATOR is not set.

Signed-off-by: Heiko Schocher <hs@denx.de>
2021-01-23 13:40:29 +01:00
Alice Guo
5b3c76e888 imx8mq: configs: add support for distro boot commands
Supported boot device types in iMX8MQ: MMC, DHCP.

CONFIG_DISTRO_DEFAULTS is added for enabling the DISTRO_DEFAULTS option.

CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mq_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.

scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.

kernel_addr_r is the location in RAM where the kernel will be loaded to.

Delete unnecessary environment variables because "run distro_bootcmd" is
set to be the default boot mode.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 13:40:29 +01:00
Marek Vasut
0004027cd4 ARM: imx6: dh-imx6: Move bootcounter to SNVS_LPGDR
Move the bootcounter to SVNS_LPGDR to free up OCRAM for usage by the VPU.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2021-01-23 13:40:29 +01:00
Teresa Remmet
c661c511e9 board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support
Add initial support PHYTEC phyCORE-i.MX8MP SOM.

    Supported features:
     - 2GB LPDDR4 RAM
     - eMMC
     - external SD
     - debug UART2
     - watchdog

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-23 11:30:32 +01:00
Martin Fuzzey
3f832699ff w1: mxc: fix build
Now that header files no longer include common.h it must be included
first.

Otherwise the build fails with errors like
	include/asm/arch/clock.h:43:1: error: unknown type name 'u32'
	 u32 imx_get_uartclk(void);

Fixes: c3dc39a2f8 ("arm: Don't include common.h in header files")

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-23 11:30:31 +01:00
Marc Ferland
9452d58e10 arm: dart6ul: enable DM_ETH for the dart6ul
This patch converts the dart6ul ethernet support to DM_ETH and cleans
up the legacy ethernet code. The clean up, more specifically:

* moves the fec2 node and pin definition to the carrier board DTS
  since the phy associated with it is on the carrier board and not on
  the SoM;
* add the reset pin associated to each phy;
* separate the ethernet, mdio and reset pins of each fec so that they
  are easier to reference;
* add clock properties to the phy nodes since they are connected to the
  50Mhz ENET[12]_TX_CLK clock of the SoC;
* remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
2021-01-23 11:30:31 +01:00
Adam Ford
4736871dc2 imx: imx8mm-beacon: Remove relocation restrictions
The system is capable of relocating RAM disks and the kernel.
Remove these restrictions to prevent it.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-01-23 11:30:31 +01:00
Adam Ford
018f7eaf4d imx8mm_beacon: Enable fixed regulator in SPL
Because SPL can support SD UHS, the fixed regulator needs to be
enabled in SPL to reset the SD card.

Fixes: 1a5d9c84b4 ("imx8mm_beacon: Enable HS400 on MMC controller")
Signed-off-by: Adam Ford <aford173@gmail.com>
2021-01-23 11:30:31 +01:00
Sean Anderson
e9624f304d mx6ul(l)evk: Enable DM_ETH_PHY
This fixes eth0 not initializing properly. Both eth0 and eth1 use the
MDIO interface on eth1 to access their PHYs. However, without
DM_ETH_PHY, eth0 still tries to use its own MDIO interface to access its
phy. Before this patch, a boot log might contain lines like

Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Could not get PHY for FEC0: addr 2

After this patch they now look like

Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Get shared mii bus on ethernet@2188000

Warning: ethernet@2188000 using MAC address from ROM
, eth0: ethernet@2188000

As an alternative to DM_ETH_PHY, FEC_MXC_SHARE_MDIO could also have been
used to achieve the same effect.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-01-23 11:30:31 +01:00
Alice Guo
10a394ba68 board: imx8mp: add boot.cmd for distro boot on iMX8MP
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg

The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Alice Guo
9b162b1d1f imx8mp: configs: add support for distro boot commands
Supported boot device types in iMX8MP: MMC.

CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.

scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution. kernel_addr_r is the location in RAM where
the kernel will be loaded to. Delete unnecessary environment variables
because "run distro_bootcmd" is set to be the default boot mode.

On the iMX8MP platform I used, "mmc1" represents SD card and "mmc2"
represents eMMC.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Alice Guo
9b8656bd2b board: imx8mm: add boot.cmd for distro boot on iMX8MM
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg

The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value "
/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Alice Guo
2df8930bf9 imx8mm: configs: add support for distro boot commands
Supported boot device types in iMX8MM: MMC, DHCP.

CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.

CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mm_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.

scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.

kernel_addr_r is the location in RAM where the kernel will be loaded to.

Delete unnecessary environment variables.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
8cd2017981 imx: timer: Modify GPT timer driver for mx7
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.

Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
d4e84f24a6 imx8m: add QSPI boot dev
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
acc403cb2c imx6: Remove AHCI device before boot OS
Since we remove SATA device before boot OS, when AHCI is enabled, update
the codes to remove AHCI device.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
79e0217a8e imx: Fix market segment fuse offset on iMX8MP
iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5],
correct it in imx common codes.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Han Xu
42a49754e2 nandbcb: nand support for i.MX8MP
Add NAND boot support for i.MX8MP by adding i.MX8MP in nandbcb support
list, reading boot_search_count from fuse.

i.MX8MN NAND boot is same as i.MX8MP, fix some issues as well.

Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
233b0b070e imx: nandbcb: Fix potential overflow in nandbcb_set_boot_config
Fix Coverity Issue 9006656. In nandbcb_set_boot_config, an integer overflow
occurs, with the result converted to a wider integer type.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
983f5e0391 imx: nandbcb: Fix potential overflow in fill_dbbt_data
Fix Coverity Issue 9006658. In fill_dbbt_data, an integer overflow occurs,
with the result converted to a wider integer type

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
f637c40dd7 imx: nandbcb: Fix resource leak in read_fcb
Fix Coverity Issue 9006657. In read_fcb, leak of memory to system
resource "fcb_raw_page". Adjust the sequence to check the mtd bad
block prior than allocation of "fcb_raw_page", also check the NULL
return of allocation.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
fc11dc112d imx: nandbcb: Fix resource leak
Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource
"fcb_raw_page". Since we have initialized the "ret" to 0, should return
the value of ret.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
9dd599a7a4 nandbcb: Fix uninitialized variable
Fix Coverity Issue 9006654. In write_fcb, use of an uninitialized
variable "ret".

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
f89eb9be09 imx: imx8mn/p: drop CONFIG_SYS_[I,D]CACHE_OFF
Drop CONFIG_SYS_[I,D]CACHE_OFF, it is safe to run with caches enabled on
these platforms.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
4557f43a10 imx8m: lowlevel_init: tune alignment
The minimum alignment is 16 bytes, so use align 4 is enough.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
54bd9ddf21 arm: dts: imx8mq: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
8d3e37ceb8 arm: dts: imx8mm: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
cf8842bc29 arm: dts: imx8mp: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
374866a724 imx8m: clock: add type of set_clk_eqos
Add type of set_clk_eqos to make it could be used by other files.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
50d0953127 arm: dts: imx8mn: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
6489dac3ab imx: imx8mn_evk: correct stack/malloc adress
Move SP to end of OCRAM space. Drop MALLOC_F to make it alloc from
stack space.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Ye Li
7c4f9b3755 imx: ddr: imx8m: Move selfref_en after DDR scrub
When doing DDR scrub, the DDR may enter into self refresh if the
selfref_en is enabled before DDR scrub. This will cause scrub
can't complete that SBRSTAT.scrub_done won't be set.

Since the selfref_en can be programmed during the course of
normal operation, move it after DDR scrub

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
846b77e7df imx: imx8mn_ddr4_evk: Use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board
use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use
CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
48b90f86c5 imx: imx8mp_evk: enable eth support
Add board code to configure the network interface
Add net defconfig

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Heinrich Schuchardt
8d0949b3ed efi_loader: correct EFI_BLOCK_IO_PROTOCOL.Media.LastBlock
The field Media.LastBlock of the EFI_BLOCK_IO_PROTOCOL.Media was filled
incorrectly both for block devices as well as for partitions.

The field must be filled with the index of the last logical block (LBA):

* block devices: device size minus 1
* partitions: partition size minus 1

Reported-by: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:54 +01:00
Heinrich Schuchardt
2cfb68fd83 efi_loader: notification with TPL_APPLICATION not allowed
The UEFI specification requires event notification levels to be
> TPL_APPLICATION and <= TPL_HIGH_LEVEL.

With the patch the CreateEvent() and CreatedEventEx() services are changed
to check that the notification level is not TPL_APPLICATION.

Reference:
UEFI Specification 2.8 Errata B, table 27 "TPL Restrictions",
"Event Notification Levels"

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:54 +01:00
Sughosh Ganu
d33f31816f mkeficapsule: Miscellaneous fixes in the utility
Miscellaneous fixes in the mkeficapsule utility -- these include a few
resource leak issues flagged by Coverity along with some additional
code improvements suggested by Heinrich during code review.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2021-01-23 07:56:54 +01:00
AKASHI Takahiro
f7cd8b7b55 tools: mkeficapsule: fill reserved members of structure
Fill reserved members of efi_firmware_management_capsule_image_header
structure with zero's for safety.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: CID 316354
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
AKASHI Takahiro
8f1844c333 efi_loader: capsule: fix SIZEOF_MISMATCH warning
CID 316361 says:
> Passing argument "count * 8UL /* sizeof (*files) */" to
> function "dlmalloc" and then casting the return value to "u16 **" is
> suspicious. In this particular case "sizeof (u16 **)" happens to be equal
> to "sizeof (u16 *)", but this is not a portable assumption.
> > 767         tmp_files = malloc(count * sizeof(*files));

The change in this patch fixes the ambiguity.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: CID 316361
For readability use *tmp_files instead of tmp_files[0]
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
AKASHI Takahiro
30f8222bb0 cmd: efidebug: always check return code from get_variable()
CID 316364 says:
> Null pointer dereferences  (FORWARD_NULL)
>	printf("Result total size: 0x%x\n", result->variable_total_size);
at do_efi_capsule_res().

The code is basically safe because a buffer for "result" is allocated
by malloc() and filled up by the second get_variable(), which fails any way
if the allocation has failed.

But the first (and second) get_variable() possibly returns an error other
than EFI_SUCCESS. We always need to check the return code from
get_variable() before accessing the data in "result".

While this change won't suppress CID 316364, the resulting code is much
safer.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
Heinrich Schuchardt
6e8c28cf52 efi_loader: fix efi_load_image_from_path()
Use the correct GUID when closing the file load protocol.
Remove an unnecessary check (Coverity CID 316363).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
Heinrich Schuchardt
041f0af366 fs: fat: structure for name and extension
The short name and extension of FAT files are stored in adjacent fields of
the directory entry. For some operations like calculating a checksum or
copying both fields it is preferable to treat both as one structure.

Change the definition of the directory entry structure to include a
structure comprising the name and the extension field.

This resolves Coverity CID 316357, CID 316350, CID 316348.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
Heinrich Schuchardt
e97eb638de fs: fat: consistent error handling for flush_dir()
Provide function description for flush_dir().
Move all error messages for flush_dir() from the callers to the function.
Move mapping of errors to -EIO to the function.
Always check return value of flush_dir() (Coverity CID 316362).

In fat_unlink() return -EIO if flush_dirty_fat_buffer() fails.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
Martin Hundebøll
09779488a9 tools: env: return error if ubi_update_start() fails
The UBI_IOCVOLUP ioctl can fail if exclusive access to the volume isn't
obtained. If this happens, the flush operation doesn't return error,
leaving the caller without knowledge of missing flush.

Fix this by forwarding the error (-1) from ubi_update_start().

Fixes: 34255b92e6 ("tools: env: Add support for direct read/write UBI volumes")
Signed-off-by: Martin Hundebøll <martin@geanix.com>
2021-01-22 16:58:55 -05:00
Joel Stanley
603e26f763 mkimage: Move padding commands outside of FIT_SIGNATURE
These commands were disabled when CONFIG_FIT_SIGNATURE is disabled, but
they do not depend on crypto support so they can be unconditionally
enabled.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-01-22 16:17:53 -05:00
Joel Stanley
93af80f3e8 image-fit: Fix FIT_CIPHER linking
When CONFIG_FIT_CIPHER=y and CONFIG_FIT_SIGNATURE=n is there is no
implementation of image_get_host_blob for mkimage/dumpimage:

 /usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
 image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'

Move the implementation to a common file so it can be shaed between
image-cipher.c and image-fit-sig.c.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-01-22 16:17:52 -05:00
Joel Stanley
5d40d5f12e tools/Makefile: FIT_CIPHER requires libssl
If CONFIG_FIT_CIPHER is enabled without CONFIG_FIT_SIGNATURE then
mkimage/dumpimage will fail to link:

 /usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
 image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'
 /usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x10): undefined reference to `EVP_aes_128_cbc'
 /usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x40): undefined reference to `EVP_aes_192_cbc'
 /usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x70): undefined reference to `EVP_aes_256_cbc'
 /usr/bin/ld: tools/lib/aes/aes-encrypt.o: in function `image_aes_encrypt':
 aes-encrypt.c:(.text+0x22): undefined reference to `EVP_CIPHER_CTX_new'
 /usr/bin/ld: aes-encrypt.c:(.text+0x6f): undefined reference to `EVP_EncryptInit_ex'
 /usr/bin/ld: aes-encrypt.c:(.text+0x8d): undefined reference to `EVP_EncryptUpdate'
 /usr/bin/ld: aes-encrypt.c:(.text+0xac): undefined reference to `EVP_CIPHER_CTX_free'
 /usr/bin/ld: aes-encrypt.c:(.text+0xf2): undefined reference to `EVP_EncryptFinal_ex'
 collect2: error: ld returned 1 exit status

Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-01-22 16:17:52 -05:00
Philippe Reynes
edfeba7538 tools: image-host: add support for several sub-images
The propoerty sign-images points to images in the configuration
node. But thoses images may references severals "sub-images" (for
example for images loadable). This commit adds the support of
severals sub-images.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2021-01-22 16:17:52 -05:00
Philippe Reynes
5a4116f1a2 tools: image-host: clean function fit_config_get_hash_list
This commit creates a function fit_config_add_hash that will be
used in the next commit to support several 'sub-images'.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-22 16:17:52 -05:00
Alexandru Gagniuc
4afc4f37c7 doc: FIT image: Clarify format and simplify syntax
** Introduction

There are currently four ways to load an OS image with u-boot
  1. SPL -> u-boot -> bootm
  2. SPL blue falcon mode
  3. "Basic" FIT image (CONFIG_LOAD_FIT)
  4. "Full-featured" FIT image (CONFIG_LOAD_FIT_FULL)

These four code paths were developed independently, and share very
little code. (3) and (4), behave very differently, are littered with
special cases. They even have different DTS syntax and properties.

The cause of this divergence is that the FIT format specification
leaves a number of things open to interpretation. The purpose of this
change is to enable the reduction of code size, duplication, and
complexity by updating and streamlining the FIT format.

We are only marginally concerned with backwards compatibility, because
we don't have inter-compatibility. For example, CONFIG_LOAD_FIT is
able to load images that CONFIG_LOAD_FIT_FULL won't. This is a direct
result of the incompatible syntax between the two implementations.

Ideally, these changes would enable "simple" FIT to be a subset of the
"full" fit implementation, and share most code. These changes should
also eliminate the need for falcon mode (although we are not
advocating for the removal of falcon mode at this time).

** Description of changes

 * The "configurations" node is now mandatory

Guessing how to load components based on their "os" and "type" invites
confusion and superfluous heuristics. Instead, require each FIT image
to be explicit on how components should be loaded.

 * Eliminate "ramdisk", "setup", "standalone", and "fpga" properties

Having too many special purpose properties requires special-casing
FIT loading code. When a special property can be handled by another
property, it is redundant.
 - A "ramdisk" is identical to a loadable. Thus ramdisk images should
   be placed under "loadables".
 - A "setup" node can be achieved by using a "kernel" or "firmware"
   property instead.
 - "standalone" is used for u-boot nodes. The correct property to use
   in this case is "firmware".
 - "fpga" is a loadable

 * Prioritize control between "firmware" and "kernel"

"firmware" and "kernel" are special nodes in that control is passed
to the "entry-point" of the image. Both can be present, for example,
an OP-TEE firmware with a linux kernel. When both are present,
control is passed to the "firmware" image.

** Further generalizations (not included herein)

The "firmware" and "kernel" properties could be generalized as a
"next-boot-stage", or similar name. This "next" stage would be special
in that it is both executable, and is the stage that is passed
control. For example, "next-stage" could be an op-tee image, with
linux as a loadable, or a u-boot image.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-01-22 16:17:33 -05:00
Tom Rini
abd95385e7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsung.git 2021-01-22 16:01:27 -05:00
Greg Gallagher
786f35b619 ARM: at91: spl: add spl_early_init for sama5d2 platforms
The dm root node is needed early in the spl to allow the timer to be
used.  This change calls spl_early_init to initialize the dm root node.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Greg Gallagher
c69ba7b4a0 configs: sama5d27_som1_ek: Set FDT filename based on defconfig
Make the FDT file name based on the default on that is specified in the
defconfig file.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Greg Gallagher
9119800591 board: atmel: Add SAMA5D27 giant board
Giant board is a tiny SBC based on the Adafruit Feather form factor,
created by groboards it contains a SAMA5D2 processor (SAMA5D27),
128 MB of RAM and a microSD card for storage.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
1ae8f0a3b2 net: macb: take into account all RGMII interface types
Take into account all RGMII interface types. Depending on it
the RGMII PHY's timings are setup.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
3d3475c8b7 net: macb: add support for sama7g5 emac
Add support for SAMA7G5 EMAC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
8c0483ecbf net: macb: add support for sama7g5 gmac
Add support for SAMA7G5 GMAC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
96449581b3 net: macb: check clk_set_rate return value to be negative
clk_set_rate() returns the set rate in case of success and a
negative number in case of failure. Consider failure only the
negative numbers.

Fixes: 3ef64444de ("dm: net: macb: Implement link speed change callback")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
bb890f75d5 net: macb: add user io config data structure
Different implementation of USER IO register needs different
mapping for bit fields of this register. Add implementation
for this and, since clken is part of USER IO and it needs to
be activated based on per SoC capabilities, add caps in
macb_config where clken specific information needs to be filled.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Kai Stuhlemmer (ebee Engineering)
3270c47b39 sam9x60.h: Fix Galois Field Table offsets
Because ATMEL_BASE_ROM is defined to 0x100000, it already points
to the begin of the index table for 512 byte sectors correction.
Thus its offset must be zero and the index of the table for 1024
byte sectors must start at offset 0x8000.

Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de>
[ta: update commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
786f888b74 sama5d3: Fix Galois Field Table offsets
Offsets are described in the datasheet at section:
"11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction".

For testing I "injected" bit flips into u-boot NAND memory area,
and then read back. PMECC could not correct the errors. With the
offsets updated everything is fine.

Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
58b1d680d1 configs: at91: Fix wrong definitions for CONFIG_PMECC_CAP
When CONFIG_ATMEL_NAND_HW_PMECC is set, CONFIG_PMECC_CAP defaults
to the value of 2. At the conversion to Kconfig for the PMECC config
values, some boards/defconfigs were wrongly configured.
Update CONFIG_PMECC_CAP to the PMECC_CAP value before the conversion.

Fixes: 49ad40298c ("ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
6f889819f3 configs: at91: Fix the involuntarily disablement of NAND PMECC
SPL_GENERATE_ATMEL_PMECC_HEADER selects:
ATMEL_NAND_HWECC [=y] && ATMEL_NAND_HW_PMECC [=y].

With the removal of SPL_GENERATE_ATMEL_PMECC_HEADER,
ATMEL_NAND_HW_PMECC and ATMEL_NAND_HWECC were no longer
selected. Also, when the SPL_GENERATE_ATMEL_PMECC_HEADER was removed,
the configs were not updated using savedefconfig, thus the
'commit d168bcb6fe ("configs: Resync with savedefconfig")'
further removes the CONFIG_PMECC_CAP value.

Update defconfigs and add CONFIG_ATMEL_NAND_HW_PMECC,
which selects ATMEL_NAND_HWECC, in order to restore NAND PMECC
support. Restore CONFIG_PMECC_CAP value.

Fixes: 57f76c2a47 ("configs: at91: remove SPL_GENERATE_ATMEL_PMECC_HEADER from non-nand configs")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
417eca09bf pinctrl: at91-pio4: implement drive strength support
Implement drive strength support, by preserving the same bindings
as in Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
864a4144ba pinctrl: at91-pio4: convert to dev_read_prop
Use dev_read_prop instead of using the fdt_read_property which
reads from the GD struct's fdt.
This way the node is accessed via the device config instead of the
global struct, which makes code more portable and GD independent.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
63c27c3e66 dt-bindings: pinctrl: at91-pio4: add property for drive strength
Add drive strength property which is equivalent with the one in Linux

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
7cdcf0cb69 dt-bindings: pinctrl: at91-pio4: update license to SPDX style
Update license header to SPDX style

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Tom Rini
184aa65041 Merge tag 'u-boot-rockchip-20210121' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New board: rk3328 NanoPi R2S board;
- Fix init voltage for some rk3399 boards;
- enable rng for rk3399 by default;
- set default to SPI bus 1 for SPI-flash for some board;
- add dwc PCIe controller driver on rockchip platform;
2021-01-21 07:39:47 -05:00
Shawn Lin
9ddc0787bd pci: Add Rockchip dwc based PCIe controller driver
Add Rockchip dwc based PCIe controller driver for rk356x platform.
Driver support Gen3 by operating as a Root complex.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 12:00:45 +08:00
Shawn Lin
6ec62b6ca6 phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY
Add the Rockchip Synopsys based PCIe 3.0 PHY driver as
part of Generic PHY framework.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 12:00:45 +08:00
David Bauer
b821e0db46 rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
This adds support for the NanoPi R2S from FriendlyArm.

Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED

Signed-off-by: David Bauer <mail@david-bauer.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:58:35 +08:00
Peter Robinson
a475bef534 configs: rk3399: enable rng on firefly/rock960/rockpro64
Enable the RNG on the Firefly, rock960 and RockPro64 devices
to enable KASLR on devices that support it.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Akash Gajjar <akash@openedev.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:56:21 +08:00
Peter Robinson
5972c57780 arm: dts: rockchip: rk3399: enable rng at the SoC level
The rng is embedded in the SoC so enable it in the device tree
universally, the use of it can be controlled by enabling/disabling
at the device config level.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:55:59 +08:00
Kever Yang
09b053c970 rockchip: leez-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_log regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-01-21 11:54:24 +08:00
Kever Yang
ec0f08c779 rockchip: firefly-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_log regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-01-21 11:54:24 +08:00
Kever Yang
2a6eb3b8f0 rockchip: evb-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_center regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-01-21 11:54:24 +08:00
Hugh Cole-Baker
a2ca3c6032 rockchip: puma-haikou: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1
pointed to &spi5, use an alias spi5 for this instead.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:53:36 +08:00
Hugh Cole-Baker
acc57ecf05 rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:53:25 +08:00
Tom Rini
83433fdab4 Merge branch '2021-01-20-fs-fixes'
- Minor SquashFS, BTRFS ubifs fixes
2021-01-20 16:45:43 -05:00
Heinrich Schuchardt
81f562719e ubifs: do not decide upon uninitialized variable
Before 'if (err)' we have to initialize the variable otherwise we use a
random value from the stack.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 14:01:45 -05:00
Heinrich Schuchardt
3b00a6bafc fs: btrfs: simplify close_ctree_fs_info()
At the beginning of close_ctree_fs_info() the value 0 is assigned to err
and never changed before testing it.

Let's get rid of the superfluous variable.

Fixes: f06bfcf54d ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-01-20 14:01:45 -05:00
Campbell Suter
9dba07f143 Fix squashfs failing to load sparse files
SquashFS supports sprase blocks in files - that is, if a given block is
composed only of zeros, it's not written to the output file to save
space and it's on-disk length field is set to zero to indicate that.

Previously the squashfs driver did not recognise that, and would attempt
to read and decompress a zero-sized block, which obviously failed.

The following command may be used to create a file for testing:

cat <(dd if=/dev/urandom of=/dev/stdout bs=1M count=1) \
	<(dd if=/dev/zero of=/dev/stdout bs=1M count=1) \
	<(dd if=/dev/urandom of=/dev/stdout bs=1k count=200) >test_file

Signed-off-by: Campbell Suter <campbell@snapit.group>
2021-01-20 14:01:44 -05:00
Qu Wenruo
3b72612ad1 fs: btrfs: volumes: prevent overflow for multiplying
In __btrfs_map_block() we do a int * int and assign it to u64.
This is not safe as the result (int * int) is still evaluated as (int)
thus it can overflow.

Convert one of the multiplier to u64 to prevent such problem.

In real world, this should not cause problem as we have device number
limit thus it won't go beyond 4G for a single stripe.

But it's harder to teach coverity about all these hidden limits, so just
fix the possible overflow.

Reported-by: Coverity CID 312957
Reported-by: Coverity CID 312948
Signed-off-by: Qu Wenruo <wqu@suse.com>
2021-01-20 14:01:08 -05:00
Tom Rini
404bbc809d Merge tag 'efi-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc1-2

* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
  * Boot manager
  * EFI_DT_FIXUP_PROTOCOL
  * EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
  * avoid EFI runtime symbols in global symbol table
2021-01-20 10:49:23 -05:00
Tom Rini
63f2607bc8 Merge tag 'xilinx-for-v2021.04-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.04-v2

env:
- Unlock redundant variable configuration for all

xilinx:
- Enable seps525 by default
- Export bootseq via variable
- Update board_fdt_blob_setup()

mmc:
- Xenon macro removal
2021-01-20 10:49:05 -05:00
Michal Simek
4e3fc5efeb env: Remove all dependencies for SYS_REDUNDAND_ENVIRONMENT
CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot
works with variables. struct environment_s has one byte flags property
which also affects ENV_SIZE macro.

I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup
but custom scripts can be designed in a way that u-boot is asked to
import/export variables from/to file which can be in certain format.
That's why also for this configuration make sense to enable
CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file
format.

The patch is removing dependency on this configuration to support selecting
environment file format without any specific dependency where variables are
stored.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-20 08:34:53 +01:00
Michal Simek
a672b9871b xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
506009fc10 xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
2784befbd7 xilinx: zynqmp: Save bootseq number for SD/EMMC boot modes
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
b2e35a6f12 mmc: xenon_sdhci: Remove duplicated macros
There is no need to define the same macros in drivers.
All macros have been added by commit 17a42abb40 ("mmc: Define timing
macro's").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-20 08:34:53 +01:00
Michal Simek
7f2d57a297 arm64: zynqmp: Enable seps and related video configs
Enable this driver to get build and probe for our platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2021-01-20 08:34:53 +01:00
Ilias Apalodimas
53e54bf50d efi_loader: Avoid emitting efi_var_buf to .GOT
Atish reports that on RISC-V, accessing the EFI variables causes
a kernel panic. An objdump of the file verifies that, since the
global pointer for efi_var_buf ends up in .GOT section which is
not mapped in virtual address space for Linux.

<snip of efi_var_mem_find>

0000000000000084 <efi_var_mem_find>:
  84:   715d                    addi    sp,sp,-80

* objdump -dr
0000000000000086 <.LCFI2>:
  86:   e0a2                    sd  s0,64(sp)
  88:   fc26                    sd  s1,56(sp)
  8a:   e486                    sd  ra,72(sp)
  8c:   f84a                    sd  s2,48(sp)
  8e:   f44e                    sd  s3,40(sp)
  90:   f052                    sd  s4,32(sp)
  92:   ec56                    sd  s5,24(sp)
  94:   00000497            auipc   s1,0x0
            94: R_RISCV_GOT_HI20    efi_var_buf
  98:   0004b483            ld  s1,0(s1) # 94 <.LCFI2+0xe>
            98: R_RISCV_PCREL_LO12_I    .L0
            98: R_RISCV_RELAX   *ABS*

* objdump -t
0000000000000084 g     F .text.efi_runtime  00000000000000b8 efi_var_mem_find

With the patch applied:

* objdump -dr
0000000000000086 <.LCFI2>:
  86:   e0a2                    sd  s0,64(sp)
  88:   fc26                    sd  s1,56(sp)
  8a:   e486                    sd  ra,72(sp)
  8c:   f84a                    sd  s2,48(sp)
  8e:   f44e                    sd  s3,40(sp)
  90:   f052                    sd  s4,32(sp)
  92:   ec56                    sd  s5,24(sp)
  94:   00000497            auipc   s1,0x0
            94: R_RISCV_PCREL_HI20  .LANCHOR0
            94: R_RISCV_RELAX   *ABS*
  98:   00048493            mv  s1,s1
            98: R_RISCV_PCREL_LO12_I    .L0
            98: R_RISCV_RELAX   *ABS*

* objdump -t
0000000000000008 l     O .data.efi_runtime  0000000000000008 efi_var_buf

On arm64 this works, because there's no .GOT entries for this
and everything is converted to relative references.

* objdump -dr (identical pre-post patch, only the new function shows up)
00000000000000b4 <efi_var_mem_find>:
  b4:   aa0003ee    mov x14, x0
  b8:   9000000a    adrp    x10, 0 <efi_var_mem_compare>
            b8: R_AARCH64_ADR_PREL_PG_HI21  .data.efi_runtime
  bc:   91000140    add x0, x10, #0x0
            bc: R_AARCH64_ADD_ABS_LO12_NC   .data.efi_runtime
  c0:   aa0103ed    mov x13, x1
  c4:   79400021    ldrh    w1, [x1]
  c8:   aa0203eb    mov x11, x2
  cc:   f9400400    ldr x0, [x0, #8]
  d0:   b940100c    ldr w12, [x0, #16]
  d4:   8b0c000c    add x12, x0, x12

So let's switch efi_var_buf to static and create a helper function for
anyone that needs to update it.

Fixes: e01aed47d6 ("efi_loader: Enable run-time variable support for tee based variables")
Reported-by: Atish Patra <atishp@atishpatra.org>
Tested-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
0a7e5165ec efi_loader: efi_size_in_pages() missing parentheses
Add parentheses around size to avoid possible operator precedence problems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
d56013d37c efi_selftest: use CRLF as line endings in dtbdump
EFI applications must use CR LF as line endings.

Provide a print() function to reduce code size.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
65ab48d69d efi_selftest: provide initrddump test tool
Provide an UEFI application to save the initial RAM disk provided by U-Boot
via the Load File2 protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
8644af7dc4 efi_selftest: don't compile dtbdump if GENERATE_ACPI_TABLE
If we are using ACPI tables instead of a device tree, we don't need the
dtbdump.efi test tool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
b6f6080f56 efi_selftest: ask before overwriting in dtbdump.efi
Before overwriting an existing file ask the user.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
19ea5e66de efi_loader: remove EFI_UNICODE_COLLATION_PROTOCOL
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. It was however required to run the UEFI Self Certification Test
(SCT) II, version 2.6, 2017. So we implemented it for the sole purpose of
running the SCT.

As the SCT does not need the protocol anymore it is time for removal.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
59593a52a3 efi_loader: EFI_DEVICE_PATH_UTILITIES_PROTOCOL configurable
Allow the EFI_DEVICE_PATH_UTILITIES_PROTOCOL to be disabled via
configuration.

On systems that are very tight on U-Boot image size we may want to disable
the protocol. As it is required to run the UEFI Shell enable it by default.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
4cb07d8d93 efi_loader: make EFI_DT_FIXUP_PROTOCOL configurable
Allow EFI_DT_FIXUP_PROTOCOL to be disabled via configuration.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
535c473e10 efi_loader: fixup protocol, avoid forward declaration
Avoid a forward declaration.

Add a missing function description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
ff2f532fad efi_loader: make the UEFI boot manager configurable
Some boards are very tight on the binary size. Booting via UEFI is possible
without using the boot manager.

Provide a configuration option to make the boot manager available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:09:34 +01:00
Tom Rini
26e85bf77a Revert "net: eth-uclass: Change uclass driver name to ethernet"
This reverts commit 1231184caa.

While the change is fine in theory, a number of tests need to be updated
to match.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-19 15:35:00 -05:00
Tom Rini
9d13cd95f1 Merge branch '2021-01-19-networking-improvements'
- e1000, ftgmac100: Add support for getting the MAC
- General networking improvements
- dwc_eth_qos, ks8851 fixes
2021-01-19 14:46:45 -05:00
Heinrich Schuchardt
2363effb7a efi_loader: move load options to new module
Move all load options related functions to a new module. So that they can
be compiled independently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-19 18:56:08 +01:00
David Wu
1231184caa net: eth-uclass: Change uclass driver name to ethernet
dev_read_alias_seq() used uc_drv->name compared to alias
stem string, Ethernet's alias stem uses "ethernet", which
does not match the eth-uclass driver name "eth", can not
get the correct index of ethernet alias namer. So it seems
change uclass driver name to match the alias stem is a more
reasonable way.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-19 09:15:02 -05:00
Marek Vasut
6f1e668d96 net: dwc_eth_qos: Pad descriptors to cacheline size
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words
after the descriptor. Use this to pad the descriptors to cacheline size and
remove the need for noncached memory altogether. Moreover, this lets Tegra
use the generic cache flush / invalidate operations.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-01-19 09:15:02 -05:00
Marek Vasut
dd70ff4815 net: ks8851: Reset internal RXFC count on bad packet
A sporadic condition occurs when the "bad packet" error is triggered
repeatedly, which results in "bad packet" messages scrolling on the
console during transfer. To avoid triggering this, reset the internal
RXFC count on the first occurance of the "bad packet", which forces
the code to re-read the RX packet count from the MAC, and prevents
any additional "bad packet" messages if there are no more packets in
the MAC. Also print better debug information if this condition occurs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
2021-01-19 09:15:02 -05:00
Matthias Brugger
ea707dc0aa net: Use NDRNG device in srand_mac()
When calling srand_mac we use a weak seed dependent on the
mac address. If present, use a RNG device instead to incerase entropy.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
2021-01-19 09:15:02 -05:00
Matthias Brugger
92fdad28cf lib: uuid: use RNG device if present
When calculating a random UUID we use a weak seed.
Use a RNG device if present to increase entropy.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
2021-01-19 09:15:02 -05:00
Hongwei Zhang
0be3d1fafb net: ftgmac100: Read and retain MAC address
Read and retain MAC address across flash and QEMU support.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
2021-01-19 09:15:02 -05:00
Jorge Ramirez-Ortiz
c1ab738145 net: eth_legacy - fix build CMD_PCAP
Fix typo which would cause a build error.

Fixes: 3eaac6307d ("net: introduce packet capture support")

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
2021-01-19 09:15:02 -05:00
Harm Berntsen
beb61e13b8 net: tftp: Fix incorrect tftp_next_ack on no OACK
When the tftp server did not send any OACK, the tftp_next_ack variable
was not set to the correct value . As the server was transmitting
blocks we generated a lot of 'Received unexpected block: $n, expected
$n+1' error messages. Depending on the timeout setting the transfer
could still complete though.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Ramon Fried <rfried.dev@gmail.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2021-01-19 09:15:02 -05:00
David Rivshin
51723c5581 net: Do not respond to ICMP_ECHO_REQUEST if we do not have an IP address
While doing DHCP the interface IP is set to 0.0.0.0. This causes the
check in net.c on dst_ip to be effectively skipped, and all IP datagrams
are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the
matching MAC address (regardless of destination IP), the result is that
an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is
0.0.0.0, which is an illegal source address.

This can happen in common practice with the following sequence:
DHCP (U-Boot or OS) acquires IP address 10.0.0.1
System reboots
U-Boot starts DHCP and send DHCP DISCOVER
DHCP server decides to OFFER 10.0.0.1 again
  (perhaps because of existing lease or manual configuration)
DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it
DHCP server still has our MAC address in its ARP table for 10.0.0.1
U-Boot receives PING, and responds with an illegal source address
This may further result in a the DHCP server seeing the response as
  confirmation that someone is squatting on 10.0.0.1, and picking a
  new IP address from the pool to try again

Signed-off-by: David Rivshin <drivshin@allworx.com>
2021-01-19 09:15:02 -05:00
Ian Ray
3f8905ade2 net: e1000: implement eth_write_hwaddr for DM_ETH
Implement programming MAC address to the hardware also for device model
configuration.

Fixes: b565b18a29 ("board: ge: bx50v3: Enable DM for PCI and ethernet")
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-01-19 09:15:01 -05:00
Matthias Schiffer
fa795f4525 net: eth-uclass: avoid running start() twice without stop()
Running the start() handler twice without a stop() inbetween completely
breaks communication for some ethernet drivers like fec_mxc.

eth_halt() is called before each eth_init(). Due to the switch to
eth_is_active() in commit 68acb51f44 ("net: Only call halt on a driver
that has been init'ed"), this is not sufficient anymore when netconsole
is active: eth_init_state_only()/eth_halt_state_only() manipulate the
state check that is performed by eth_is_active() without actually
calling into the driver.

The issue can be triggered by starting a network operation (e.g. ping or
tftp) while netconsole is active.

Add an additional "running" flag that reflects the actual state of the
driver and use it to ensure that eth_halt() actually stops the device as
it is supposed to.

Fixes: 68acb51f44 ("net: Only call halt on a driver that has been init'ed")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-01-19 09:06:15 -05:00
Tom Rini
db0dd72e27 Merge branch '2021-01-18-assorted-platform-updates'
- Assorted MediaTek, AST2x00 updates
- Assorted driver fixes for various platforms
- Keymile platform updates
- Add pwm command, mp5416 pmic driver
2021-01-19 07:56:59 -05:00
Claudiu Beznea
36dfddc553 net: phy: micrel: fix typo
Fix typo.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-19 10:11:14 +02:00
Claudiu Beznea
c6df0e2ffd net: phy: micrel: add support for DLL setup on ksz9131
Add support for DLL setup on KSZ9131.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-19 10:11:14 +02:00
Weijie Gao
ac7a51c0e4 dts: mt7622: use accurate clock source fot mtk_timer
The input system clock for mt7622 timer is 10MHz and can be retrieved
through the clk driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18 15:23:06 -05:00
Weijie Gao
63779b2407 timer: mtk_timer: initialize the timer before use
The timer being used by this driver may have already been used by first
stage bootloader (e.g. ATF/preloader), and it's settings may differ from
what this driver is going to use.

This may cause issues, such as inaccurate timer frequency due to
incorrect clock divider.

This patch adds the initialization code to avoid them.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
97bf73762f pinctrl: mediatek: correct error handling
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
c65b7d1acf mtd: remove drivers/mtd/mw_eeprom.c
drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write()
and mw_eeprom_read() have incorrect loop conditions:

	while (len <= 2) {

CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
80b1ef942d drivers: qe: avoid double free()
Avoid calling free(addr) twice if the device for ucode is not found.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
f11b38e3ae mmc: fsl_esdhc_spl: remove superfluous free()
Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-18 15:23:06 -05:00
Andrey Zhizhikin
1396e41c1f doc: board: freescale: advise to use newer atf and firmware
Update branch and version information of ATF and DDR firmware files to
point to latest releases provided by NXP.

This is especially critical for imx8mp evk, as the ATF support for that
SoC is only available in latest releases.

Align all SoCs from imx8m family to use identical revisions of ATF and
DDR firmware.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
4908067b8f dma: bcm6348: incorrect buffer allocation
Calling calloc() for 0 members does not make any sense.
Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally
unreasonable.

The current code will lead to a NULL dereference in bcm6348_iudma_enable().

The assignments for ch_priv->busy_desc are obviously swapped.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-18 15:23:06 -05:00
Pragnesh Patel
9e9a530a61 cmd: Add a pwm command
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-18 15:23:06 -05:00
Tim Harvey
2767d881f0 power: pmic: add driver for Monolithic Power mp5416
This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
ccdb58dc0a configs: aspeed: Add defconfig for AST2600 EVB
Add the default configuration for the AST2600 EVB.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
4a84cf06aa aspeed: Add AST2600 platform support
Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.

However, currently the patch supports only the booting from
memory-mapped SPI flash.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
ec55a1df39 ARM: dts: aspeed: Add AST2600 SoC support
AST2600 is the 7th generation of Aspeed SoC designated for
Interated Remote Management Processor.

AST2600 has significant performance improvement by integrating
1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the
controllers are also improved with more features and better
performance than preceding AST24xx/AST25xx.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
9fc21086b7 reset: aspeed: Add AST2600 reset support
Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
337d95c4aa wdt: aspeed: Add AST2600 watchdog support
AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.

A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:05 -05:00
Dylan Hung
fde9314346 ram: aspeed: Add AST2600 DRAM control support
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600.
The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb),
512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:19:15 -05:00
Ryan Chen
a3c85990c3 clk: aspeed: Add AST2600 clock support
This patch adds the clock control driver
for the AST2600 SoC.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2021-01-18 15:14:56 -05:00
Kate Liu
34a5addb7b board: presidio: Add Parallel NAND support
Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h

Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-18 15:14:37 -05:00
Kate Liu
161df94b3c mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support
Add Cortina Access parallel Nand support for CAxxxx SOCs

Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
CC: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-18 15:14:34 -05:00
Holger Brunck
49fd12db39 km/arm: cleanup defconfig files
Disable some unneeded config options and adapt the ident string.

CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-18 15:14:15 -05:00
Holger Brunck
cbfc3b76b0 km/kirkwood: enable USB support and the host controller driver
Our kirkwood device embeds a USB host controller that is now used
on some boards. This enables the support of USB and the corresponding
driver.

Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-18 15:14:15 -05:00
Harm Berntsen
7b4fe6dac1 mmc: Only retrieve cd pin when GPIO is enabled
The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-18 15:14:15 -05:00
Harm Berntsen
e8fcb61852 acpi: Add missing ARM acpi_table header
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h by proxy. This file does not exist for the ARM
architecture and thus code compilation failed when using this
driver on ARM.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-18 15:14:15 -05:00
Harm Berntsen
30569b47db gpio: do not include <asm/arch/gpio.h> on ARCH_QEMU
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
QEMU.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
2021-01-18 15:14:15 -05:00
Fabien Parent
c9d7e79f02 clk: mediatek: Add MT8183 clock driver
Add the topckgen, apmixedsys and infracfg clock driver for the MT8183
SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 15:14:13 -05:00
Fabien Parent
44165e4c67 tools: mtk_image: add support for booting ARM64 images
mkimage is only able to package aarch32 binaries. Add support for
AArch64 images.

One can create a ARM64 image using the following command line:
mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1"
-d bl2.bin bl2.img

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:29 -05:00
Fabien Parent
9f6322bd6b configs: pumpkin: enable fastboot
Enable fastboot commands for mt8516 pumpkin board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:29 -05:00
Fabien Parent
d67393503b configs: pumpkin: enable USB gadget
Enable USB gadget on pumpkin. This requires to also enable
BOARD_LATE_INIT since the init is done in board_late_init function.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Fabien Parent
c2984eb38e board: mediatek: pumpkin: initialize usb device
Initialize USB device on pumpkin if it is enabled in the config.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Fabien Parent
3dbff96256 arm: dts: mt8516-pumpkin: enable usb port
Enable the USB port for MT8516 Pumpkin Board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Fabien Parent
9fe7493b80 arm: dts: mt8516: add support for USB
Add support for USB on mt8516 based SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Tom Rini
ae3d8b6c40 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- R-Car pinctrl updates
2021-01-18 12:38:22 -05:00
Tom Rini
59e4e391df Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Update qemu-riscv.rst build instructions.
- Add support for SPI on Kendryte K210.
- Add Microchip PolarFire SoC Icicle Kit support.
- Add support for an early timer.
  - Select TIMER_EARLY to avoid infinite recursion for Trace.
2021-01-18 08:04:28 -05:00
Tom Rini
b5b0237d02 Merge tag 'doc-2021-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for documentation tag doc-2021-04-rc1

* document man-page base command
* move README.fdt-overlays to HTML documentation
* add synopsis for pstore command
2021-01-18 08:04:05 -05:00
Tom Rini
19c5fdffdc Merge branch '2021-01-16-assorted-improvements'
- Assorted testing improvements and fixes
- Assorted code cleanups
2021-01-18 07:55:54 -05:00
Lad Prabhakar
67704d6dfb ARM: dts: renesas: Remove leading 0x from rpc node
Remove the leading "0x" from rpc node to fix the below dtc warning:

Warning (simple_bus_reg): Node /soc/rpc@0xee200000 simple-bus unit
address format error, expected "ee200000"

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-01-18 13:29:12 +01:00
Lad Prabhakar
8096e2426d pinctrl: renesas: Implement get_pin_muxing() callback
Implement get_pin_muxing() callback so that pinmux status
command can be used on Renesas platforms.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-01-18 13:29:12 +01:00
Lad Prabhakar
cc6aa80dd1 pinctrl: renesas: Make sure the pin type is updated after setting the MUX
By default on startup all the pin types are configured to
PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the
pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated
when the pin is set as a function in sh_pfc_pinctrl_pin_set() or
sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if
the pin type is PINMUX_TYPE_NONE ie unused).

So with the current implementation pin functionality could be overwritten
silently, for example if the same pin is added for SPI and serial.

This patch makes sure of updating pin type after every successful call to
sh_pfc_config_mux() and thus fixing from pin functionality to be
overwritten. Also a warning message is printed if the current pin is being
overwritten before abort.

This also avoids pin re-muxing to same type that is for example from
command line device is asked to re-probe/select (mmc dev x) we return
early with success in this case as the pin is already muxed.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-01-18 13:29:12 +01:00
Padmarao Begari
9e550e1830 doc: board: Add Microchip MPFS Icicle Kit doc
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2021-01-18 11:06:39 +08:00
Padmarao Begari
64413e1b7c riscv: Add Microchip MPFS Icicle Kit support
This patch adds Microchip MPFS Icicle Kit support. For now, only
NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are
enabled. The Microchip MPFS Icicle defconfig by default builds
U-Boot for S-Mode because U-Boot on Microchip PolarFire SoC will run
in S-Mode as payload of HSS + OpenSBI.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-18 11:06:38 +08:00
Padmarao Begari
dd4ee416a6 riscv: dts: Add device tree for Microchip Icicle Kit
Add device tree for Microchip PolarFire SoC Icicle Kit.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2021-01-18 11:06:38 +08:00
Padmarao Begari
2f27c9219e clk: Add Microchip PolarFire SoC clock driver
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-18 11:06:38 +08:00
Padmarao Begari
1b4593826c net: macb: Add phy address to read it from device tree
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-18 11:06:38 +08:00
Padmarao Begari
6f0b237372 net: macb: Add DMA 64-bit address support for macb
Enable 32-bit or 64-bit DMA in the macb driver based on the macb
hardware compatibility and it is configured with structure macb_config
in the driver.

The Microchip PolarFire SoC Memory Protection Unit(MPU) gives the 64-bit
DMA access with the GEM, the MPU transactions on the AXI bus is 64-bit
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-18 11:06:38 +08:00
Padmarao Begari
5af3574f6a riscv: Add DMA 64-bit address support
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-01-18 11:06:38 +08:00
Pragnesh Patel
bc8d12bfd8 riscv: timer: Add support for an early timer
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-01-18 11:06:32 +08:00
Pragnesh Patel
a80f85138c trace: select TIMER_EARLY to avoid infinite recursion
When tracing functions is enabled this adds calls to
__cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
functions.

__cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
timer_get_us() to record the entry and exit time.

initr_dm() will make gd->dm_root = NULL and gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.

So select TIMER_EARLY when tracing got enabled.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-01-18 11:06:32 +08:00
Sean Anderson
8f78e52794 riscv: Add support for SPI on Kendryte K210
This enables configs necessary for using SPI. The environment is saved to
the very end of SPI flash. This is unlikely to be overwritten unless the
entire flash is reprogrammed.

This also supplies a default bootcommand. It loads an image and device tree
from the first partition of the MMC. This is a minimal/least effort
bootcmd, so suggestions (especially in the form of patches) are welcome. I
didn't set up distro boot because I think it is unlikely that any
general-purpose linux distros will ever be ported to this board.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Chrstopher Obbard <obbardc@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-01-18 11:06:26 +08:00
Atish Patra
24c5689447 doc: qemu-riscv: Fix opensbi build instructions
Latest opensbi uses generic platform for Qemu. Update the build
instructions.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-01-18 11:06:20 +08:00
Ravik Hasija
ad80a8d087 cmd: disk: Remove fit_print_contents API
fit_print_contents prints similar fit information as printed in bootm stages.
Removing this API reduces redundancy & provides improvement in boottime.

Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Patrick Delaunay
6205bbb1e0 lib: cosmetic update of CONFIG_LIB_ELF description
Change 2 typo error in CONFIG_LIB_ELF description:
- Supoort => Support
- fir => for

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
c548a3886e test: unit test for pr_err(), pr_cont()
Provide a unit test for printing via pr_err() and pr_cont().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
2496796587 log: provide missing macros
With commit d094a0734c ("log: allow for message continuation") we have
defined a special log level and category for message continuation. Let's
have a macro for using these.

If logging is enabled log_cont() will create a continuation log output with
the same logging level and category as the previous message.

If logging is not enabled, log_cont() will print like printf().

Provide macros for logging levels LOG_EMERG, LOG_ALERT, LOG_CRIT.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
5176365a6b log: make debug_cond() function like
Change debug_cond() such that it can be used instead of a function like
debug().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
f5abd8a616 ram: k3-j721e: rename BIT_MASK()
The macro BIT_MASK is already defined in include/linux/bitops.h. To avoid
name collisions rename BIT_MASK() in drivers/ram/k3-j721e/lpddr4_private.h
to LPDDR4_BIT_MASK().

Remove superfluous parantheses.
Remove superfluous comparison to 0.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
bcb0203c61 mtd: misplaced log.h and dm/devres.h
log.h and dm/devres.h are U-Boot includes. So placing them
behind #ifndef __UBOOT__ does not make any sense.

Fixes: f7ae49fc4f ("common: Drop log.h from common header")
Fixes: 61b29b8268 ("dm: core: Require users of devres to include the header")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
986c841c8b lib: zlib: our putc() takes only one argument
In contrast to the C99 standard [1] our putc() takes only one argument.

[1] ISO/IEC 9899:1999

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
834427d463 lib: zlib: include ctype.h
Our ctype.h is in include/linux/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-16 19:17:11 -05:00
Heinrich Schuchardt
3e50deece0 lib: aes: build failure with DEBUG=1
Building fails with DEBUG=1:

lib/aes.c: In function ‘debug_print_vector’:
lib/aes.c:622:45: error:
cast from pointer to integer of different size
[-Werror=pointer-to-int-cast]
  622 |  printf("%s [%d] @0x%08x", name, num_bytes, (u32)data);

Pointers can only be cast to (uintptr_t). But anyway we have
%p for printing pointers.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 19:17:11 -05:00
Peng Fan
0634b374ae armv8: Makefile: build cache files when needed
If no need cache support, not build the cache files, such as in SPL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-16 19:17:11 -05:00
Peng Fan
52e77726ef common: Makefile: drop duplicated line
obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o is there,
no need obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Florian Klink
1d55eb1544 dts: Log name of expected .dtb file
Make it more obvious what .dts file was expected by the build system.

When adding support for a new board, I kept getting this error message,
assuming I passed a wrong DEVICE_TREE parameter.

However, what was really the mistake was that the entry in
`arch/arm/dts/Makefile` was missing, and u-boot didn't like not being
able to find the .dtb file that should have been produced.

Simply logging the expected .dtb file name should make it easier to spot
such mistakes.

Signed-off-by: Florian Klink <flokli@flokli.de>
2021-01-16 14:49:09 -05:00
Pali Rohár
83a287a613 bootmenu: Allow to quit it via ESC/CTRL+C
When ESC/CTRL+C is pressed interrupt bootmenu and jump into U-Boot console.
As the last entry in bootmenu is always U-Boot console just choose the last
entry when ESC or CTRL+C is pressed.

ESC key is detected when either no other character appears after '\e'
within 10ms or when non-'[' appears after '\e'.

It is useful when bootmenu is part of boot process and you want to
interrupt boot process by scripts which control U-Boot (serial) console.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Patrick Delaunay
976a68a20d string: Use memcpy() within memmove() when we can
A common use of memmove() can be handled by memcpy(). Also memcpy()
includes an optimization for large sizes: it copies a word at a time. So
we can get a speed-up by calling memcpy() to handle our move in this case.

Update memmove() to call also memcpy() if the source don't overlap
the destination (src + count <= dest).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-16 14:49:09 -05:00
Vabhav Sharma
67b2ed0243 drivers: serial: probe all uart devices
U-Boot DM model probe only single device at a time
which is enabled and configured using device tree
or platform data method.

PL011 UART IP is SBSA compliant and firmware does the
serial port set-up, initialization and let the kernel use
UART port for sending and receiving characters.

Normally software talk to one serial port time but some
LayerScape platform require all the UART devices enabled
in Linux for various use case.

Adding support to probe all enabled serial devices like SBSA
compliant PL011 UART ports probe and initialization by firmware.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-01-16 14:49:09 -05:00
Vabhav Sharma
a59153dfeb dm: core: add function uclass_probe_all() to probe all devices
Support a common method to probe all devices associated with uclass.

This includes data structures and code for finding the first device and
looping for remaining devices associated with uclasses (groups of devices
with the same purpose, e.g. all SERIAL ports will be in the same uclass).

An example is SBSA compliant PL011 UART IP, where firmware does the serial
port initialization and prepare uart device to let the kernel use it for
sending and reveiving the characters.SERIAL uclass will use this function
to initialize PL011 UART ports.

The feature is enabled with CONFIG_DM.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-01-16 14:49:09 -05:00
Patrick Delaunay
449efce69a console: cosmetics: remove #if 0
Remove the #if 0 present since the first version of console.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Heinrich Schuchardt
7cf5b4053b common: always compile fixup_cmdtable()
With our optimization settings the linker eliminates unused functions.

But for debugging it is better to compile with -Og or -O0. With -O0
compiling the sandbox fails due to the missing function fixup_cmdtable()
called by dm_reloc() and others.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Philippe Reynes
c61b2bf30c common: spl: spl_fit.c: report an error on hash check fail
When the hash check fails on a loadable image, the SPL/TPL simply
jump to the next one. This commit changes this behaviour, when the
hash check fails on a loadable image, the function spl_load_simple_fit
stops and report an error.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Steve Bennett
d2e64d29c4 cli_readline: Only insert printable chars
There should be no need to insert non-printable characters
and this prevents line editing getting confused.

Signed-off-by: Steve Bennett <steveb@workware.net.au>
2021-01-16 14:49:09 -05:00
Joel Peshkin
652b504ff2 Add optional salt to AUTOBOOT_STOP_STR_SHA256
Adds an optional SALT value to AUTOBOOT_STOP_STR_SHA256.   If a string
followed by a ":" is prepended to the sha256, the portion to the left
of the colon will be used as a salt and the password will be appended
to the salt before the sha256 is computed and compared.

Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Joel Peshkin <joel.peshkin@broadcom.com>
To: u-boot@lists.denx.de
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-16 14:49:09 -05:00
Rasmus Villemoes
214cc199b4 doc/README.gpt: reflow partition type GUID table
The previous patch made the table look bad. Fix it, and leave some
space for a future element being a bit longer than the current
maximum.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-01-16 14:49:09 -05:00
Rasmus Villemoes
c0364ce1c6 doc/README.gpt: define partition type GUID for U-Boot environment
When setting aside a GPT partition for holding the U-Boot environment,
having a partition type GUID [1] indicating "Linux filesystem" (as
most tools default to) is somewhat misleading - and there's no other
well-known type GUID that is better suited. So to have a canonical
value to put into the type field, define

    3de21764-95bd-54bd-a5c3-4abe786f38a8

to mean a partition holding a U-Boot environment.

This is a v5 namespace-name GUID [2], generated [3] from a namespace
of "25cbcde0-8642-47c6-a298-1a3a57cd256b" and name "U-Boot
environment".

Should future type GUIDs be defined in the context of U-Boot, it's
sensible to use that same namespace GUID.

[1] https://en.wikipedia.org/wiki/GUID_Partition_Table#Partition_type_GUIDs
[2] https://en.wikipedia.org/wiki/Universally_unique_identifier#Versions_3_and_5_(namespace_name-based)
[3] https://www.uuidtools.com/v5

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-01-16 14:49:09 -05:00
Rasmus Villemoes
31ce367cd1 lib/uuid.c: change prototype of uuid_guid_get_str()
There's no reason to require an appropriately sized output parameter
for the string, that's error-prone should the table ever grow an
element with a longer string. We can just return the const char*
pointer directly.

Update the only caller accordingly, and get rid of pointless ifdeffery
in the header so that the compiler always sees a declaration and can
thus do type-checking, whether or not PARTITION_TYPE_GUID is enabled
or not.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-01-16 14:49:09 -05:00
Nishanth Menon
2d572ede11 power: regulator: Kconfig: add a dependency for POWER_SUPPORT for SPL
power/regulator will not be built if just CONFIG_SPL_DM_REGULATOR is
enabled. It needs CONFIG_SPL_POWER_SUPPORT to be enabled as well.

For example, if we just need a GPIO regulator in SPL:
CONFIG_DM_REGULATOR=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_DM_REGULATOR_GPIO=y

Will not suffice, since the entire regulator build for SPL depends on
CONFIG_SPL_POWER_SUPPORT. Elaborate that information in the Kconfig
dependency.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-16 14:49:09 -05:00
Patrick Delaunay
76fde13883 test: correct the test prefix in ut str
Align the prefix used in cmd_ut_category function and name of tests
for ut str.
This patch solves the issues detected by "make qcheck" after previous
patch.

Fixes: fdc79a6b12 ("lib: Add a function to convert a string to upper case")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Patrick Delaunay
353df8d3c3 test: correct the test prefix in ut cmd_mem
Align the prefix used in cmd_ut_category function and name of tests
for ut mem.
This patch solves the issues detected by "make qcheck" after previous
patch.

Fixes: 550a9e7902 ("cmd: Update the memory-search command")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Simon Glass
6ea5df39e8 test: Only enable bloblist test when supported
This test cannot work unless CONFIG_BLOBLIST is enabled. Update it to add
that condition.

Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Simon Glass
ef7e264944 test: Avoid assuming sandbox board for bloblist test
This tests assumes it is running on sandbox. Add a few functions to handle
silencing the console on any board and use those instead.

Reported-by: Kever Yang <kever.yang@rock-chips.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-16 14:49:09 -05:00
Corneliu Doban
12fc1f3bb2 cmd: gpt: add eMMC and GPT support
Add eMMC and GPT support.
- GPT partition list and command to create the GPT added to u-boot
  environment
- eMMC boot commands added to u-boot environment
- new gpt commands (enumarate and setenv) that are used by broadcom
  update scripts and boot commands
- eMMC specific u-boot configurations with environment saved in eMMC
  and GPT support

Signed-off-by: Corneliu Doban <cdoban@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
[trini: Make gpt_setenv initialize ret to -1, given relevant return
        error values]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-16 14:48:23 -05:00
Marcin Juszkiewicz
9a3122f769 Kconfig: simple panel requires backlight
During build of simple panel driver backlight is needed so let's enable
it:

aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight':
u-boot/drivers/video/simple_panel.c:43: undefined reference to `backlight_set_brightness'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight':
u-boot/drivers/video/simple_panel.c:28: undefined reference to `backlight_enable'

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
2021-01-16 11:58:49 -05:00
Heinrich Schuchardt
622178d923 cmd: CMD_CPU depends on CPU
Compiling with CONFIG_CMD_CPU=y and CONFIG_CPU=n fails with:

aarch64-linux-gnu-ld.bfd: cmd/built-in.o: in function `print_cpu_list':
/home/user/u-boot/cmd/cpu.c:34: undefined reference to `cpu_get_desc'
aarch64-linux-gnu-ld.bfd:
/home/user/u-boot/cmd/cpu.c:39: undefined reference to `cpu_get_info'
Segmentation fault (core dumped)
make: *** [Makefile:1757: u-boot] Error 139
make: *** Deleting file 'u-boot'

See error report in https://stackoverflow.com/questions/64678347.

Add the missing build dependency.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 11:58:49 -05:00
Heinrich Schuchardt
af033ec8b4 test: test/lib/test_print.c depends on CONSOLE_RECORD
The tests in test/lib/test_print.c fail without CONFIG_CONSOLE_RECORD=y.

Add a build dependency.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-16 11:58:49 -05:00
Tom Rini
14ea1b3635 Merge branch '2021-01-15-assorted-improvements'
- Add MBR partition layout writing supporting, clean up code.
- A large number of assorted console/iomux cleanups
- A large number of board_r related cleanups.
- Log enhancements
2021-01-16 11:14:21 -05:00
Heinrich Schuchardt
dd9abfec13 doc: sifive: fu540: fix heading levels
Two sibling headings cannot have the same name.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-16 11:17:20 +01:00
Heinrich Schuchardt
4f792d232d doc: move README.fdt-overlays to HTML documentation
Convert doc/README.fdt-overlays to doc/usage/fdt_overlays.rst.

Edit the text for readability.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-16 11:17:20 +01:00
Heinrich Schuchardt
c2febb2843 doc: board: fix README.b4860qds
Two sibling headings can never be the same.

Fix the heading levels.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-01-16 11:17:20 +01:00
Heinrich Schuchardt
e581492939 doc: add synopsis for pstore command
Add a synopsis section.

Use lower case for command name.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-16 11:17:20 +01:00
Heinrich Schuchardt
5ff1357227 doc: man-page base command
Provide a description of the base command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-16 11:17:20 +01:00
Marek Szyprowski
750c543ca7 cmd: Add MBR partition layout control utility
Add a 'mbr' command to let users create or verify MBR partition layout
based on the provided text description. The partition layout is
alternatively read from the 'mbr_parts' environment variable. This can be
used in scripts to help system image flashing tools to ensure proper
partition layout.

The syntax of the text description of the partition list is similar to
the one used by the 'gpt' command. Supported parameters are: name
(currently ignored), start (partition start offset in bytes), size (in
bytes or '-' to expand it to the whole free area), bootable (boolean
flag) and id (MBR partition type). If one wants to create more than 4
partitions, an 'Extended' primary partition (with 0x05 ID) has to be
explicitely provided as a one of the first 4 entries.

Here is an example how to create a 6 partitions (3 on the 'extended
volume'), some of the predefined sizes:

> setenv mbr_parts 'name=boot,start=4M,size=128M,bootable,id=0x0e;
  name=rootfs,size=3072M,id=0x83;
  name=system-data,size=512M,id=0x83;
  name=[ext],size=-,id=0x05;
  name=user,size=-,id=0x83;
  name=modules,size=100M,id=0x83;
  name=ramdisk,size=8M,id=0x83'
> mbr write mmc 0

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-15 16:00:32 -05:00
Marek Szyprowski
20bd5ac6e4 disk: dos: add code for creating MBR partition layout
Add a code for creating and writing MBR partition layout. The code generates
similar layout of EBRs (Exteneded Block Records) and logical volumes as
Linux's fdisk utility.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-15 15:33:09 -05:00
Marek Szyprowski
cb571f91c6 disk: dos: make some functions static
Make functions not used outside this file static.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[trini: Use __maybe_unused as there are cases they may not be used]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-15 15:32:47 -05:00
Marek Szyprowski
97163dd1ac disk: dos: use generic macro for unaligned le32 access
Use a generic helper for reading LE32 integers.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-15 14:38:00 -05:00
Marek Szyprowski
80bd05f27f disk: dos: add some defines for the hardcoded numbers
Add some handy defines for some hardcoded magic numbers related to
extended partition handling.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-15 14:38:00 -05:00
Marek Szyprowski
92f1c89d0a disk: dos: rename write_mbr_partition to write_mbr_sector
write_mbr_partition() function name is a bit misleading, so rename it to
write_mbr_sector(). This is a preparation for adding code for writing a
complete MBR partition layout.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
70c2525c0d IOMUX: Stop dropped consoles
When at some point environment shrinks we need to stop dropped devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
420782c45b IOMUX: Drop indentation level by removing redundant 'else'
Obviously the following has unnecessary indentation level in 'else' branch.

	if (foo) {
		...
		return;
	} else {
		...
	}

Drop indentation level by removing redundant 'else'.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
c939e1ca5d IOMUX: Refactor iomux_doenv() in order to increase readability
Refactor iomux_doenv() a bit in order to increase readability.
There is no change in code generation on x86.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
1f8e6985db IOMUX: Preserve console list if realloc() fails
It's realloc() 101 to avoid `foo = realloc(foo, ...);` call
due to getting a memory leak.

Actually it's not clear why realloc() has been used here.
If we shrink the array, the memcpy() overwrites it anyway
with the contents of a new array. If it becomes bigger,
same story.

Drop useless realloc() for good and thus preserve console list
in case of failed allocation.

Fixes: 16a28ef219 ("IOMUX: Add console multiplexing support.")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
ae69738d3b console: Provide a documentation for console_search_dev()
Provide a documentation for console_search_dev().

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
3232487daf console: rename search_device() to console_search_dev()
Rename search_device() to console_search_dev() since it's in console.h.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:38:00 -05:00
Andy Shevchenko
e645b9bd8d console: move search_device() from iomux.h to console.h
search_device() is defined in console.c. Move its declaration
to an appropriate header file.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:37:03 -05:00
Andy Shevchenko
95aaf40254 console: Keep ->start() and ->stop() balanced
There is no need to call ->start() for already started device. All the same,
there is no need to call ->stop() for devices still in use.

For now enforce this only for IOMUX case.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:37:03 -05:00
Andy Shevchenko
41f668b97c console: Introduce console_start() and console_stop()
In the future we would like to stop unused consoles and
also add a reference counting to avoid imbalanced calls
to ->start() and ->stop() in some cases.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Patrick Delaunay
a17b38ce39 console: add console_has_tstc helper function for CONSOLE_MUX
Add the helper function console_has_tstc() and replace the test
#if CONFIG_IS_ENABLED(CONSOLE_MUX) to a simple 'if' test to
respect the U-Boot coding rule.

No functional change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Patrick Delaunay
1e993710e8 console: remove #ifdef CONFIG_CONSOLE_RECORD
Add helper functions to access to gd->console_out and gd->console_in
with membuff API and replace the #ifdef CONFIG_CONSOLE_RECORD test
by if (IS_ENABLED(CONFIG_CONSOLE_RECORD)) to respect the U-Boot
coding rule.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Patrick Delaunay
45375adc97 console: add function console_devices_set
Add a new function to access to console_devices only defined if
CONFIG_IS_ENABLED(CONSOLE_MUX).

This path allows to remove #if CONFIG_IS_ENABLED(CONSOLE_MUX)
in console_getc function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-15 14:36:12 -05:00
Patrick Delaunay
c04f856822 console: remove #ifdef CONFIG when it is possible
Remove #ifdef or #ifndef for CONFIG when it is possible to simplify
the console.c code and respect the U-Boot coding rules.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
13e0f020f7 global_data: Enable spl_handoff only if CONFIG_HANDOFF is set
spl_handoff should only be enabled when CONFIG_HANDOFF is set. Drop the
nested ifdefs and check for CONFIG_HANDOFF instead.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
2a7c9ab479 spl: Kconfig: Add SPL dependency to CONFIG_HANDOFF
CONFIG_HANDOFF is used in u-boot proper to locate handoff info from SPL
during pre-relocation init (in setup_spl_handoff). Add explicit dependency
on CONFIG_SPL, to fix the following build error when CONFIG_HANDOFF &&
!CONFIG_SPL:

common/board_f.c: In function ‘setup_spl_handoff’:
common/board_f.c:283:4: error: ‘gd_t {aka struct global_data}’
has no member named ‘spl_handoff’
  gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
    ^~

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
130845bac1 common: board_r: Drop arch-specific ifdefs around initr_trap
In order to remove the arch-specific ifdefs around initr_trap, introduce
arch_initr_trap weak initcall. Implementations for ppc/m68k/mips have
been moved to arch/<arch>/lib/traps.c

Default implementation is a nop stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
c65abc70fb common: board_r: Drop initr_bbmii wrapper
Add a return value to bb_miiphy_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
ce41e73523 common: board_r: Drop initr_api wrapper
Add a return value to api_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
0154858039 common: board_r: Drop initr_jumptable wrapper
Add a return value to jumptable_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
eb2825b79d common: board_r: Drop initr_xen wrapper
Add a return value to xen_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
42d0d4223f common: board_r: Drop initr_noncached wrapper
Add a return value to noncached_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
b9f6d0f7db common: board_r: Drop initr_pci wrapper
Add a return value to pci_init and use it directly in the post-relocation
init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
c343e8c0bf common: board_r: Drop initr_pci_ep wrapper
Add a return value to pci_ep_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:12 -05:00
Ovidiu Panait
7addd3c6df common: board_r: Drop initr_post_backlog wrapper
Add a return value to post_output_backlog and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
fb504b2c08 common: board_r: Drop initr_secondary_cpu wrapper
Add a return value to cpu_secondary_init_r and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
51c5a2c5e4 common: board_r: Drop initr_console_record wrapper
Drop initr_console_record wrapper and call console_record_init directly.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
19b18daa29 common: board_f: Use IS_ENABLED(CONFIG_OF_EMBED) in reserve_fdt, reloc_fdt
Use IS_ENABLED(CONFIG_OF_EMBED) in instead of #ifdefs in reserve_fdt,
reloc_fdt functions.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
3671668676 common: board_f: Move setup_machine code to setup_bdinfo
setup_bdinfo is used to populate various bdinfo fields, so move
setup_machine code there, as all it does is setting
gd->bd->bi_arch_number.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
4b9a121fc6 common: board_f: Use IS_ENABLED(CONFIG_TIMER_EARLY) in initf_dm
Use IS_ENABLED(CONFIG_TIMER_EARLY) instead of #ifdef in initf_dm. Also,
move timer code to the main ifdef, so that ret is defined.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
8e8d45ee02 common: board_f: Drop initf_console_record wrapper
Drop initf_console_record wrapper and call console_record_init directly.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Ovidiu Panait
4e81920ba8 common: Kconfig: Introduce CONFIG_CONSOLE_RECORD_INIT_F
Currently, the following #ifdef construct is used to check whether to run
console_record_init() during pre-relocation init:
 defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)

Introduce CONFIG_CONSOLE_RECORD_INIT_F Kconfig option to get rid of the
complex ifdef check. Also, use IS_ENABLED() instead of #ifdef.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
c698b998bb log: call vsnprintf only when it is needed to emit trace
Reduce the log overhead when the traces are filtered,
by moving the vsnprintf call from _log() to log_dispatch().

This patch avoids the printf treatment when LOG features is
activated, but trace is filtered, for example when
MAX_LOG_LEVEL=8 and LOG_DEFAULT_LEVEL=6.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
742346f6cc test: log: add test for console output of dropped messages
Add a new test to check the content of the dropped messages
sent to console puts function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
bf80edb91a console: allow to record console output before ready
Allow to record the console output before before U-Boot
has a console ready.

This patch allows to test the console output in sandbox test
based on console record.

It is possible because GD_FLG_RECORD and GD_FLG_SERIAL_READY
are 2 independent flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
93cdb52b2a console: remove duplicated test on gd value
Reorder test on gd value and remove the duplicated test (!gd)
in putc and puts function.

This patch is a preliminary step for rework of this function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
a4918b2310 test: add test for dropped trace before log_init
Add test for dropped trace before log_init, displayed by debug uart.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
dd500134a4 log: use console puts to output trace before LOG init
Use the console puts functions to output the traces before
the log initialization (when CONFIG_LOG is not activated).

This patch allows to display the first U-Boot traces
(with macro debug) when CONFIG_DEBUG_UART is activated
and not only drop them.

For example for traces in board_f.c requested by the macro debug,
when LOG_DEBUG is defined and CONFIG_LOG is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
ce9af2a6b5 test: log: add test for dropped messages
Add a new test to check the dropped messages when LOG is not ready
with log_drop_count and the result of _log().

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
f0e90e0ead log: don't build the trace buffer when log is not ready
Update _log function to drop any traces when log is yet initialized:
vsnprintf is no more executed in this case.

This patch allows to reduce the cost for the dropped early debug trace.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2021-01-15 14:36:11 -05:00
Patrick Delaunay
6278ec1919 test: add LOGL_FORCE_DEBUG flags support in log tests
Add a check of the _log function with LOGL_FORCE_DEBUG flags,
used to force the trace display.

The trace should be displayed for all the level when flags
have LOGL_FORCE_DEBUG bit is set, for any filter.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15 14:36:10 -05:00
Dario Binacchi
b0db69b4e1 dm: fix build errors generated by last merges
Something was wrong in the merge process into the mainline.
Some added patches access driver structure fields and functions that
have been modified by previous patches.
The patch renames:
 - dev_get_platdata to dev_get_plat
 - dev_get_uclass_platdata to dev_get_uclass_plat
 - ofdata_to_platdata to of_to_plat
 - plat_data_alloc_size to plat_auto
 - priv_auto_alloc_size to priv_auto
 - video_uc_platdata to video_uc_plat

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-15 13:12:38 -05:00
Tom Rini
83e13c3469 Merge branch '2021.04-rc' of https://github.com/lftan/u-boot
- Add ATF flow for SoC64 devices
- Update socfpgaimage to support print header and update padding flow
2021-01-15 07:55:11 -05:00
Ley Foon Tan
40551cf99c tools: socfpgaimage: update padding flow
The existing socfpgaimage always pads the image to the maximum size of
OCRAM size. This will break in the encryption flow where it expects the
image to be un-padded. The encryption tool will do the encryption for
the whole image and append the signature key at end of the image.
The signature key will append to beyond the size of OCRAM if the image
is padded with the maximum size before encryption.

Move the padding step from socfpgaimage to Makefile and pads with objcopy
command.

socfpgaimage will pad the image with 16 bytes aligned (including CRC word),
this is a requirement in encryption flow.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-01-15 17:48:39 +08:00
Ley Foon Tan
53b59290c5 configs: socfpga: Add CONFIG_SPL_PAD_TO
Add CONFIG_SPL_PAD_TO for Gen5 and Arria 10. CONFIG_SPL_PAD_TO is set to
size of OCRAM.

This is preparation for image padding change in socfpgaimage.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-01-15 17:48:39 +08:00
Ley Foon Tan
bcf33fac64 tools: socfpgaimage: Print image header information
Print image header information if the header is verified.

Example output from mkimage "-l" option:

$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type      : Cyclone V / Arria V SoC Image
Validation word : 0x31305341
Version         : 0x00000000
Flags           : 0x00000000
Program length  : 0x00003a59
Header checksum : 0x00000188

$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type      : Arria 10 SoC Image
Validation word : 0x31305341
Version         : 0x00000001
Flags           : 0x00000000
Header length   : 0x00000014
Program length  : 0x000138e0
Program entry   : 0x00000014
Header checksum : 0x00000237

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-01-15 17:48:39 +08:00
Chee Hong Ang
7d8890d8fb configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support
Booting Agilex and Stratix 10 with ATF support.

SPL now loads ATF (BL31), U-Boot proper and DTB from FIT
image. The new boot flow with ATF support is as follow:

SPL -> ATF (BL31) -> U-Boot proper -> OS (Linux)

U-Boot proper now starts at 0x200000 (CONFIG_SYS_TEXT_BASE).
ATF will occupy the address range starting from 0x1000.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:39 +08:00
Siew Chin Lim
362787eb57 arm: socfpga: soc64: Enable FIT image generation using binman
Enable BINMAN when using Arm-Trusted-Firmware (ATF) to
generate FIT images.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:38 +08:00
Siew Chin Lim
c87496add0 arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support
Add binman node to device tree to generate the FIT image for u-boot
(u-boot.itb) and OS kernel (kernel.itb).

u-boot.itb contains arm trusted firmware (ATF), u-boot proper and
u-boot device tree for ATF u-boot flow.

kernel.itb contains Linux Image and Linux device tree.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:38 +08:00
Chee Hong Ang
7cfb5d85ce arm: socfpga: soc64: Skip handoff data access in SSBL
SPL already setup the Clock Manager with the handoff data
from OCRAM. When the Clock Manager's driver get probed again
in SSBL, it shall skip the handoff data access in OCRAM.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:38 +08:00
Chee Hong Ang
482bc18d4a arm: socfpga: soc64: SSBL shall not setup stack on OCRAM
Since SSBL is running in DRAM, it shall setup the stack in DRAM
instead of OCRAM which is occupied by SPL and handoff data.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:38 +08:00
Chee Hong Ang
3b07cec93a arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold()
mbox_reset_cold() will invoke ATF's PSCI service when running in
non-secure mode (EL2).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:38 +08:00
Chee Hong Ang
677b420a15 arm: socfpga: soc64: Add ATF support for FPGA reconfig driver
In non-secure mode (EL2), FPGA reconfiguration driver calls the
SMC/PSCI services provided by ATF to configure the FPGA.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:37 +08:00
Chee Hong Ang
018d27f251 arm: socfpga: soc64: Add ATF support for Reset Manager driver
In non-secure mode (EL2), Reset Manager driver calls the
SMC/PSCI service provided by ATF to enable/disable the
SOCFPGA bridges.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:37 +08:00
Chee Hong Ang
a90ae0167b net: designware: socfpga: Add ATF support for MAC driver
In non-secure mode (EL2), MAC driver calls the SMC/PSCI services
provided by ATF to setup the PHY interface.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:37 +08:00
Chee Hong Ang
6b38cc2f2b mmc: dwmmc: socfpga: Add ATF support for MMC driver
In non-secure mode (EL2), MMC driver calls the SMC/PSCI services
provided by ATF to set SDMMC's DRVSEL and SMPLSEL.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:37 +08:00
Siew Chin Lim
d456dfbaa0 mmc: dwmmc: Change designware MMC 'clksel' callback function to return status
Change 'clksel' callback function to allow the code to return a
status.

This patch is a preparation for enabling Arm-Trusted-Firmware (ATF)
in Intel SoC FPGA. This patch does not change functionality.

When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock
related register is secure register which is required to be written
via SMC/PCSI call. It is possible that U-Boot fail to write the
register if there is unexpected error between U-Boot and ATF.
As a result, there maybe signal integrity on MMC connection due to
clock. So, the code should reports error to user when 'clksel' fail.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:36 +08:00
Siew Chin Lim
2e54a1d46c arm: socfpga: Add secure register access helper functions for SoC 64bits
These secure register access functions allow U-Boot proper running
at EL2 (non-secure) to access System Manager's secure registers
by calling the ATF's PSCI runtime services (EL3/secure).

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-01-15 17:48:36 +08:00
Chee Hong Ang
313de73352 arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services
This header file defines the Secure Monitor Call (SMC) message
protocol for ATF (BL31) PSCI runtime services. It includes all
the PSCI SiP function identifiers for the secure runtime services
provided by ATF. The secure runtime services include System Manager's
registers access, 2nd phase bitstream FPGA reconfiguration, Remote
System Update (RSU) and etc.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:36 +08:00
Chee Hong Ang
0eebfab3fe arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits)
invoke_smc() allow U-Boot proper running in non-secure mode (EL2)
to invoke SMC call to ATF's PSCI runtime services such as
System Manager's registers access, 2nd phase bitstream FPGA
reconfiguration, Remote System Update (RSU) and etc.

smc_send_mailbox() is a send mailbox command helper function which invokes
the ATF's PSCI runtime service (function ID: INTEL_SIP_SMC_MBOX_SEND_CMD)
to send mailbox messages to Secure Device Manager (SDM).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:36 +08:00
Chee Hong Ang
dbdc1df877 arm: socfpga: Disable "spin-table" method for booting Linux
Standard PSCI function "CPU_ON" provided by ATF is now used
by Linux kernel to bring up the secondary CPUs to enable SMP
booting in Linux on SoC 64bits platform.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:35 +08:00
Chee Hong Ang
ac0c1fda90 arm: socfpga: soc64: Override 'lowlevel_init' to support ATF
Override 'lowlevel_init' to make sure secondary CPUs trapped
in ATF instead of SPL. After ATF is initialized, it will signal
the secondary CPUs to jump from SPL to ATF waiting to be 'activated'
by Linux OS via PSCI call.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:35 +08:00
Chee Hong Ang
200846f008 arm: socfpga: soc64: Load FIT image with ATF support
Instead of loading u-boot proper image (u-boot.img), SPL
now loads FIT image (u-boot.itb) which includes u-boot
proper, ATF and u-boot proper's DTB.

For OS, u-boot now loads FIT images (kernel.itb) which
includes Linux Image and Linux's DTB.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-15 17:48:35 +08:00
Chee Hong Ang
acabb2acb0 arm: socfpga: Add function for checking description from FIT image
Add board_fit_config_name_match() for matching board name with
device tree files in FIT image. This will ensure correct DTB
file is loaded for different board type. Currently, we are not
supporting multiple device tree files in FIT image therefore this
function basically do nothing for now.
Users are allowed to override this 'weak' function in their
specific board implementation.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2021-01-15 17:48:34 +08:00
Tom Rini
35772ff4f6 Merge tag 'efi-2021-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc1

In the UEFI sub-system:

* implement non-blocking file services
* print boot device and file path in helloworld.efi
* improve detection of boot device
* correct argument handling in efivar.py
* implement EFI_DT_FIXUP_PROTOCOL

Bug fixes:

* adjust conitrace command for low baud rates
* check that FIT images are valid FDTs
2021-01-14 08:50:23 -05:00
Tom Rini
ab1a425524 Merge tag 'u-boot-stm32-20210113' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Enable logging features for stm32mp15 boards
- Update MAINTAINERS emails for STI and STM32
- Activate OF_LIVE for ST stm32mp15 boards
- Switch to MCO2 for PHY 50 MHz clock for DHCOM boards
- Correction in stm32prog command on uart: always flush DFU on start command
- Update USB-C power detection algorithm on DK boards
2021-01-13 15:00:53 -05:00
Tom Rini
795f8fd0b5 Merge tag 'u-boot-amlogic-20210112' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- sync amlogic GX & AXG DT to Linux 5.10
- Add new MESON_EE driver support for GXBB & AXG
- Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards
- add driver for TDO tl070wsh30 panel driver
- meson: isolate loading of socinfo
- Add soc_rev to environment
- Enable G12A support for saradc
- Add correct mmcdev on VIM3(L) & Odroid-N2(C4)
- Read MAC from fuses for VIM3 & VIM3L boards
2021-01-13 07:32:02 -05:00
Patrice Chotard
7ccaa31380 MAINTAINERS: Update STi and STM32 maintainers emails in remaining files
A previous series already update STMicroelectronics emails maintainers
but some files have been omitted (Makefile, .dts, .dtsi and .rst files).
Update Patrick and my email address with the one dedicated to upstream
activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
751f918bdb arm: stm32mp: stm32prog: always flush DFU on start command for uart
Remove the test on data->dfu_seq, because dfu_seq=0 not only when
the DFU is not started (mask with 0xffff). This flush is mandatory
as the final treatment, common with USB, is done in DFU callback.

This patch avoids issue if the received length is a multiple of
the DFU packet.

For example if size of bootfs partition is egual to 0x4000000,
data->dfu_seq=0 at the end of the partition, the flush it not
requested and the phase is not increased in the callback.
U-Boot continue to request the bootfs in the next GetPhase command.

Fixes: 468f0508b5 ("stm32mp: stm32prog: add serial link support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
e451fa2a05 configs: stm32mp1: activate OF_LIVE for DT live support
Activate the live DT to reduce the DT parsing time.

For example the boot time is reduced by 200ms on STM32MP157C-EV1 board
for stm32mp15_basic_defconfig (boot with SPL) or
stm32mp15_trusted_defconfig (boot with TF-A).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-01-13 09:52:58 +01:00
Marek Vasut
69ea30e688 ARM: dts: stm32: Switch to MCO2 for PHY 50 MHz clock
The LAN8710i PHY currently uses 50 MHz clock direct from PLL4P.
To permit PLL4P to run at faster frequency, use MCO2 as a divider.
The PLL4P runs at 100 MHz, supplies MCO2 which divides it by 2 to
50MHz, and supplies the PHY with 50 MHz via pin PG2. The feedback
clock are fed back in via pin PA1.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ia9bf7119785d49b633a3ae761c3dc4a30b92628a
2021-01-13 09:52:58 +01:00
Michal Simek
635e233b22 ARM: stm32: Use firmware property instead of loadables
There shouldn't be a need to use loadables propertyn because u-boot can be
pointed by firmware property. This change should also speedup boot process
because loadables property is list of strings which code is going through.
On the other hand firmware can just point to one image.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrice Chotard
42082bc61b board: stm32pm1: update USB-C power detection algorithm on DK boards
USB-C power supply which are Power Delivery compliant (USB-PD) are able
to provide different voltage/current (for example 5V/3A 9V/3A 12V/2.25A...)

In this case, the power supply need to negotiate the voltage/current to
use with the device using CC1/CC2 USB-C signals.

If this negotiation occurs during ADC measurement (done also on CC1/CC2
USB-C signals) some ADC acquisition can be corrupted which cause wrong
power supply current detection.

To avoid this, the power supply current detection algorithm is updated
as following:
  - perform an ADC measurement, if a 3A current is detected, continue the
    boot process.
  - else, wait 20ms (max tPDDebounce duration) to ensure that USB-PD
    negotiation is done and perform another ADC measurement.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
8396408e79 configs: stm32mp15: enable LOG features
Activate the logging features in SPL and U-Boot
(CONFIG_LOG and CONFIG_SPL_LOG) and the command 'log' with
CONFIG_CMD_LOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
705b5bf9bb board: st: common: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
873bf44888 board: st: stm32mp1: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
846365b907 video: stm32_dsi: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
8d2257e5a7 video: stm32_ltdc: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
a3ce8d600c serial: stm32: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
b6e91f71d6 memory: stm32-fmc2: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
6a7eefeb7e mtd: stm32_fmc2: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
162f5888e7 spi: stm32_qspi: migrate trace to dev and log macro
Change debug/pr_* to log_* or dev_* macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
7a41cb50ce spi: stm32_spi: migrate trace to dev and log macro
Change debug/pr_debug to log_debug or dev_dbg macro and
define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
0d5fbadeff phy: stm32-usbphyc: migrate trace to dev and log macro
Change pr_debug to log_debug or dev_dbg macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
f4ed224d53 i2c: stm32f7_i2c: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
ff2a09cede mailbox: stm32-ipcc: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
829c92b1ee reset: stm32-reset: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
cddc30d647 clk: clk_stm32h7: migrate trace to dev and log macro
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
06a126313e clk: clk_stm32f: migrate trace to dev and log macro
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
ceab8ee257 clk: stm32mp1: migrate trace to dev and log macro
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
75760653cb misc: rcc: keep the rcc device name for subnode
Update the name associated with the RCC drivers to avoid
duplicated name with the driver name.

With this patch the traces displayed with log macro provide a
correct device name.

The rcc device name before the patch is:

 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 root          0  [ + ]   root_driver           root_driver
 simple_bus    0  [ + ]   simple_bus            |-- soc
 (...)
 nop           0  [ + ]   stm32-rcc             |   |-- rcc@50000000
 clk           0  [ + ]   stm32mp1_clk          |   |   |-- stm32mp1_clk
 reset         0  [ + ]   stm32_rcc_reset       |   |   `-- stm32_rcc_reset

And they become:
 (...)
 nop           0  [ + ]   stm32-rcc             |   |-- rcc@50000000
 clk           0  [ + ]   stm32mp1_clk          |   |   |-- rcc@50000000
 reset         0  [ + ]   stm32_rcc_reset       |   |   `-- rcc@50000000

The traces is correct:
stm32mp1_clk rcc@stm32mp1_clk: .....
=>
stm32mp1_clk rcc@50000000: .....

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
8e80ba5af0 misc: rcc: migrate trace to dev macro
Change debug and pr_err to dev macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
ca9a9da657 power: regulator: stm32-verfbuf: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
281ebc5bf7 watchdog: stm32mp: migrate trace to dev macro
Change debug and pr_err to dev macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
33d797ae03 rtc: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
fb5b2463d2 hwspinlock: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
1ac7d52d47 timer: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
4dbaa1b6d7 mmc: stm32_sdmmc2: migrate trace to dev and log macro
Define LOG_CATEGORY, use dev_ macro when it is possible.
Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
66b3b9db69 ram: stm32mp1: migrate trace to dev or log macro
Define LOG_CATEGORY, use dev_ macro when it is possible
and migrate other trace to log_ macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
997f7dab9d ram: stm32: migrate trace to log macro
Define LOG_CATEGORY, change debug to dev_dbg and remove "%s:" __func__
header as it is managed by dev macro (dev->name is displayed)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
c886cd6eea remoproc: stm32: migrate trace to log macro
Define LOG_CATEGORY and remove unneeded pr_fmt macro with the dev
macro as dev->name is displayed and CONFIG_LOGF_FUNC can be
activated for log macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
6dd89d9d5a gpio: stm32-gpio: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.

Remove dev->name as it is already displayed by dev macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
28b3e7be15 pinctrl: stm32: migrate trace to log macro
Change debug to log macro and define LOG_CATEGORY.

Remove "%s:" with __func__ as it is managed by log macro
(CONFIG_LOGF_FUNC)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
b66bfdf238 arm: stm32mp: bsec: migrate trace to log macro
Define LOG_CATEGORY, change pr_debug to dev_dbg and remove "bsec:"
header as it is managed by log macro (dev->name is displayed)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
711b5bc0a2 arm: stm32mp: migrate cmd_stm32prog to log macro
Change debug and pr_ macro to log macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
eb653acd63 arm: stm32mp: migrate trace to log macro
Change debug and pr_ macro to log macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Jaehoon Chung
0a80955fc6 mmc: exynos_dw_mmc: remove unused function
Remove unused function in exynos_dw_mmc.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2021-01-13 13:49:38 +09:00
Jaehoon Chung
a654b6a5ae samsung: arndale: remove board_mmc_init function
Remove board_mmc_init function.
It will be probed with driver-model.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2021-01-13 13:49:38 +09:00
Heinrich Schuchardt
8e70f1cb3f efi_selftest: dtbdump support EFI_DT_FIXUP_PROTOCOL
The dtbdump.efi binary can already be used to dump the configuration table
with the device-tree to a file.

With this patch a device-tree file can be loaded. The EFI_DT_FIXUP_PROTOCOL
is called to

* apply U-Boot's fix-ups
* let U-Boot make memory reservations as required by the device-tree
* install the new device-tree as configuration table

In a next step this configuration table can be dumped.

A dtbdump.efi session would look like:

    DTB Dump
    ========

    => load test.dtb
    device-tree installed
    => save fixed-up.dtb
    fixed-up.dtb written
    => exit

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:01 +01:00
Heinrich Schuchardt
94686f60a2 efi_loader: implement EFI_DT_FIXUP_PROTOCOL
A boot manager like GRUB can use the protocol to

* apply U-Boot's fix-ups to the a device-tree
* let U-Boot make memory reservations according to the device-tree
* install the device-tree as a configuration table

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:01 +01:00
Heinrich Schuchardt
48618e9b8b cmd: conitrace: increase wait for next key
At 9600 baud or less a 1 ms wait is too short to detect the end of an
escape sequence.

Increase the wait duration to 10 ms which will work down to 1200 baud.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:01 +01:00
Heinrich Schuchardt
db0f298416 efi_loader: remove outdated TODO in efi_memory.c
In efi_mem_sort() adjacent memory regions of same type are coalesced.
Remove the remark "Merging of adjacent free regions is missing".

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:01 +01:00
Heinrich Schuchardt
7913c7dc57 efi_loader: typedef efi_string_t text output protocol
We do not want to use typedefs in U-Boot.

Do not use efi_string_t in the EFI_TEXT_OUTPUT_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:01 +01:00
Heinrich Schuchardt
85fc2ad4d1 efi_loader: move efi_(u)intn_t to efi.h
Move efi_intn_t and efi_uintn_t to include/efi.h to allow usage without
efi_api.h

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:01 +01:00
Heinrich Schuchardt
5f59518a7b efi_loader: setting boot device
Up to now the bootefi command used the last file loaded to determine the
boot partition. This has led to errors when the fdt had been loaded from
another partition after the EFI binary.

Before setting the boot device from a loaded file check if it is a PE-COFF
image or a FIT image.

For a PE-COFF image remember address and size, boot device and path.

For a FIT image remember boot device and path.

If the PE-COFF image is overwritten by loading another file, forget it.

Do not allow to start an image via bootefi which is not the last loaded
PE-COFF image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
ea1a9ec5f4 image-fit: fit_check_format check for valid FDT
fit_check_format() must check that the buffer contains a flattened device
tree before calling any device tree library functions.

Failure to do may cause segmentation faults.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
5dad05a0e6 efi_loader: carve out efi_check_pe()
Carve out a function to check that a buffer contains a PE-COFF image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
dd860b90ff efi_loader: print boot device and file path in helloworld
Let helloworld.efi print the device path of the boot device and the file
path as provided by the loaded image protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
bb33c79e47 efi_loader: simplify running helloworld.efi
Currently when executing 'bootefi hello' we copy helloworld.efi to the
address identified by environment variable loadaddr. This is unexected
behavior for a user. There is no need to copy helloworld.efi before
executing it after relocation.

Remove the copy action.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
4961ceefbf tools: efivar.py unused variable
Unused variables should be called '_'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
33abdb9836 tools: efivar.py should check GUID when deleting
When deleting a variable we must check that the GUID provided by the
user matches the GUID of the variable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
45c0792c02 tools: efivar.py: incorrect indentation
According to https://pep8.org/#indentation we should use 4 spaces per
indentation level.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
4f6ec7754b tools: efivar.py without arguments
When tools: efivar.py is called without arguments an error occurs:

Traceback (most recent call last):
  File "tools/efivar.py", line 380, in <module>
    main()
  File "tools/efivar.py", line 360, in main
    args.func(args)
AttributeError: 'Namespace' object has no attribute 'func'

Show the online help if the arguments do not specify a function.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
2021-01-13 02:38:00 +01:00
Heinrich Schuchardt
db12f518ed efi_loader: implement non-blocking file services
Implement services OpenEx(), ReadEx(), WriteEx(), FlushEx() of the
EFI_FILE_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-13 02:38:00 +01:00
Tom Rini
ee6726be4f Merge tag 'ti-v2021.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- DM support for OMAP PWM backlight
- USB host mode support for AM654
- Minor SPI fixes
- Add support k2g ice board with 1GHz silicon
- Fix GTC programming for K3 devices
2021-01-12 09:32:48 -05:00
Tom Rini
996f217ea3 Merge tag 'u-boot-atmel-2021.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features for 2021.04 cycle

This feature set includes the new board SAMA7G5 EK, the new evaluation
kit for Microchip AT91 SAMA7G5 SoC . The current board support includes
two configurations for booting from eMMC (SDMMC0), SD-Card (SDMMC1), and
support for two Ethernet interfaces.
2021-01-12 09:32:20 -05:00
Artem Lapkin
6bfa331a6e board: amlogic: vim3: fix setup ethernet mac from efuse
Fix reading built-in ethernet MAC address from efuse

NOTE: MAC is stored in ASCII format, 1bytes = 2characters by 0 offset

if mac from efuse not valid we use meson_generate_serial_ethaddr

NOTE: remake odroid-n2.c from Neil Armstrong <narmstrong@baylibre.com>

Signed-off-by: Artem Lapkin <art@khadas.com>
[narmstrong: remove MAC print & spurious new endline]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-12 14:25:55 +01:00
Nishanth Menon
ea3f534806 remoteproc: ti_k3_arm64: Program CNTFID0 register in GTC
ARMv8's generic timer[1] picks up it's graycode from GTC. However,
the frequency of the GTC is supposed to be programmed in CNTFID0[2]
register prior to enabling the GTC in CNTCR[3] register.

In K3 architecture, GTC provides a central time to many parts of the
SoC including graycode to the generic timer in the ARMv8 subsystem.
However, due to the central nature and the need to enable the counter
early in the boot process, the R5 based u-boot enables GTC and
programs it's frequency based on central needs of the system. This
may not be a constant 200MHz based on the system. The bootloader is
supposed to program the FID0 register with the correct frequency it
has sourced for GTC from the central system controller OR from PLLs
as appropriate, and TF-A is supposed[4] to use that as the frequency for
it's local timer.

Currently we are programming just the CNTCR[3] register to enable the
GTC, however we dont let TF-A know the frequency that GTC is actually
running at. A mismatch in programmed frequency and what we program for
generic timer will, as we can imagine, all kind of weird mayhem.

So, program the CNTFID0 register with the clock frequency. Note:
assigned-clock-rates should have set the clock frequency, so the only
operation we need to explicitly do is to retrieve the frequency and
program it in FID0 register.

Since the valid in K3 for GTC clock frequencies are < U32_MAX, we can
just cast the ulong and continue.

[1] https://developer.arm.com/documentation/100095/0002/generic-timer/generic-timer-register-summary/aarch64-generic-timer-register-summary
[2] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntfid0
[3] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntcr
[4] 6a22d9ea3c

Signed-off-by: Nishanth Menon <nm@ti.com>
2021-01-12 10:59:04 +05:30
Nishanth Menon
965db9fb0c arm: dts: k3-*-r5-*-board: Add GTC clock
Add GTC Clock definition as index 0 clock so that we can use the clock
node in the driver later on.

Signed-off-by: Nishanth Menon <nm@ti.com>
2021-01-12 10:59:04 +05:30
Pali Rohár
1ce0e1cbcc Nokia RX-51: Add test for U-Boot serial console
This patch adds a new test which checks that U-Boot for Nokia RX-51 running
in qemu can print test line to serial console and also checks that test
line appeared on qemu serial console.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
2021-01-12 10:59:04 +05:30
Pali Rohár
25c5b65178 Nokia RX-51: Do not try calling both ext2load and ext4load
Those two commands now doing same thing, reading from ext2/3/4 filesystem.
So remove useless duplicated call.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
2021-01-12 10:59:04 +05:30
Dario Binacchi
ba149a5b7b board: ti: am335x-ice: get CDCE913 clock device
With support for other clock drivers, the potentially supported CDCE913
device can no longer be probed without specifying its DT node name.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:59:04 +05:30
Dario Binacchi
260cbc9af2 video: omap: move drivers to 'ti' directory
Add drivers/video/ti/ folder and move all TI's code in this folder for
better maintenance.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:59:04 +05:30
Dario Binacchi
35ab1b6ef7 video: omap: split the legacy code from the DM code
The schedule for deprecating the features of the pre-driver-model puts
2019.17 as the deadline for the video subsystem. Furthermore, the latest
patches applied to the am335x-fb.c module have decreased the amount of
code shared with the pre-driver-model implementation. Splitting the two
implementations into two modules improves the readability of the code
and will make it easier to drop the pre-driver-model code.
I have not created a header file with the data structures and the
constants for accessing the LCD controller registers, but I preferred to
keep them inside the two c modules. This is a code replication until the
pre-driver-model version is dropped.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:59:00 +05:30
Dario Binacchi
91337f59dd video: omap: set LCD clock rate through DM API
The patch configures the display DPLL using the functions provided by
the driver model API for the clock. The device tree contains everything
needed to get the DPLL clock. The round rate function developed for
calculating the DPLL multiplier and divisor and the platform routines
for accessing the DPLL registers are removed from the LCD driver code
because they are implemented inside the DPLL clock driver.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:29 +05:30
Dario Binacchi
e58e5067fb video: omap: drop domain clock enabling by SOC api
Enabling the domain clock is performed by the sysc interconnect target
module driver during the video device probing.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:29 +05:30
Dario Binacchi
ff94c15a3c video: omap: add panel driver
The previous version of am335x-fb.c contained the functionalities of two
drivers that this patch has split. It was a video type driver that used
the same registration compatible string that now registers a panel type
driver. The proof of this is that two compatible strings were referred
to within the same driver.
There are now two drivers, each with its own compatible string,
functions and API.
Furthermore, the panel driver, in addition to decoding the display
timings, is now also able to manage the backlight.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-12 10:58:27 +05:30
Dario Binacchi
15daa4860b dm: core: add a function to decode display timings
The patch adds a function to get display timings from the device tree
node attached to the device.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-12 10:58:05 +05:30
Dario Binacchi
0f4effb05b bus: ti: am33xx: add pwm subsystem driver
The TI PWMSS driver is a simple bus driver for providing clock and power
management for the PWM peripherals on TI AM33xx SoCs, namely eCAP,
eHRPWM and eQEP.

For DT binding details see Linux doc:
- Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:05 +05:30
Dario Binacchi
ade7f0d00e pwm: ti: am33xx: add enhanced pwm driver
Enhanced high resolution PWM module (EHRPWM) hardware can be used to
generate PWM output over 2 channels. This commit adds PWM driver support
for EHRPWM device present on AM33XX SOC.

The code is based on the drivers/pwm/pwm-tiehrpwm.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:05 +05:30
Dario Binacchi
8322fdcedf arm: dts: am335x: enable scm_clocks auto binding
Adding the 'simple-bus' compatible string to the scm_clocks node will
allow its automatic binding.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:05 +05:30
Dario Binacchi
11326f3793 omap: timer: fix the rate setting
The prescaler (PTV) setting must be taken into account even when the
timer input clock frequency has been set.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:05 +05:30
Dario Binacchi
d64b9cdcd4 fdt: translate address if #size-cells = <0>
The __of_translate_address routine translates an address from the
device tree into a CPU physical address. A note in the description of
the routine explains that the crossing of any level with
since inherited from IBM. This does not happen for Texas Instruments, or
at least for the beaglebone device tree. Without this patch, in fact,
the translation into physical addresses of the registers contained in the
am33xx-clocks.dtsi nodes would not be possible. They all have a parent
with #size-cells = <0>.

The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.

The patch acts conservatively on address translation, except for
removing a check within the of_translate_one function in the
drivers/core/of_addr.c file:

+
        ranges = of_get_property(parent, rprop, &rlen);
-       if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
-               debug("no ranges; cannot translate\n");
-               return 1;
-       }
        if (ranges == NULL || rlen == 0) {
                offset = of_read_number(addr, na);
                memset(addr, 0, pna * 4);
		debug("empty ranges; 1:1 translation\n");

There are two reasons:
1 The function of_empty_ranges_quirk always returns false, invalidating
  the following if statement in case of null ranges. Therefore one of
  the two checks is useless.

2 The implementation of the of_translate_one function found in the
  common/fdt_support.c file has removed this check while keeping the one
  about the 1:1 translation.

The patch adds a test and modifies a check for the correctness of an
address in the case of enabling translation also for zero size cells.
The added test checks translations of addresses generated by nodes of
a device tree similar to those you can find in the files am33xx.dtsi
and am33xx-clocks.dtsi for which the patch was created.

The patch was also tested on a beaglebone black board. The addresses
generated for the registers of the loaded drivers are those specified
by the AM335x reference manual.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-12 10:58:05 +05:30
Dario Binacchi
52b61c944c clk: move clk-ti-sci driver to 'ti' directory
The patch moves the clk-ti-sci.c file to the 'ti' directory along with
all the other TI's drivers, and renames it clk-sci.c.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:05 +05:30
Dario Binacchi
abdf1a3571 arm: dts: am335x: enable prcm_clocks auto binding
Adding the 'simple-bus' compatible string to the prcm_clocks node will
allow its automatic binding.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
06c94c2463 clk: ti: omap4: add clock manager driver
This minimal driver is only used to bind child devices.

For DT binding details see Linux doc:
- Documentation/devicetree/bindings/arm/omap/prcm.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
215bd541b8 clk: ti: add support for clkctrl clocks
Until now the clkctrl clocks have been enabled/disabled through platform
routines. Thanks to this patch they can be enabled and configured directly
by the probed devices that need to use them.

For DT binding details see Linux doc:
- Documentation/devicetree/bindings/clock/ti-clkctrl.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
bc34f0ba83 ti: am33xx: fix do_enable_clocks() to accept NULL parameters
Up till this commit passing NULL as input parameter was allowed, but not
handled properly. When a NULL parameter was passed to the function a data
abort was raised.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-12 10:58:04 +05:30
Dario Binacchi
c28baf6c70 arm: dts: am335x: include am33xx-u-boot.dtsi
Include the SoC U-boot DTS in each am335x-<board>-u-boot.dtsi.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
58e1af972f clk: ti: add gate clock driver
The patch adds support for TI gate clock binding. The code is based on
the drivers/clk/ti/gate.c driver of the Linux kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/gate.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
ea45b8f28d clk: ti: add divider clock driver
The patch adds support for TI divider clock binding. The driver uses
routines provided by the common clock framework (ccf).

The code is based on the drivers/clk/ti/divider.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/divider.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
756d64e43e clk: ti: am33xx: add DPLL clock drivers
The digital phase-locked loop (DPLL) provides all interface clocks and
functional clocks to the processor of the AM33xx device. The AM33xx
device integrates five different DPLLs:
 * Core DPLL
 * Per DPLL
 * LCD DPLL
 * DDR DPLL
 * MPU DPLL

The patch adds support for the compatible strings:
 * "ti,am3-dpll-core-clock"
 * "ti,am3-dpll-no-gate-clock"
 * "ti,am3-dpll-no-gate-j-type-clock"
 * "ti,am3-dpll-x2-clock"

The code is loosely based on the drivers/clk/ti/dpll.c drivers of the
Linux kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/dpll.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
9d76120083 arm: ti: am33xx: add DPLL_EN_FAST_RELOCK_BYPASS macro
Add missing DPLL_EN_FAST_RELOCK_BYPASS macro. Used to put the DPLL in
idle bypass fast relock mode.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
d09f063a04 clk: ti: add mux clock driver
The driver manages a register-mapped multiplexer with multiple input
clock signals or parents, one of which can be selected as output. It
uses routines provided by the common clock framework (ccf).

The code is based on the drivers/clk/ti/mux.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/mux.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
2983ad55a1 clk: add clk_round_rate()
It returns the rate which will be set if you ask clk_set_rate() to set
that rate. It provides a way to query exactly what rate you'll get if
you call clk_set_rate() with that same argument.
So essentially, clk_round_rate() and clk_set_rate() are equivalent
except the former does not modify the clock hardware in any way.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-01-12 10:58:04 +05:30
Dario Binacchi
6337d53fdf arm: dts: sync am33xx with Linux 5.9-rc7
There have been several changes to the am33xx.dtsi, so this patch
re-syncs it with Linux.

Let's add proper interconnect hierarchy for l4 interconnect instances
with the related ti-sysc interconnect module data as documented in
Documentation/devicetree/bindings/bus/ti-sysc.txt of the Linux kernel.
With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to their
proper location and enable probing using ti-sysc.

The am33xx-clock.dtsi file is the same as that of the Linux kernel,
except for the reg property of the node l4-wkup-clkctrl@0.
As for the am33xx.dtsi file, all the devices with drivers not yet
implemented and those I was able to test with this patch have been moved
to am33xx-l4.dtsi. In case of any regressions, problem devices can be
reverted by moving them back and removing the related interconnect
target module node.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
92cc4e1c21 bus: ti: add minimal sysc interconnect target driver
We can handle the sysc interconnect target module in a generic way for
many TI SoCs. Initially let's just enable domain clocks before the
children are probed.

The code is loosely based on the drivers/bus/ti-sysc.c of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/bus/ti-sysc.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
2f59d8f2e0 dt-bindings: bus: ti-sysc: resync with Linux 5.9-rc7
Add support for PRUSS SYSC type:
The PRUSS module has a SYSCFG which is unique. The SYSCFG has two
additional unique fields called STANDBY_INIT and SUB_MWAIT in addition
to regular IDLE_MODE and STANDBY_MODE fields. Add the bindings for this
new sysc type.

Add support for MCAN on dra76x:
The dra76x MCAN generic interconnect module has a its own format for the
bits in the control registers.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:21:41 +05:30
Dario Binacchi
5688f3bf0b clk: export generic routines
Export routines that can be used by other drivers avoiding duplicating
code.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-12 10:21:41 +05:30
Felix Brack
ffa6602905 arm:pdu001: Use pseudo partition UUID for LINUX kernel boot paramter root
As more and more LINUX drivers are modified to use asynchronous probing
instead of synchronous probing, relying on device names being equal in
U-Boot and LINUX is not possible anymore. This is also true for block
device names like mmc0, mmc1 ect.
With LINUX kernel commit a1a4891 the probing type for the sdhci-omap
driver has been set to asynchronous mode too (probe_type is now
PROBE_PREFER_ASYNCHRONOUS).
In the case of the PDU001 board this results in the devices mmc0 and
mmc1 being swapped between U-Boot and LINUX. Device mmc0 in U-Boot
becomes mmc1 in LINUX an vice versa. Hence using device name identifiers
with LINUX kernel parameter root does not work anymore.
This patch changes the LINUX kernel boot parameter root to use the
pseudo (since we use MBR not GPT) partition UUID to locate the partition
hosting the root file system.

Signed-off-by: Felix Brack <fb@ltec.ch>
2021-01-12 10:21:41 +05:30
Lokesh Vutla
d2aa5727a5 board: ti: k2g: Add support for K2G ICE with 1GHz Silicon
Add board detection support for K2G ICE with FlagChip 1GHz silicon.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-01-12 10:21:41 +05:30
Praneeth Bajjuri
9c789fec10 arm: dts: k3-j721e: ddr: Update to 0.5.0 version of DDR config tool
Update the ddr settings to use the DDR reg config tool rev 0.5.0.
This enables 4266MTs DDR configuration.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2021-01-12 10:21:41 +05:30
Vignesh Raghavendra
f3f83ad4ca spi: omap3_spi: Fix speed and mode selection
McSPI IP provides per CS specific speed and mode selection. Therefore it
is possible to apply these settings only after CS is known. But
set_speed and set_mode can be called without bus being claimed, this
would lead driver to set up wrong CS (or previously used CS).

Fix this by apply set_speed and set_mode only if bus is already claimed.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
2021-01-12 10:21:41 +05:30
Ovidiu Panait
705082d4b1 spi: ti_qspi: Fix "spi-max-frequency" error path in ti_qspi_ofdata_to_platdata
struct ti_qspi_priv->max_hz is declared as unsigned int, so the following
error path check will always be false, even when "spi-max-frequency"
property is invalid/missing:
  priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1);
  if (priv->max_hz < 0) {
    ...
  }

Replace the fdtdec call with dev_read_u32_default() and use 0 as the
default value. Error out if max_hz is zero.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2021-01-12 10:21:41 +05:30
Tomas Novotny
49b4c54bc9 gpio: tca642x: fix input subcommand for gpio banks > 0
The value of input pin for bank > 0 is always 0 for input subcommand.
The reason is that gpio_bank variable is computed only for invert and
output subcommands (it depends on number of arguments). The default
value of zero causes to shift the mask away for banks > 0.

Please note that info subcommand works as expected, because the input
pin values are accessed differently.

Fixes: 61c1775f16 ("gpio: tca642x: Add the tca642x gpio expander driver")
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tomas Novotny <tomas@novotny.cz>
2021-01-12 10:21:41 +05:30
Aswath Govindraju
ba90472769 configs: am65x_evm: Define the maximum file size for DFU
In include/dfu.h, if CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then it is
defined as CONFIG_SYS_DFU_DATA_BUF_SIZE. This is 128 KiB for a53 core and
20 KiB for r5 core. If a larger file is transferred using dfu then it
fails.

CONFIG_SYS_DFU_DATA_BUF_SIZE can not be increased as there is not enough
heap memory to be allocated for the buffer in case of R5 spl.

Fix this by defining CONFIG_SYS_DFU_MAX_FILE_SIZE as the default
CONFIG_SYS_DFU_DATA_BUF_SIZE value.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-01-12 10:21:41 +05:30
Aswath Govindraju
62be2367f5 arm: dts: am654-base-board-uboot: Add aliases for USB subsystems
The sequence number assigned for USB subsystem in a uclass is dependent on
the order of occurrence in the device tree. If the dr_mode of USB3SS0
controller is varied then the sequence number of USB3SS1 controller also
changes. If aliases are added then sequence numbers are assigned using the
alias number. This makes the sequence number of USB3SS1 controller
independent of USB3SS0 controller's dr_mode.

Therefore, add aliases to fix the sequence number assigned to the USB
subsystems.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-01-12 10:21:40 +05:30
Aswath Govindraju
d3af9e3772 arm: dts: am654-base-board-uboot: Set USB0 dr_mode to host
USB3SS0 controller is to be used as a host in U-boot. Fix it by changing
the dr_mode to host.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-01-12 10:21:40 +05:30
Aswath Govindraju
6f9d41403a board: ti: am65x: Set SERDES0 mux to PCIe to use USB 2.0 interface
It has been observed that setting SERDES0 lane mux to USB prevents USB 2.0
operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is used in
USB 2.0 only mode solves this issue. However, for USB3.0+2.0 operation this
issue is not present.

Implement this workaround by writing 1 to LANE_FUNC_SEL field in
CTRLMMR_SERDES0_CTRL register.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-01-12 10:21:40 +05:30
Tom Rini
f71e574cf9 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Pinecube board support
- 64-bit FEL support
- mkimage support for eGON images (superseding mksunxiboot)
- Bluetooth BD address generation
- some fixes
2021-01-11 21:23:59 -05:00
Andre Heider
9267ff89ee sunxi: board: add a config option to fixup a Bluetooth address
Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
ship with the controller default address.

Add a config option to fix it up so it can function properly.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Ondrej Jirman <megous@megous.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[rebased]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:34 +00:00
Andre Heider
928f4f4868 sunxi: board: extract creating a unique sid into a helper function
Refactor setup_environment() so we can use the created sid for a
Bluetooth address too.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[rebased]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:34 +00:00
Jernej Skrabec
ec9cdaaa13 sunxi: dram: h6: Improve DDR3 config detection
It turns out that in rare cases, current analytical approach to detect
correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
with DDR3, incorrect DRAM configuration triggers write leveling error
which immediately stops initialization process. Exact reason why this
error appears isn't known. However, if correct configuration is used,
initalization works without problem.

In order to fix this issue, simply try another configuration when any
kind of error appears during initialization, not just those related to
rank and bus width.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Tested-by: Thomas Graichen <thomas.graichen@googlemail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:34 +00:00
Andy Shevchenko
92600edb43 sunxi: board: Move USB ethernet initialization to board_late_init()
For the sake of consistency (*) and order of initialization, i.e.
after we have got the ethernet address, interrupt and timer initialized,
try to initialize USB ethernet gadget.

*) for example, zynqmp uses same order.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:34 +00:00
Andre Przywara
0e4d5db4e0 sunxi: Add arm64 FEL support
So far we did not support the BootROM based FEL USB debug mode on the
64-bit builds for Allwinner SoCs: The BootROM is using AArch32, but the
SPL runs in AArch64.
Returning back to AArch32 was not working as expected, since the RMR
reset into 32-bit mode always starts execution in the BootROM, but not
in the FEL routine.

After some debug and research and with help via IRC, the CPU hotplug
mechanism emerged as a solution: If a certain R_CPUCFG register contains
some magic, the BootROM will immediately branch to an address stored in
some other register. This works well for our purposes.

Enable the FEL feature by providing early AArch32 code to first save the
FEL state, *before* initially entering AArch64.
If we eventually determine that we should return to FEL, we reset back
into AArch32, and use the CPU hotplug mechanism to run some small
AArch32 code snippet that restores the initially saved FEL state.

That allows the normal AArch64 SPL build to be loaded via the sunxi-fel
tool, with it returning into FEL mode, so that other payloads can be
transferred via FEL as well.

Tested on A64, H5 and H6.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Priit Laes <plaes@plaes.org> (on Olimex A64-Olinuxino)
2021-01-11 23:19:34 +00:00
Andre Przywara
00f8e9c2da sunxi: Fix is_boot0_magic macro
The is_boot0_magic macro is missing parentheses around the macro
argument, breaking any usage with a more complex argument.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:34 +00:00
Andre Przywara
acd832cd8c sunxi: Use mkimage for SPL boot image generation
Switch the SPL boot image generation from using mksunxiboot to the new
sunxi_egon format of mkimage.

Verified to create identical results for all 152 Allwinner boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2021-01-11 23:19:33 +00:00
Andre Przywara
6d295099cc tools: mkimage: Add Allwinner eGON support
So far we used the separate mksunxiboot tool for generating a bootable
image for Allwinner SPLs, probably just for historical reasons.

Use the mkimage framework to generate a so called eGON image the
Allwinner BROM expects.
The new image type is called "sunxi_egon", to differentiate it
from the (still to be implemented) secure boot TOC0 image.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-11 23:19:33 +00:00
Andre Przywara
23c0ee83aa sunxi: Factor out eGON BROM header description
To be able to easily share the Allwinner eGON BROM header structure
between the tools and the SPL code, move the struct definition into a
separate header file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2021-01-11 23:19:33 +00:00
Icenowy Zheng
ab3b53f30f sunxi: add PineCube board
PineCube is an IP camera development kit released by Pine64.

It comes with the following compoents:

- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
Ethernet port and FPC connectors for camera and daughter board.
- An OV5640-based camera module which is connected to the parallel CSI
bus of the mainboard.
- A daughterboard with several buttons, a SD slot, some IR LEDs, a
microphone and a speaker connector.

As the device tree is synchronized in a previous commit, just add it to
Makefile, create a new MAINTAINER item and provide a defconfig.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:33 +00:00
Tom Rini
d71be19902 Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-11 13:55:03 -05:00
Tom Rini
c4fddedc48 Prepare v2021.01
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-11 13:11:43 -05:00
Marek Szyprowski
aa3c7912cb board: amlogic: add MMC boot device detection for environment load
Detect eMMC or SD card boot on Odroid-C4/N2 and Khadas VIM3(l) boards and
report proper MMC device for the environment loading code. This allows to
automatically load and store environment variables on the FAT partition
or RAW offset of the MMC device without the need to use different
configurations on eMMC and SD card.

To use this feature with environment stored on FAT partition, one has to
specify an empty device part (i.e. ":1" for the first partition) in
CONFIG_ENV_FAT_DEVICE_AND_PART to let the code to set the device to the
value returned by mmc_get_env_dev() function.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:55 +01:00
Heinrich Schuchardt
d50b73643f adc: meson-saradc: use correct printf code
For printing unsigned int we have to use %u not %d.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:55 +01:00
Christian Hewitt
702b8300f0 boards: amlogic: update documentation for Beelink GT-King/Pro
Update the device matrix and add build instructions.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:55 +01:00
Christian Hewitt
d83316643c boards: amlogic: add Beelink GT-King Pro defconfig
Add a defconfig for the Beelink GT-King Pro Android STB, which is based
on the Amlogic W400 reference design.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:55 +01:00
Christian Hewitt
61fdcd510e boards: amlogic: add Beelink GT-King defconfig
Add a defconfig for the Beelink GT-King Android STB, which is based
on the Amlogic W400 reference design.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
b3be2ee656 boards: amlogic: add Beelink S922X board family support
Copied from Odroid N2. Add myself as maintainer.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
ca62ed2dac ARM: dts: import Beelink GT-King/Pro DTs from Linux 5.10
Import the Beelink GT-King/Pro and supporting meson-g12b-w400.dtsi file
from Linux 5.10.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Marek Szyprowski
d10037e976 board: amlogic: vim3: read ethernet MAC address from efuse
Add the board specific code for reading built-in ethernet MAC address
from efuse.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Marek Szyprowski
f6291a7afe configs: khadas-vim3: enable ADC device support
Analog to Digital Converter device (Meson SARADC) will be used for
probing 'Function' button state.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[narmstrong: also updated khadas-vim3l_defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Marek Szyprowski
81b1c47596 adc: meson-saradc: skip hardware init only if ADC is enabled
The driver skips hardware initialization if it is already configured by
the earlier bootloader stage (BL30). Skip the initialization only if the
hardware is really initialized and enabled.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Marek Szyprowski
220992bde8 adc: meson-saradc: add G12A variant
Add support for the SARADC variant found on the G12A SoCs family.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Marek Szyprowski
86eede9fce clk: meson: add minimal driver for g12a-ao clocks
Add minimal driver AO clocks on meson G12A family. Only ADC related clocks
are supported.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
d412a6015e boards: amlogic: update documentation for WeTek Core2
Update the device matrix and add build instructions.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2.rst to q200 MAINTAINERS and added blank lines to fix build]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
ed430519cf boards: amlogic: add WeTek Core2 support
Add a config for the WeTek Core2, largely based on the VIM2 config.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2_defconfig to q200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
d45dba838a ARM: dts: import WeTek Core2 DTs from Linux 5.10
Import the WeTek Core2 and supporting meson-gx-p23x-q20x.dtsi files
from Linux 5.10.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Pascal Vizeli
d42e7964d9 meson: Add soc_rev to environment
Add SoC revision to environment. This can be useful to select the
correct device tree at runtime (N2/N2+).

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Stefan Agner
cf47c0e23a ARM: meson: isolate loading of socinfo
Move loading of socinfo into a separate function so the value can be
reused later.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Jerome Brunet
ade0100a91 arm64: meson: add support for libretech-cc v2
Add support for the Amlogic based libretech cc version 2.
As version 1, it is based on the s905x SoC.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: Fixed libretech-cc.rst bullet points]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Jerome Brunet
4ac6946bac arm64: dts: import libretech-cc-v2 from linux v5.10-rc1
Sync the libretech cc v2 device tree from Linux v5.10-rc1
commit 3650b228f83a ("Linux 5.10-rc1")

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
c823f2438c video: add TDO tl070wsh30 panel driver
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
807b0f0851 configs: use the new MESON_EE_POWER_DOMAIN driver for Amlogic GXBB/GXL/GXM boards
Linux 5.10-rc1 uses the new generic driver, so switch to it since GXBB and
later is now supported.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
e0d0f7e422 power: domain: meson-ee-pwrc: add support for the Meson AXG SoCs
This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
ed47278e0b power: domain: meson-ee-pwrc: add support for the Meson GX SoCs
This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
ee73135365 ARM: dts: sync Amlogic GX & AXG from Linux 5.10-rc1
Synced from Linux commit 3650b228f83a ("Linux 5.10-rc1")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Lukasz Majewski
c8f2a060a1 xea: config: Disable CONFIG_SPL_OF_PLATDATA_PARENT on XEA (imx28)
On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.

In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.

With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.

When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.

As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffd.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-08 08:42:08 -05:00
Lukasz Majewski
ee66df1425 xea: config: Use CONFIG_PREBOOT from Kconfig
The usage of the preboot feature is now controlled via a separate Kconfig
option - namely CONFIG_USE_PREBOOT.
It must be enabled for preboot code executing commands now defined in
CONFIG_PREBOOT (also moved to the Kconfig).

After defining both CONFIG_USE_PREBOOT and CONFIG_PREBOOT in
imx28_xea_defconfig the define of CONFIG_PREBOOT shall be removed from
xea.h as it is redundant.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-08 08:41:55 -05:00
Lukasz Majewski
a062d8e610 xea: spl: Disable pull UP for GPIO0_2{35}
On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
enabled.

To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
disable pull UPs on both.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-08 08:41:50 -05:00
Hugh Cole-Baker
92cb207af1 rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
2021-01-08 08:40:43 -05:00
Nicolas Ferre
aeaef07c51 ARM: dts: sama7g5ek: fix TXC pin configuration
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
05176cd08f configs: sama7g5ek: add i2c and eeprom
Add drivers for flexcom, i2c and eeproms

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
a07d2a1121 board: atmel: sama7g5ek: add support for MAC address retreival
Obtain two MAC addresses from the two EEPROMs and configure the two
available Ethernet interfaces accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
9b614c87bb ARM: dts: sama7g5ek: add i2c1 bus and eeproms
Add node for flx1 i2c1 subnode (and alias to bus 0)
This bus has two eeprom devices connected.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
1c629fd033 ARM: dts: at91: sama7g5: add flexcom1 and i2c subnode
Add flexcom1 and i2c subnode.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
0f8904b82d configs: sama7g5: add mmc config for sdmmc0
Add new config for storing environment from sdmmc0.
Also clean-up sama7g5ek_emmc1 to point to the proper mmc device.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
d05223eb5a board: atmel: sama7g5ek: clean-up header bootcommand
Clean-up boot command to use the predefined device and part for FAT
environment.
According to this device and partition, select the proper boot media.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
7f4c89cc5c ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl
Enable sdmmc0 on this board. A non-removable eMMC is connected on this
block.
Configure pincontrol accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
523c10c1fd ARM: dts: at91: sama7g5: add node for sdmmc0
Add node for sdmmc0 block.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
9b6f157e19 ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1
SDMMC1 requires clock specification with assigned-clocks, such that
the PMC will know which parent to assign and the initial start-up frequency.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Claudiu Beznea
b17a268a8c configs: sama7g5ek: enable CCF
Enable CCF for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:16 +02:00
Claudiu Beznea
a5077825c3 configs: sama7g5ek: enable support for KSZ9131
Enable support for KSZ9131.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
6b2bcfcad3 board: atmel: sama7g5ek: increase arp timeout and retry count
Increase ARP timeout and retry count as this will increase
the speed of communication.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3e5853e6a1 ARM: dts: sama7g5: add GMAC1
Add GMAC1.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
e95af87e9b ARM: dts: sama7g5: add GMAC0
Add GMAC0.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
02dae80ee4 configs: sama7g5ek: enable mii command
Enable mii command as ethernet's PHY specific programming is
based on it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
7d41a8da84 ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3
Add pinctrl for sdmmc1 and flx3.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
47a13af586 ARM: dts: at91: sama7g5: add pinctrl node
Add pioA pinctrl node.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
b032230f87 ARM: dts: sama7g5: add pit64b support
Add DT bindings for PIT64B driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
2efb34314d ARM: dts: sama7g5: enable autoboot
Enable autoboot.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
dd2cf752d1 configs: sama7g5: use PIT64B
Use PIT64B driver. ATMEL_PIT is not available for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
13f986b748 ARM: dts: sama7g5: add CPU bindings
Add CPU DT bindings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
2942a2f9d5 configs: sama7g5: enable CONFIG_CPU
Enable CONFIG_CPU.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
394f520709 ARM: dts: sama7g5: switch to PMC bindings
Get rid of software defined MCK and switch to PMC bindings
for IPs currently present in device tree.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
33fa0b6cef ARM: dts: sama7g5: add PMC bindings
Add DT bindings for PMC driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
09f19f7770 ARM: dts: sama7g5: add slow clock bindings
Add DT bindings for slow clock driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
072c975940 ARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals
Add dm-pre-reloc DT binding property for cristals.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
5e19ade9e5 ARM: dts: sama7g5: add slow rc and main rc oscillators
Add slow rc and main rc oscillators to dtsi.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3b86096a59 ARM: dts: sama7g5: move clock frequencies for xtals in board file
Move clock frequencies for crystals on board specific files.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3a2be103b0 configs: sama7g5ek: enable pll driver
Enable PLL driver for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
86eeab7d89 configs: sama7g5ek: set malloc pool to 68K
Set malloc pool to 68K for sama7g5ek.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
ac3740c9f2 board: atmel: sama7g5ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
1d463d6735 board: atmel: sama7g5ek: add initial support for sama7g5ek
Add initial support for sama7g5 evaluation kit board.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
626879b794 ARM: dts: sama7g5: add initial DT for sama7g5 SoC
Add initial basic devicetree for sama7g5 SoC

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Nicolas Ferre
2bc7e12e01 arm: at91: configs: Enable CONFIG_SYS_NAND_USE_FLASH_BBT on all boards
As highlighted by Stefan in the commit e074d0f79b ("arm: at91:
gardena-smart-gateway-at91sam: Enable CONFIG_SYS_NAND_USE_FLASH_BBT")
it's important to use BBT when Linux enables it. We use it for a long
time on all our boards.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
2021-01-07 09:43:51 +02:00
Tom Rini
bc0b99bd8b Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.04

arm64:
- DT updates

microblaze:
- Add support for NOR device support

spi:
- Fix unaligned data write issue

nand:
- Minor code change

xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards

video:
- Add support for seps525 spi display

tools:
- Minor Vitis file support

cmd/common
- Minor code indentation fixes

serial:
- Uartlite debug uart initialization fix
2021-01-06 07:57:33 -05:00
Tom Rini
b8c725e736 Merge tag 'u-boot-stm32-20210106' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fix GPIO hog flags on DHCOM boards
2021-01-06 07:48:19 -05:00
Marek Vasut
ec4efd5ae7 ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the
correctness of the DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-06 11:01:31 +01:00
Marek Vasut
1a6de002e5 ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-06 11:01:31 +01:00
Tom Rini
b11f634b1c Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next
Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Tom Rini
c2d80bbde8 Merge tag 'ti-v2021.01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix I2C speed for Nokia RX51
2021-01-05 16:10:33 -05:00
Simon Glass
970349a96d dtoc: Tidy up src_scan tests
Some of these tests don't actually check anything. Add a few more checks
to complete the tests.

Also add a simple scan test that does the basics.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
10ea9c0b05 dtoc: Move src_scan tests to a separate file
Move the tests related to scanning into their own class, updating them
to avoid using dtb_platdata as a pass-through.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
a542a70c22 dtoc: Split source-code scanning to a separate file
Before expanding the scanning features any more, move this into a separate
file. This will make it easier to maintain in the future. In particular,
it reduces the size of dtb_platdata.py and allows us to add tests
specifically for scanning, without going through that file.

The pieces moved are the Driver class, the scanning code and the various
naming functions, since they mostly depend on the scanning results.

So far there is are no separate tests for src_scan. These will be added
as new functionality appears.

This introduces no functional change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
d960f0db28 dtoc: Drop dm_populate_phandle_data()
This has not been needed since parent information was added and we started
using indicies for references to other drivers instead of pointers. It was
kept around in the expectation that it might be needed later.

However with the latest updates, it doesn't seem likely that we'll need
this in the foreseeable future.

Drop dm_populate_phandle_data() from dtoc and driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
9eca08dc59 dtoc: Output nodes in order
Previously we had to worry about nodes being output before those that they
depended on, thus causing build errors.  So the current algorithm is
careful to output nodes in the right order.

We now use a different method for outputting phandles that does not
involve pointers. Also we plan to add a 'declarations' header file to
declare all drivers as 'extern'.

Update the code to drop the dependency checking and output in a simple
loop. This makes the output easier to follow since drivers are in order of
thier indices (0, 1, ...), which is also the order it appears in in the
linker list.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
1e0f3f46bd dtoc: Allow specifying the base directory for tests
The base directory of U-Boot, where the source is, it currently calculated
from the directory of the dtb_platdata.py script. If this is installed
elsewhere that will not work. Also it is inconvenient for tests.

Add a parameter to allow specifying this base directory.

To test this, pass a temporary directory with some files in it and check
that they are passed to scan_driver().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
a7d5f96ef1 dtoc: Add the method for each command to OutputFile
Rather than the if/else construct, update OutputFile with the method to
call to process each command. This is easier to maintain as the number of
commands increases.

Rename generate_tables to generate_plat since it better describes what is
being generated ('plat' is the U-Boot name for platform data).

With this, each output method needs to have the same signature. Store the
output structures in a member variable instead of using parameters, to
accomplish this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
f31fa99a9e dtoc: Rename dt-platdata.c to dt-plat.c
Use this new name to be consistent with the rest of U-Boot, which talks
about 'plat' for the platform data, which is what this file holds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
d1055d681a dtoc: Add a header comment to each generated file
It is currently fairly obvious what the two generated files are for, but
this will change as more are added. It is helpful for readers to describe
the purpose of each file.

Add a header commment field to OutputFile and use it to generate a comment
at the top of each file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
5d9a3aa99c dtoc: Run tests using test_util
Use the standard function for running tests and reported results. This
allows the tests to run in parallel, which is a significant speed-up on
most machines (e.g. 4.5 seconds -> 1.5s on mine).

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
fe2400895b concurrencytest: Fix Python3 warning
This gives a warning in some situations:

  File "tools/dtoc/../concurrencytest/concurrencytest.py", line 95,
       in do_fork
    stream = os.fdopen(c2pread, 'rb', 1)
  File "/usr/lib/python3.8/os.py", line 1023, in fdopen
    return io.open(fd, *args, **kwargs)
RuntimeWarning: line buffering (buffering=1) isn't supported in binary
    mode, the default buffer size will be used

Fix this by dropping the line-buffer parameter.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
bdf8fd76c0 dm: Rename U_BOOT_DRIVER_ALIAS to DM_DRIVER_ALIAS
We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but
in every other case we just use DM_. Update the alias macros to use the
DM_ prefix.

We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro
is widely used and there is at least some benefit to indicating it us a
U-Boot driver, particularly for code ported from Linux. So for now, let's
keep that name.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
65e25bea59 dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
8629d30a32 dm: Rename DM_GET_DEVICE() to DM_DRVINFO_GET()
This does not get a device (struct udevice *) but a struct driver_info *
so the name is confusing.

Rename it accordingly. Since we plan to have several various of these
macros, put GET at the end instead of the middle, so it is easier to spot
the related macros.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
20e442ab2d dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
be3bd3bb17 Makefile: Invoke dtoc only once
Update the Makefile to run dtoc only once, generating all required files.
This saves time since there is a lot of processing in each invocation of
dtoc.

We already have a variable for the object files to build, so use that
instead of repeating the same filenames. Add a C version of this also,
for the same reason.

This makes it easier to add new C files (generated by dtoc) to the build
later, as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
10cbd3b7da dtoc: Add an 'all' command
With upcoming changes, dtoc will output several files for different
of-platdata components.

Add a way to output all ava!ilable files at once ('all'), to the
appropriate directories, without needing to specify each one invidually.

This puts the commands in alphabetical order, so update the tests
accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
be44f27156 dtoc: Allow outputing to multiple files
Implement the 'output directory' feature, allowing dtoc to write the
output files separately to the supplied directories. This allows us to
handle the struct and platdata output in one run of dtoc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
192c111cfc dtoc: Allow providing a directory to write files to
At present dtoc writes only a single file on each invocation. U-Boot
writes the two files it needs by separate invocations of dtoc. Since dtoc
now scans all U-Boot driver source, this is fairly slow (about 1 second
per file).

It would be better if dtoc could write all the files at once.

In preparation for this, add a way to specify an output directory for the
files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
de846cbb30 dtoc: Test the stdout output
Normally dtoc outputs to a file but it also offers a way to write output
to stdout. At present the test for that does not actually check that the
output is correct. Add this to the test.

This uses a member variable to hold the expected text, so it can be used
in muitiple places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
f62cea0e20 dtoc: Use None to mean stdout
At present dtoc uses '-' internally to mean that output should go to
stdout. This is not necessary and None is more convenient. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
67b5ec54a5 dtoc: Tidy up pylint warnings in test
Tidy up this file to reduce the number of pylint warnings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
97e8684c84 dm: core: Add logging when lists_bind_fdt() fails
It is useful to see the error code when this fails. Add logging for this
function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8a715530bb dm: core: Allow the uclass list to move
At present the uclass list head is in global_data. This is convenient
but with the new of-platdata we need the list head to be declared by
the generated code.

Change this over to be a pointer. Provide a 'static' version in
global_data to retain the current behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
49bbe6eab5 dm: core: Split out scanning code to dm_scan()
Move the code related to scanning for devices to bind, into a new
function. This will make it easier to skip this step with the new
of-platdata improvements.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
84a42ae366 dm: core: Rename device node to indicate it is private
To avoid having people accidentally access this member, add a trailing
underscore. Also remove it when of-platdata is enabled, since it is not
used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
f10643cf8a dm: core: Access device ofnode through functions
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
7d14ee443c dm: core: Use dev_has_ofnode() instead of dev_of_valid()
We have two functions which do the same thing. Standardise on
dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in
normal operation: it is either null or missing.

Also move the functions into one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Simon Glass
c23405f817 dm: core: Rename dev_has_of_node() to dev_has_ofnode()
We use 'ofnode' rather than 'of_node' in U-Boot. Rename this function to
fit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
156004f863 dm: core: Rename device flags to indicate it is private
To avoid having people accidentally access this member, add a trailing
underscore.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
73466df3e2 dm: core: Access device flags through functions
At present flags are stored as part of the device. In preparation for
storing them separately, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
2462139fdd dm: core: Rename sqq to seq_
Now that the sequence-numbering migration is complete, rename this member
back to seq_, adding an underscore to indicate it is internal to driver
model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Simon Glass
82021e31a7 dm: core: Split out alloc code into a new function
Add a new function to handle the allocation of private/platform data for
a device. This will make it easier to skip this feature when using the new
of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
e7144b07e4 x86: Drop rtc from SPL
The RTC is not currently used in SPL. Drop it so that it does not take up
space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
a59f3d230e x86: coral: Remove unwanted nodes from SPL/TPL
Some devices are not needed in SPL/TPL. For TPL this causes the
generation of unnecessary of-platadata structs. Make some adjustments to
fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
21303d1de7 x86: apl: Adjust how the UART gets its platform data
At present this driver calls malloc() to start a new platform data
structure, fills it in and tells driver model to use it.

We want to avoid malloc, particularly with the new version of of-platdata.
Create a new struct which encompasses both the dtd struct and the ns16550
one, to avoid this. Unfortunately we must copy the data into the right
place for the ns16550 driver. Add some comments about this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
6a2350f8c9 x86: sysreset: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them and add the dtd struct too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Simon Glass
6563b205eb dm: core: Move priv/plat structs for simple_bus to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
332b98660f x86: apl: Use struct spi_nor instead of struct spi_flash
This construct effectively uses struct spi_nor due to a #define in
spi-nor.h so we may as well use that struct here. This allows dtoc to
parse it correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
a1a8a63385 spi: Tweak a few strange SPI NOR features for of-platdata
The #define of one struct to another has been around for a while. It
confuses dtoc and makes it think that struct spi_flash does not exist.

Make a few changes to improve things while we wait for migration to be
completed:

- Move the 'struct spi_flash' to column 1 so dtoc scans it
- Remove the #define when compiling dt-platdata.c
- Update the strange mtd_get/set_of_node() functions
- Use struct spi_nor in the drivers, so dtoc sees the correct struct

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
e2a7cfe9d5 spi: Tidy up get/set of device node
This code is a bit odd in that it only reads and updates the livetree
version of the device ofnode. This means it won't work with flattree.
Update the code to work as it was presumably intended.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
a53f6fad7e x86: spl: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
f6257f7914 x86: Move priv/plat structs for intel_common to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
366c4eb4b5 x86: apl: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
370746ada7 sandbox: Update dts files to reduce SPL size
At present there are require a few devices in the devicetree which are
not actually used in SPL. This will cause problems with the new
of-platdata, since it will try to instantiate devices which are not
compiled into U-Boot.

Update the devicetree to remove these devices from SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
b060333567 sandbox: Add a compatible string for spltest
At present this driver does not have a compatible string. For it to be
used with the coming of-platadata, it must have one. Update it
accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
f05a7c5ba4 sandbox: i2c: Move priv into a header file
Move this struct into a header file so that dtoc can include it in its
dt-platdata.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
bfae6cc48a sandbox: serial: Move priv into a header file
Move this struct into a header file so that dtoc can include it in its
dt-platdata.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Patrick Delaunay
10bb90fa30 sandbox: remove ram buffer file when U-Boot is loaded by SPL
Update management of "--rm_memory" sandbox's option and force
this option when U-Boot is loaded by SPL in os_spl_to_uboot()
and remove the ram file after reading in main() as described
in option help message: "Remove memory file after reading".

This patch avoids that the file "/tmp/u-boot.mem.XXXXXX" [created in
os_jump_to_file() when U-Boot is loaded by SPL] is never deleted
because state_uninit() is not called after U-Boot execution
(CtrlC or with running pytest for example).

This issue is reproduced by
> build-sandbox_spl/spl/u-boot-spl
  and CtrlC in U-Bot console

> make qcheck

One temp file is created after each SPL and U-Boot execution
(7 tims in qcheck after test_handoff.py, test_ofplatdata.py,
 test_spl.py execution).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
941e6304f4 x86: Fix header guard in asm/pmu.h
This has the wrong name. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
cee58bd2ad x86: tpl: Remove unwanted devicetree string
Update this driver to use of_match_ptr().

This reduces the TPL binary size by about 32 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
53d59694ce x86: pinctrl: Drop unlikely error messages from TPL
These errors are only really for development purposes. Drop them to reduce
the size of TPL. The error numbers are still reported.

This reduces the TPL binary size on coral by about 160 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8b842be10c x86: apl: Reduce size for TPL
Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.

This reduces the TPL binary size by about 608 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
5e89be1efd x86: apl: Update hostbridge to remove unwanted TPL code
At present several strings from this file appear in the TPL binary. Add
preprocessor checks to drop them.

This reduces the TPL binary size by about 128 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
1d2b8585f6 x86: coral: Move fsp-m settings to a subnode
At present these settings are in the node for host-bridge and so are
visible in TPL as well as SPL. But they are only used for SPL.

Move them to a subnode so that TPL does not included them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
7dc82591d6 x86: Move call64 into its own section
When this code is not used (e.g. by TPL) we want it to be excluded from
the image. Put it in its own section so that this happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
52d2e9c142 x86: apl: Use const for driver operations
Update these declarations to const to ensure that the data ends up in the
rodata section.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
7d637c122d dtoc: Convert _drivers to a dict
At present this member holds a simple list of driver names. Update it to
be a dict of DriverInfo, with the name being the key. This will allow more
information to be added about each driver, in future patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
161dac1dd8 dtoc: Output the struct values in a separate function
Reduce the length of output_node() futher by moving the struct-output
functionality into a two separate functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
221ddc1158 dtoc: Output the device in a separate function
Reduce the length of output_node() by moving the device-output
functionality into a separate function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
abf0c80292 dtoc: Make _output_list a top-level function
It is annoying to have this function inside its parent since it makes the
parent longer and hard to read. Move it to the top level.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
ccc3da77ae dtoc: Fix a few pylint warnings in dtb_platdata
These have crept in again. Update the file to fix all but these ones:

   dtb_platdata.py:143:0: R0902: Too many instance attributes (10/7)
      (too-many-instance-attributes)
   dtb_platdata.py:713:0: R0913: Too many arguments (6/5)
      (too-many-arguments)

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
079ac59586 test: Move some test drivers into their own file
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.

A few adjustments are needed so this driver can build for sandbox_spl as
well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
3f8760824e test: Use a simple variable to record removed device
At present the entire test state is effective passed into a test driver
just to record which device was removed. This is unnecessary and makes it
harder to track what is going on.

Use a simple boolean instead.

Also drop the unused 'removed' member while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
6d1a8ebefb timer: Use a shorter error in TPL
This error should not happen in normal use. Reduce the length of it to
save space in the image.

Add an empty spl.h file to sh since it appears to lack this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
477a6bcb3b arc: m68k: nds32: nios2: sh: xtensa: Add empty spl.h header
At present it is not possible to include spl.h in on these architectures
since the asm/spl.h file is not present. We want to be able to use the
spl_phase() function, so add empty headers to make things build.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
4c66cb4a78 sysreset: Use a shorter error with SPL
Use a minimal error message to save space. Sort the header files while we
are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
c8fbf3089b pinctrl: Drop post_bind() method when not needed
This is not used with of-platdata, so remove it in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
fb8c9fb3fa dm: core: Rename the priv/plat members
These are supposed to be private to driver model, not accessed by any code
outside. Add a trailing underscore to indicate this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
89ba6d5535 dm: core: Use access methods for dev/uclass private data
Use these functions in the core code as much as possible. With this, there
are only two places where each priv/plat pointer is accessed, one for read
and one for write.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
0fd3d91152 dm: Use access methods for dev/uclass private data
Most drivers use these access methods but a few do not. Update them.

In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-01-05 12:24:40 -07:00
Simon Glass
12559f5bab dm: core: Add functions to set priv/plat
This should not normally be needed in drivers, but add accessors for the
few cases that exist.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
806473933a dm: core: Add function to access uclass priv
Add functions so this information is not accessed directly. This will be
needed for of-platdata which stores it in a different place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
c238eeebc9 x86: apl: Drop support for !OF_PLATDATA_PARENT
This code was kept around after of-platdata started supporting parent
devices. That feature seems stable now, so let's drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
79ea8f749d dm: core: Only include simple-bus devicetree id when needed
This is not needed when of-platdata is in use. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
9c503137b7 dm: core: Use 'uclass_driver' for the uclass linker_list
At present the name 'uclass_driver' is used for the uclass linker list.
This does not follow the convention of using the struct name. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
45ad176a76 dm: core: Support dm_dump_all() in SPL
At present the output from this function is hard to read in SPL, due to
(intended) limitations in SPL's printf() function. Add an SPL version so
it is clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
38d6b7ebda spl: Drop bd_info in the data section
This uses up space in the SPL binary but it always starts as zero. Also
some boards cannot support data in TPL (e.g. Intel Apollo Lake).

Use malloc() to allocate this structure instead, by moving the init a
little later, after malloc() is inited. Make this function optional since
it pulls in malloc().

This reduces the TPL binary size on coral by about 64 bytes

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
acfb5308f5 sandbox: Drop unnecessary test node
The spl-test4 node deliberately has an invalid compatible string. This
causes a warning from dtoc and the check it does is not really necessary.
Drop it, to avoid the warning and associated confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
2d6bf754ce serial: Rename ns16550 functions to lower case
Lower case should be used for function names. Update this driver and its
callers accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Simon Glass
d30c7209df serial: Update NS16550_t and struct NS16550
Typedefs should not be used in U-Boot and structs should be lower case.
Update the code to use struct ns16550 consistently.

Put a header guard on the file while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Simon Glass
aa88ac884c Makefile: Use common args for dtoc
At present the dtoc commmand line is repeated twice in the Makefile. Use a
variable to avoid this, so it is easier to add more conditional arguments.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
c7674fcb07 Makefile: Tidy up SPL dtb production
Use the SPL_NAME variable to simplify the rules. Drop the SPL targets
clean-files since the SPL and TPL dts/ directories are removed by
existing rules. Move the SPL rules into a new spl_dtbs to avoid the
complicated $(if) construct.

Also drop unused pieces from the 'targets' variable.

With this, SPL and TPL have separate dtbs which respect the various
u-boot,dm-spl / u-boot,dm-tpl tags.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
de3e372abd Makefile: Build SPL dtbs in the spl/ directory
Rather than putting these in the top-level dts/ directory (which is
intended for U-Boot proper), put them in the correct subdirectory for
SPL (either spl/ or tpl/). This is where other SPL targets are kept,
so this is more consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
53db2eec7a Makefile: Build a separate .dtb for TPL
At present both SPL and TPL use the same devicetree binary. While there
is logic to run fdtgrep separately on each one, it does not actually
happen.

Add a new TPL rule and use that instead. Make this rule conditional on
there actually being a TPL. Do the same for SPL for consistency.

Note that the SPL and TPL dtbs are build by a Makefule rule used for
U-Boot proper. This is the 'dtbs' target in dts/Makefile. So the check
for CONFIG_TPL_BUILD in cmd_fdtgrep never actually works at present.

We don't support CONFIG_OF_EMBED for TPL at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Pali Rohár
a8ef64e4ef Nokia RX-51: Decrease i2c speed to 100000
It looks like that i2c bus lot of times timeout on some units. Prior
migration to CONFIG_DM_I2C i2c speed was set to CONFIG_SYS_OMAP24_I2C_SPEED
value which was 100000. Lower speed fixes timeout problems, so change speed
back to its previous value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 8d8c181703 ("Nokia RX-51: Convert to CONFIG_DM_I2C")
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-01-05 20:49:52 +05:30
Sebastian Reichel
d8ab0fe5b5 image: support board_fit_config_name_match
Support reusing board_fit_config_name_match() to automatically
select a sensible default configuration for booting fitImages
using 'bootm'.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-01-05 08:21:48 -05:00
Sebastian Reichel
f14e6eec6c image: cleanup pre-processor usage
Replace most #ifdef checks for USE_HOSTCC and CONFIG_*
with normal if instructions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-01-05 08:21:48 -05:00
Tom Rini
62b07b5173 Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 07:30:39 -05:00
Michal Simek
0109db1cd1 xilinx: Fill git repository for Xilinx boards
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Michal Simek
5337663e5b video: Call video_sync in video_clear()
There is a need to call sync when anybody asking for clearing display.
For example via cls command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Michal Simek
b66d7af41f video: seps525: Add seps525 SPI driver
Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display
using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB
160x128 display. This driver has been tested through zynq-spi driver.

ZynqMP> load mmc 1 100000 rainbow.bmp
61562 bytes read in 20 ms (2.9 MiB/s)
ZynqMP> bmp info 100000
Image size    : 160 x 128
Bits per pixel: 24
Compression   : 0
ZynqMP> bmp display 100000
ZynqMP> setenv stdout vidconsole

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Vikhyat Goyal
1ac1a04b9e video: seps525: Add dt binding description
Added dt binding for seps525 display driver.

Signed-off-by: Vikhyat Goyal <vikhyat.goyal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Michal Simek
9d69c2d9a8 video: Introduce video_sync operation
Some drivers like LCD connected via SPI requires explicit sync function
which copy framebuffer content over SPI to controller to display.
This hook doesn't exist yet that's why introduce it via video operations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Michal Simek
9de731f295 video: Let video_sync to return error value
This patch is preparation for follow up one to support cases where
synchronization can fail.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Michal Simek
17da310ac4 video: Fix video sync kernel-doc format
Place description below function parameters to make kernel-doc stript
happy. Also rename dev to vid to be aligned with function parameters.

Fixes: 1acafc73bf ("dm: video: Add a video uclass")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Heinrich Schuchardt
b6d14c52f9 fru: ops: avoid out of bounds access
Building xilinx_zynq_virt_defconfig fails on origin/next as reported by
GCC 10.2 (as provided by Debian Bullseye):

  CC      board/xilinx/common/fru_ops.o
board/xilinx/common/fru_ops.c: In function ‘fru_capture’:
board/xilinx/common/fru_ops.c:173:8:
error: array subscript 284 is outside array bounds of
‘struct fru_table[1]’ [-Werror=array-bounds]
  173 |  limit = data + sizeof(struct fru_board_data);
      |  ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
board/xilinx/common/fru_ops.c:17:18: note: while referencing ‘fru_data’
   17 | struct fru_table fru_data __section(.data);
      |                  ^~~~~~~~

When using sizeof(struct fru_board_data) to find the end of the structure
you should add it to the start of the structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Heinrich Schuchardt
389b45d6b0 zynq: mtd: nand: remove superfluous if
This sort of code does not make much sense:

    if (ondie_ecc_enabled) {
        if (ondie_ecc_enabled) {

Remove the inner if.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Harini Katakam
0e3a7aa7a9 arm64: zynqmp: Add Ethernet node for zcu1285 revA
This patch add ethernet node gem1 to zcu1285 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Siva Durga Prasad Paladugu
59fbd5c1f8 arm64: zynqmp: Add ethernet node for zcu1275 revB
This patch add ethernet node gem1 to zcu1275 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:44 +01:00
Tom Rini
2e57549a9c Merge branch '2021-01-04-minor-fixes'
- Assorted fixes
2021-01-04 09:11:35 -05:00
Marc Ferland
acff02c6dd cosmetic: fix typo in drivers/usb/Kconfig
This commit fixes a simple typo: sPL --> SPL.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
2021-01-04 09:10:17 -05:00
Philippe Reynes
1639988fa4 cmd: ubi: don't allow to rename a volume to a name that already exist
This commits add a check on the command ubi rename. This check avoids
to rename a volume to with a name that is already used on another ubi
volume. If two volumes has the same name, then the ubi device can't be
mounted anymore.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2021-01-04 09:10:17 -05:00
Igor Opaniuk
19408a397c mailmap: Update mail address for Igor Opaniuk
My address at Toradex doesn't exist anymore, map this address
to my personal email.

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-04 09:10:16 -05:00
Heinrich Schuchardt
51549711b5 doc: android/boot-image: invalid C declaration
make htmldocs results in an error:

doc/android/boot-image.rst:33:
WARNING: Unparseable C cross-reference: 'struct andr_img_hdr'
Invalid C declaration: Expected identifier in nested name, got keyword:
struct [error at 6]

Follow the style prescribed in
https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html#highlights-and-cross-references

Add missing definite article.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-04 09:10:16 -05:00
Stefan Agner
71fd11b901 nvme: Use only 32-bit accesses in nvme_writeq/nvme_readq
There might be hardware configurations where 64-bit data accesses
to NVMe registers are not supported properly.  This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit NVMe registers, similarly as it is done in Linux kernel.

This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC
based board, where the PCIe Root Complex, which is attached to the
system through the SCB bridge.

Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
nvme_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail
probing.

This fix is analogous to commit 8e2ab05000 ("usb: xhci: Use only
32-bit accesses in xhci_writeq/xhci_readq").

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-01-04 09:10:16 -05:00
T Karthik Reddy
90217487a1 spi: zynqmp_gqspi: Fix unaligned data writes issue
When unaligned 3 bytes data write operation is performed, 3rd byte
is being over written by 1st byte of 3 bytes data. This patch
fixes it.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
T Karthik Reddy
6b80de790c microblaze: Add nor device to distro boot
Add parallel nor device to distroboot for microblaze.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
T Karthik Reddy
5766429b7c microblaze: Set script_offset_nor env variable
Set script_offset_nor env variable using CONFIG_BOOT_SCRIPT_OFFSET
and nor flash start address to keep bootscript offset configurable.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
Michal Simek
2d381d2fe2 arm64: zynqmp: Sync DT with Linux kernel
All changes are recorded in lore.kernel.org. Here are links to that patches
for the record.
Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/20200629081744.13916-1-krzk@kernel.org

And there are other minor changes (just moving things around).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
Ashok Reddy Soma
e5e8bbd25a serial: uartlite: Fix uninitialized ret in debug uartlite
Endianness detection is checked against uninitialized ret variable.
Assign ret with read value from status register to fix this.

Fixes: 31a359f87e ("serial: uartlite: Add support to work with any endianness")
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:26 +01:00
Michal Simek
d91a652cfd common: usb_storage: Fix code indentation
Reported by smatch like:
common/usb_storage.c:430 us_one_transfer() warn: inconsistent indenting

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:26 +01:00
Michal Simek
e7fcfef431 cmd: load: Fix code indentation
Reported by smatch like:
cmd/load.c:228 read_record() warn: inconsistent indenting

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-04 10:51:26 +01:00
Adrian Fiergolski
d42ab39f58 tools: zynqmp: Fix regex expression around XPm_ConfigObject
The XPm_ConfigObject array definition generated by Vitis 2020.1 differs
from previous Vivado versions (before 2019.2).

-const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) = {
+const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) =
+#elif defined (__ICCARM__)
+#pragma location = ".sys_cfg_data"
+__root const u32 XPm_ConfigObject[] =
+#endif
+{

Change the matching regex to handle both cases.

Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:26 +01:00
Tom Rini
c86b18074c Merge tag 'efi-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi into next
Pull request for UEFI sub-system for next

* UEFI capsule authentication
* UEFI capsule update on QEMU ARM
* fsuuid command for FAT file system
* bug fixes
2020-12-31 22:28:09 -05:00
Sughosh Ganu
c35df7c9e4 qemu: arm64: Add documentation for capsule update
Add documentation highlighting the steps for using the uefi capsule
update feature for updating the u-boot firmware image.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
7407595286 efidebug: capsule: Add a command to update capsule on disk
Add a efidebug subcommand to initiate a firmware update using the efi
firmware management protocol(fmp) set_image routine.

The firmware update can be initiated through

'efidebug capsule disk-update'

This would locate the efi capsule file on the efi system partition,
and call the platform's set_image fmp routine to initiate the firmware
update.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
88a2ef2720 efi_loader: Enable uefi capsule authentication
Add support for enabling uefi capsule authentication. This feature is
enabled by setting the environment variable
"capsule_authentication_enabled".

The following configs are needed for enabling uefi capsule update and
capsule authentication features on the platform.

CONFIG_EFI_HAVE_CAPSULE_SUPPORT=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT=y
CONFIG_EFI_CAPSULE_FIRMWARE=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_EFI_CAPSULE_AUTHENTICATE=y

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
04be98bd6b efi: capsule: Add support for uefi capsule authentication
Add support for authenticating uefi capsules. Most of the signature
verification functionality is shared with the uefi secure boot
feature.

The root certificate containing the public key used for the signature
verification is stored as part of the device tree blob. The root
certificate is stored as an efi signature list(esl) file -- this file
contains the x509 certificate which is the root certificate.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
b4f20a5d83 efi_loader: Re-factor code to build the signature store from efi signature list
The efi_sigstore_parse_sigdb function reads the uefi authenticated
variable, stored in the signature database format and builds the
signature store structure. Factor out the code for building
the signature store. This can then be used by the capsule
authentication routine to build the signature store even when the
signature database is not stored as an uefi authenticated variable

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
201b8068f3 efi_loader: Make the pkcs7 header parsing function an extern
The pkcs7 header parsing functionality is pretty generic, and can be
used by other features like capsule authentication. Make the function
an extern, also changing it's name to efi_parse_pkcs7_header

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
65f3fc18fc dfu_mtd: Add provision to unlock mtd device
Prior to writing to an mtd device, mtd_erase is called. This call
fails in case the sector being erased is locked. Call mtd_unlock to
unlock the region which is to be erased and later written to. Lock the
region once the write to the region has completed.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
675b62e12f efi_loader: Add logic to parse EDKII specific fmp payload header
When building the capsule using scripts in edk2, a fmp header is
added on top of the binary payload. Add logic to detect presence of
the header. When present, the pointer to the image needs to be
adjusted as per the size of the header to point to the actual binary
payload.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
ab201a116f fsp: Move and rename fsp_types.h file
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
cc02f15faa qemu: common: Set dfu_alt_info variable for the platform
The dfu framework uses the dfu_alt_info environment variable to get
information that is needed for performing the firmware update. Add
logic to set the dfu_alt_info for the qemu arm64 platform to reflect
the two mtd partitions created for the u-boot env and the firmware
image. This can be subsequently extended for other qemu architectures
which need this variable set.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
c89a9873fd qemu: common: Add support for dynamic mtdparts for the platform
Add support for setting the default values for mtd partitions on the
platform. This would be used for updating the firmware image using
uefi capsule update with the dfu mtd backend driver.

Currently, values have been defined for the qemu arm64 platform, with
default values defined for the mtd partitions based on the NOR
flash. This can be subsequently extended for other qemu architectures
which need mtdparts set.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
4366a2440a crypto: Fix the logic to calculate hash with authattributes set
RFC 2315 Section 9.3 describes the message digesting process. The
digest calculated depends on whether the authenticated attributes are
present. In case of a scenario where the authenticated attributes are
present, the message digest that gets signed and is part of the pkcs7
message is computed from the auth attributes rather than the contents
field.

Check if the auth attributes are present, and if set, use the auth
attributes to compute the hash that would be compared with the
encrypted hash on the pkcs7 message.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
e1ee06dde7 qemu: arm: Initialise virtio devices in board_late_init
On the qemu arm platform, the virtio devices are initialised in the
board_init function, which gets called before the initr_pci. With
this sequence, the virtio block devices on the pci bus are not
initialised. Move the initialisation of the virtio devices to
board_late_init which gets called after the call to initr_pci.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
322c813f4b mkeficapsule: Add support for embedding public key in a dtb
Add options for embedding the public key esl(efi signature list) file
to the platform's dtb. The esl file is then retrieved and used for
authenticating the capsule to be used for updating firmare components
on the platform.

The esl file can now be embedded in the dtb by invoking the following
command
mkeficapsule -K <pub_key.esl> -D <dtb>

In the scenario where the esl file is to be embedded in an overlay,
this can be done through the following command
mkeficapsule -O -K <pub_key.esl> -D <dtb>

This will create a node named 'signature' in the dtb, and the esl file
will be stored as 'capsule-key'

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Heinrich Schuchardt
b7d186f071 efi_loader: event queueing
When a new event is queued we have to process the event queue by calling
efi_process_event_queue(). But there is not reason to call the function
when the event is not queueable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:32 +01:00
Ilias Apalodimas
fe179d7fb5 efi_loader: Add size checks to efi_create_indexed_name()
Although the function description states the caller must provide a
sufficient buffer, it's better to have in function checks that the
destination buffer can hold the intended value.

So let's add an extra argument with the buffer size and check that
before doing any copying.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:23 +01:00
Ilias Apalodimas
47d2b3b9c9 efi_loader: Remove unconditional installation of file2 protocol for initrd
Up to now we install the EFI_LOAD_FILE2_PROTOCOL to load an initrd
unconditionally. Although we correctly return various EFI exit codes
depending on the file status (i.e EFI_NO_MEDIA, EFI_NOT_FOUND etc), the
kernel loader only falls back to the cmdline interpreted initrd if the
protocol is not installed.

This creates a problem for EFI installers, since they won't be able to
load their own initrd and start the installation.

A following patch introduces a different logic where we search for an
initrd path defined in an EFI variable named 'Initrd####'.
If the bootmgr is used to launch the EFI payload, we'll will try to match
the BootCurrent value and find the corresponding initrd
(i.e Boot0000 -> Initrd0000 etc). If the file is found, we'll install
the required protocol which the kernel's efi-stub can use and load our
initrd.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:22 +01:00
Ilias Apalodimas
0c44452832 efi_loader: Remove unused headers from efi_load_initrd.c
dm.h and env.h serve no purpose here. Remove them and sort the
remaining in alphabetical order.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:22 +01:00
Heinrich Schuchardt
f8212f0970 efi_loader: use after free in efi_exit()
Do not use data from the loaded image object after deleting it.

Fixes: 126a43f15b ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:07 +01:00
Heinrich Schuchardt
0ce3fb55e0 efi_loader: describe struct efi_loaded_image_obj
Add the missing description of some fields of struct efi_loaded_image_obj.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:07 +01:00
Heinrich Schuchardt
2a0f80f058 efi_loader: efi_signal_event() fix comment typos
Add missing commas.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:07 +01:00
Heinrich Schuchardt
2a68cd492e efi_loader: avoid invalid free
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().

Fixes: 0ad64007fe ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:07 +01:00
Heinrich Schuchardt
97d36f069d efi_loader: escape key handling
Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.

Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:07 +01:00
Heinrich Schuchardt
db6288de85 efi_loader: missing parentheses after if
IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:33:07 +01:00
Heinrich Schuchardt
c0029e4e25 fs/fat: implement fsuuid command
The FAT file system does not have a UUID but a 4 byte volume ID.
Let the fsuuid command show it in XXXX-XXXX format.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:32:27 +01:00
Heinrich Schuchardt
d0be67657d fs: fat: eliminate DIRENTSPERBLOCK() macro
The FAT filesystem implementation uses several marcros referring to a magic
variable name mydata which renders the code less readable. Eliminate one of
them which is only used for a debug() statement.

Use log_debug() instead of debug().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-31 14:32:02 +01:00
Ilias Apalodimas
ffa375e6e5 efi_loader: Extra checks while opening an OPTEE session
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.

Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-31 14:27:56 +01:00
Heinrich Schuchardt
c0c21d67f0 efi_loader: make variable store size customizable
Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.

Make the size of the memory buffer for UEFI variables customizable.

Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-12-31 14:27:41 +01:00
Tom Rini
21e1cae790 Merge tag 'efi-2021-01-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc5 (2)

The following errors in the UEFI sub-system are fixed:

* use after free in efi_exit()
* invalid free when using the boot manager
* pressing escape key once not recognized
2020-12-29 10:23:58 -05:00
Heinrich Schuchardt
be48b0f453 efi_loader: use after free in efi_exit()
Do not use data from the loaded image object after deleting it.

Fixes: 126a43f15b ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-29 02:09:04 +01:00
Heinrich Schuchardt
aeaf0e6d58 efi_loader: describe struct efi_loaded_image_obj
Add the missing description of some fields of struct efi_loaded_image_obj.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-29 02:09:04 +01:00
Heinrich Schuchardt
34dc4a9ec9 efi_loader: efi_signal_event() fix comment typos
Add missing commas.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-29 02:09:04 +01:00
Heinrich Schuchardt
e434311dba efi_loader: avoid invalid free
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().

Fixes: 0ad64007fe ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-29 02:09:04 +01:00
Heinrich Schuchardt
9abb01af74 efi_loader: escape key handling
Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.

Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-29 02:09:04 +01:00
Heinrich Schuchardt
5f9b537531 efi_loader: missing parentheses after if
IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-29 02:09:04 +01:00
Tom Rini
ab865a8ee5 Merge tag 'u-boot-imx-20201227' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2021.1
----------------

CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680

- fixes for Variscite dart6ul
- imx8mp : increase malloc area
- fixes for bx50v3
- imx8m: HS400ES and UHS for EVK
- imx8qm-rom7720: fix phy bind
2020-12-28 07:44:03 -05:00
Tom Rini
1c3d1aa006 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix "Assert PERST# signal when unloading driver" in a37xx PCI
  driver (Pali)
- Fix SPL on armada-xp-gp (add u-boot,dm-pre-reloc and alias) (myself)
2020-12-28 07:43:28 -05:00
Pali Rohár
0eb0eb4ab2 Revert "arm64: a37xx: pci: Assert PERST# signal when unloading driver"
This reverts commit 828d326216.

This change revers code which asserting PERST# signal when unloading
driver. Driver's remove callback is still there as it is used for other
functionality.

Asserting PERST# signal prior booting kernel is causing that A3720 boards
(Turris MOX and Espressobin) with stable Linux kernel versions 4.14 and
4.19 are not able to detect some PCIe cards (e.g. Compex WLE200 and WLE900)
and anymore. When PERST# signal is not asserted these cards are detected
correctly. As this is regression for existing stable Linux kernel versions
revert this problematic change in U-Boot.

To make cards working with OpenWRT 4.14 kernel it is needed to disable link
training prior booting kernel, which is already done in driver's remove
callback.

Described issue is in Linux kernel pci aardvark driver which is (hopefully)
fixed in latest upstream versions. Latest upstream versions should be able
to initialize PCIe bus and detects cards independently of the link training
and PERST# signal state.

So with this change, U-Boot on A3720 boards should be able to boot OpenWRT
4.14 kernel, stable 4.14 and 4.19 kernels and also latest mainline kernels.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-28 09:42:06 +01:00
Stefan Roese
ce040932b5 arm: mvebu: armada-xp-gp.dts: Add spi0 alias
For correct spi bus detection the spi0 alias is needed in the DT.
Otherwise this error will ocurr in U-Boot:

Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
2020-12-28 09:42:06 +01:00
Stefan Roese
33fc6fc105 arm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot properties
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
2020-12-28 09:42:06 +01:00
Marc Ferland
26c7048dd9 i2c: mxc_i2c: improve error message readability
Use 0x%2lx to print the i2c bus base address in hexadecimal format
instead of printing as an integer.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-12-26 14:56:09 +01:00
Heinrich Schuchardt
e6abe163bf imx: mx7: clock: use correct format strings
Use %u and not %d for unsigned values.
Print kHz and not khz.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 14:56:09 +01:00
Marc Ferland
37648b600c arm: dart6ul: read and print SoM info from eeprom on startup
The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.

Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.

This code was inspired from the supported u-boot code from Variscite
which can be found here:

https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02

New output example:

Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17
       Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-12-26 14:56:09 +01:00
Marc Ferland
d4d7b663b8 arm: dart6ul: change compatible string for eeprom
The eeprom at address 0x50 is a BR24G04NUX-3TTR. It has a
4Kbit (512x8) capacity, change the compatible string to reflect this
fact.

Also, add an alias to easily refer to this eeprom with
fdt_path_offset() which will be in another commit.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-12-26 14:56:09 +01:00
Igor Opaniuk
f23c706863 toradex: hand over maintainership
Hand over maintainership of Toradex SoMs (that I was responsible of) to
Oleksandr because of my resignation from Toradex, as such I will
have no immediate involvement with these modules and as a result not
able to continue maintaining these boards.

CC: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-26 14:56:09 +01:00
Fabio Estevam
b6b1b38a94 imx8mp_evk: Increase CONFIG_SYS_MALLOC_F_LEN
When booting imx8mp-evk the following allocation error
message is seen:

U-Boot 2021.01-rc3-00200-ge668bec96a5f (Dec 21 2020 - 14:36:42 -0300)

alloc space exhausted

Fix it by increasing CONFIG_SYS_MALLOC_F_LEN to 0x10000 like it
is done on other i.MX8MM/8MN boards.

Reported-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 14:56:09 +01:00
Clément Péron
7d6a36a48d imx: ahab: allow to bypass confirmation for ahab_close cmd
Calling ahab_close cmd force the user to interact for confirmation.

This is not user-friendly when using this cmd during factory process.

Allow the user to pass '-y' option to bypass this confirmation.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
2020-12-26 14:56:09 +01:00
Sebastian Reichel
717bf50f4b board: ge: bx50v3: cleanup phy config
The current PHY rework does the following things:

1. Configure 125MHz clock
2. Setup the TX clock delay (RX is enabled by default),
3. Setup reserved bits to avoid voltage peak

The clock delays are nowadays already configured by the
PHY driver (in ar803x_delay_config). The code for that
can simply be dropped. The clock speed can also be
configured by the PHY driver by adding the device tree
property "qca,clk-out-frequency".

What is left is setting up the undocumented reserved bits
to avoid the voltage peak problem. I slightly improved its
documentation while updating the board's PHY rework code.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-26 14:56:09 +01:00
Sebastian Reichel
c44d374bef board: ge: bx50v3: remove confidx magic numbers
Instead of hardcoding index magic numbers in the board code,
also rely on board_fit_config_name_match choosing the right
config for the fitImage containing the kernel.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-26 14:56:09 +01:00
Tom Rini
e426e2d936 Merge tag 'efi-2021-01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc5

* In the Standalone MM based implementation of UEFI variables
  check the internal OP-TEE return code
2020-12-26 08:02:19 -05:00
Ilias Apalodimas
548fb67eef efi_loader: Extra checks while opening an OPTEE session
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.

Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-26 12:47:46 +01:00
Sebastian Reichel
db43c0b72d compiler.h: add host_build()
Add a host_build() function, so that it's possible to
check for software being build with USE_HOSTCC without
relying on preprocessor conditions. In other words

 #ifdef USE_HOSTCC
 	host_only_code();
 #endif

can be written like this instead:

 if (host_build())
 	host_only_code();

This improves code readability and test coverage and
compiler will eleminate this unreachable code.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-26 12:37:28 +01:00
Fabio Estevam
72397c9621 mx6sabresd: Remove unneeded checkboard()
After the conversion to device tree the board information becomes
redundant:

Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD

Remove the printing of the board information.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 12:37:07 +01:00
Andrey Zhizhikin
e601f0f9c9 configs: imx8m: enable eMMC HS400ES and SD UHS mode on EVK
i.MX8M series includes support for high speed modes in uSDHC controllers.
Turn on corresponding configuration options for EVK boards, which would
enable high speed modes to be included in U-Boot.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2020-12-26 12:36:55 +01:00
Andrey Zhizhikin
50b1a69cee ARM: dts: imx8m: add UHS or HS400/HS400ES properties
i.MX8M series provide support for high speed grades in their
usdhc controllers, which has eMMC and SDHC connected to them.

Enable this support across the entire i.MX8M family by providing quirks
to usdhc controllers designated by storage media connected to them.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
2020-12-26 12:36:35 +01:00
Andrey Zhizhikin
247bbeb74c ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator
Some SD Card controller and power circuitry has increased capacitance,
which keeps the internal logic remains powered after regulator is switch
off. This is generally the case when card is switched to SD104 mode,
where a power cycle should be performed. In case if the card internal
logic remains powered, it causes a subsequent failure of mode
transition, effectively leading to failed enumeration.

Introduce a delay of 20 msec in order to provide a possibility for
internal card circuitry to drain voltages and perform a power cycle
correctly.

Similar fix is done in commit c49d0ac38a ("ARM: dts: rmobile: Increase
off-on delay on the SD Vcc regulator") targeted Renesas SOCs.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-12-26 12:36:19 +01:00
Adam Ford
1a5d9c84b4 imx8mm_beacon: Enable HS400 on MMC controller
The i.MX8MM is capable of HS400.  Enable it in both
U-Boot and SPL for faster throughput.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-12-26 12:36:09 +01:00
Adam Ford
1170d2b759 arm64: dts: imx8mm-beacon: Re-sync dts file with Linux 5.10-rc6
There have been some updates to the device trees, so re-sync.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 12:35:58 +01:00
Adam Ford
15d79fcac0 arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6
There have been some updates to the device tree since 5.6.
This also includes some clocks, and makes it easier to keep
board device tree files in sync with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 12:35:49 +01:00
Adam Ford
d72cecec7f imx: imx8mm: Update clock bindings header
Import clock bindings header file from Linux 5.10-rc6

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 12:35:38 +01:00
Oliver Graute
2055103f08 ARM: dts: imx: imx8qm-rom7720: Fix AR8031 phy-mode
Fixed wrong PHY Interface Mode

    As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
    the correct phy-mode should be "rgmii-id", so fix it accordingly
    to fix the Ethernet regression.

    This problem has been exposed by commit:

    commit 13114f38e2

    Fix the phy-mode accordingly to fix the regression.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
2020-12-26 12:35:25 +01:00
Tom Rini
958b9e2482 Merge tag 'dm-next-23dec20' of git://git.denx.de/u-boot-dm into next
dm: New sequence number implementation
SPI handling of bus with different-speed devices
patman supression of sign-offs
2020-12-23 18:10:15 -05:00
Simon Glass
ec1add1e51 dm: core: Inline a few ofnode functions in SPL
A recent change to unify the flattree/livetree code introduced a small
size increase in SPL on some boards. For example SPL code size for
px30-core-ctouch2-px30 increased by 40 bytes.

To address this we can take advantage of the fact that some of the ofnode
functions are only called a few times in SPL, so it is worth inlining
them.

Add new Kconfig options to control this. These functions are not inlined
for U-Boot proper, since this increases code size.

Fixes: 2ebea5eaeb ("dm: core: Combine the flattree and livetree binding code")
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:26 -07:00
Simon Glass
73da3d2cff buildman: Remove output binaries before building
Buildman reuses build directories from previous builds to avoid the cost
of 'make mrproper' for every build. If the previous build produced an SPL
image but the current one does not, the SPL image will remain and buildman
will think it is a result of building the current board.

Remove these files before building, to avoid this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:26 -07:00
Niel Fourie
fc314300dd dm: spi: Fix spi_free_slave() freed memory write
Remove setting slave->dev to NULL after the device_remove() call.

The slave pointer points to dev->parent_priv, which has already
been freed by device_free(), called from device_remove() in the
preceding line. Writing to slave->dev may cause corruption of the
dlmalloc free chunk forward pointer of the previously freed chunk.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:26 -07:00
Ovidiu Panait
a5624c6b4c test: dm: spi: Add testcase for spi_claim_bus()
Add testcase for spi_claim_bus(), which checks that sandbox spi bus
speed/mode settings are updated correctly when multiple slaves use
the bus consecutively. The following configurations are used for the
two spi slaves involved:
  * different max_hz / different modes
  * different max_hz / same modes
  * different modes / same max_hz

asm/test.h header is added in order to be able to retrieve the current
speed/mode of the sandbox spi bus, via sandbox_spi_get_{speed, mode}.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:26 -07:00
Ovidiu Panait
741280e9ac spi: spi-uclass: Fix spi_claim_bus() speed/mode setup logic
Currently, when different spi slaves claim the bus consecutively using
spi_claim_bus(), spi_set_speed_mode() will only be executed on the first
two calls, leaving the bus in a bad state starting with the third call.

This patch drops spi_slave->speed member and adds caching of bus
speed/mode in dm_spi_bus struct. It also updates spi_claim_bus() to call
spi_set_speed_mode() if either speed or mode is different from what the
bus is currently configured for. Current behavior is to only take into
account the speed, but not the mode, which seems wrong.

Fixes: 60e2809a84 ("dm: spi: Avoid setting the speed with every transfer")
Reviewed-by: Simon Glass <sjg@chromium.org>
Reported-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reported-by: Moshe, Yaniv <yanivmo@amazon.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-12-22 20:39:26 -07:00
Ovidiu Panait
add685fb6d test: spi: Add sandbox_spi_get_{speed, mode} interface
Introduce sandbox_spi_get_{speed, mode} public interface to retrieve the
sandbox spi bus internal state. They are meant to be used in sandbox spi
testcases.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:26 -07:00
Ovidiu Panait
2da1800456 spi: sandbox_spi: Implement speed/mode setup
Implement sandbox_spi_set_{speed, mode} routines, to be able to keep track
of the current bus speed/mode. This will help determine whether the values
passed from dm_spi_claim_bus() are valid.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-12-22 20:39:25 -07:00
Ovidiu Panait
1dc53ce71d sandbox: test: Add a second SPI slave on sandbox_spi bus
Place a second spi slave on the sandbox_spi bus, to be used by the
spi_claim_bus() testcase we are about to introduce. We need to make sure
that jumping between slaves calling spi_claim_bus() sets the bus speed and
mode appropriately. Use different max-hz and mode properties for this new
slave.

Also, update sandbox_spi cs_info call to allow activity on CS0/CS1 and
adapt dm_test_spi_find() testcase for this new setup.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Ovidiu Panait
1f6d618bb1 sandbox: spi: Drop unused sandbox_spi_parse_spec function
Commit 1289e96797 ("sandbox: spi: Drop command-line SPI option") dropped
support for specifying SPI devices on the command line, removing the only
user of sandbox_spi_parse_spec(). Remove the function too.

Fixes: 1289e96797 ("sandbox: spi: Drop command-line SPI option")
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Heinrich Schuchardt
3286d223fd sandbox: implement invalidate_icache_all()
Before executing code that we have loaded from a file we need to flush the
data cache and invalidate the instruction flash.

Implement functions flush_cache() and invalidate_icache_all().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Aswath Govindraju
c589132a1d fdt: Use phandle to distinguish DT nodes with same name
While assigning the sequence number to subsystem instances by reading the
aliases property, only DT nodes names are compared and not the complete
path. This causes a problem when there are two DT nodes with same name but
have different paths.

In arch/arm/dts/k3-am65-main.dtsi there are two USB controllers with the
same device tree node name but different path. When aliases are defined for
these USB controllers then fdtdec_get_alias_seq() fails to pick the correct
instance for a given index.

fdt_path_offset() function is slow and this would effect the U-Boot
startup. To avert the time penalty on all boards, apply this extra check
only when required by using a config option.

Fix it by comparing the phandles of DT nodes after the node names match,
under a config option.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix whitespace error in Kconfig:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Hongwei Zhang
9883df1bbb Common:fdt: Check for error return value
Check for negative return value of fdt_noffset from calling
boot_get_fdt_fit().

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Heinrich Schuchardt
9c54729c77 sandbox: implement runtime system reset
Implement a reset function that we can call after ExitBootServices(),
when all driver model devices are gone.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Patrick Delaunay
67c7e9af7a configs: sandbox: activate DEBUG_UART
Add CONFIG_DEBUG_UART=y for all sandbox defconfig
as it is already done in sandbox_defconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Philipp Tomsich
ddc44c2c92 patman: Add project-default for 'gcc'
Add defaults for FSF/GNU projects, such as gcc, that provide sensible
settings for those projects.

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:39:25 -07:00
Philipp Tomsich
b3aff15ee4 patman: Add --no-signoff to suppress adding signoffs
To enable use of patman with FSF/GNU projects, such as GCC or
Binutils, no Signed-off-by may be added.  This adds a command
line flag '--no-signoff' to suppress adding signoffs in patman
when processing commits.

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix patman testBranch() test:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-22 20:38:58 -07:00
Tom Rini
fbc326244c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Update Intel Edison doc information about xFSTK
- Move and rename fsp_types.h file to signatures.h
2020-12-22 08:18:21 -05:00
Sughosh Ganu
6ef1b75087 fsp: Move and rename fsp_types.h file
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-22 10:19:40 +08:00
Andy Shevchenko
e7eeb6dd2d doc: edison: Update information about xFSTK
xFSTK sources got a new home under Edison Firmware Group on GitHub [1].
Update Intel Edison documentation accordingly.

While here, fix couple of typos.

[1]: https://github.com/edison-fw

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-22 10:19:40 +08:00
Tom Rini
c15f44acf9 Prepare v2021.01-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-21 15:03:24 -05:00
Tom Rini
1e5f7df934 Travis-CI: Drop support
Travis-CI is changing their support for FOSS (understandably) to have a
limited per-month number of build minutes.  Unfortunately for us, the
matrix of jobs we run will exhaust that very quickly.  Remove the yml
file.  Thanks for all the builds, Travis-CI!

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-21 15:02:49 -05:00
Michael Walle
e668bec96a board: kontron: sl28: reorder mmc devices
Since linux commit 2e6cde96873253fd9eb0f20afd8ffd18278cff75 ("arm64:
dts: ls1028a: make the eMMC and SD card controllers use fixed indices")
mmc0 is the eMMC and mmc1 is the SD card. Also swap it in u-boot to
avoid any confusion by the user and to be aligned with linux.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-20 16:53:25 -05:00
Tom Rini
46a4d75203 Merge tag 'efi-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc4

* Provide a tool to create a file with UEFI variables to preseed UEFI
  variable store.
* Make size of UEFI variable store configurable.
* Add man pages for commands 'bootefi' and 'button'.
2020-12-20 14:55:59 -05:00
Heinrich Schuchardt
77504ee676 MAINTAINERS: add tools/efivar.py to EFI PAYLOAD
tools/efivar.py allows to prepare a file with UEFI variables to preseed
the UEFI variable store.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-20 17:40:06 +01:00
Paulo Alcantara
73253d7765 tools: add a simple script to generate EFI variables
This script generates EFI variables for U-Boot variable store format.

A few examples:

  - Generating secure boot keys

    $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ \
            -keyout PK.key -out PK.crt -nodes -days 365
    $ efisiglist -a -c PK.crt -o foo.esl
    $ tools/efivar.py set -i ubootefi.var -n db -d foo.esl -t file
    $ tools/efivar.py set -i ubootefi.var -n kek -d foo.esl -t file
    $ tools/efivar.py set -i ubootefi.var -n pk -d foo.esl -t file

  - Printing out variables

    $ tools/efivar.py set -i ubootefi.var -n var1 -d foo -t str
    $ tools/efivar.py set -i ubootefi.var -n var2 -d bar -t str
    $ tools/efivar.py print -i ubootefi.var
    var1:
        8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
        NV|BS|RT, DataSize = 0x3
        0000000000: 66 6F 6F                                          foo
    var2:
        8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
        NV|BS|RT, DataSize = 0x3
        0000000000: 62 61 72                                          bar

    - Removing variables

      $ tools/efivar.py del -i ubootefi.var -n var1
      $ tools/efivar.py set -i ubootefi.var -n var1 -a nv,bs -d foo -t str
      $ tools/efivar.py print -i ubootefi.var -n var1
      var1:
          8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
          NV|BS, DataSize = 0x3
          0000000000: 66 6F 6F                                        foo
      $ tools/efivar.py del -i ubootefi.var -n var1
      err: attributes don't match
      $ tools/efivar.py del -i ubootefi.var -n var1 -a nv,bs
      $ tools/efivar.py print -i ubootefi.var -n var1
      err: variable not found

Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz>

Correct examples in commit message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-20 17:40:06 +01:00
Heinrich Schuchardt
265ce19485 efi_loader: make variable store size customizable
Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.

Make the size of the memory buffer for UEFI variables customizable.

Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-12-20 17:40:06 +01:00
Heinrich Schuchardt
0c1b71cd07 doc: man-page for bootefi command
Provide a description of the bootefi command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-20 17:40:06 +01:00
Heinrich Schuchardt
24ceb441c7 doc: button command
Provide a description of the 'button' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-20 17:40:06 +01:00
Simon Glass
5e66338bab dm: Update documentation for new sequence numbers
Update the driver model documention to describe how sequence numbers now
work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
7f20d1d249 dm: core: Drop seq and req_seq
Now that migration to the new sequence numbers is complete, drop the old
fields. Add a test that covers the new behaviour.

Also drop the check for OF_PRIOR_STAGE since we always assign sequence
numbers now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
36c03d1830 cmd: Drop use of old sequence numbers in commands
Several commands use sequence numbers. Update them to use the new ones.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
a133e2179a dm: core: Update uclass_find_next_free_req_seq() for new scheme
This function current deals with req_seq which is deprecated. Update it to
use the new sequence numbers, putting them above existing aliases. Rename
the function to make this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
991759196f dm: Drop the unused arg in uclass_find_device_by_seq()
Now that there is only one sequence number (rather than both requested and
assigned ones) we can simplify this function. Also update its caller to
simplify the logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
b5b11558bc dm: Drop uclass_resolve_seq()
This function is not needed anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
93f44e8a8c dm: test: Add a test for DM_UC_FLAG_NO_AUTO_SEQ
Check that this flag operates as expected. This patch is not earlier in
this series since is uses the new behaviour of dev_seq().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
981426e350 dm: Switch over to use new sequence number for dev_seq()
Update this function to use the new sequence number and fix up the test
that deals with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
3bc90aa743 pinctrl: Update for new sequence numbers
Use the dev_seq() sequence number in all cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
fb0ea6a710 gpio: Update for new sequence numbers
Use the dev_seq() sequence number in all cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
d1e85308fe x86: Simplify acpi_device_infer_name()
There is no-longer any need to check if sequence numbers are valid, since
this is ensured by driver model. Drop the unwanted logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
df3dc20952 x86: Drop unnecessary mp_init logic
Now that sequence numbers are set up when devices are bound, this code is
not needed. Also, we should use dev_seq() instead of req_seq. Update the
whole file accordingly.

Also fix up APL cpu while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
b27347f425 usb: Update for new sequence numbers
Use the new sequence number in all cases. Since all devices are assigned
a number when bound, this hack should not be needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
4de51cc25b usb: ehci-mx6: Drop assignment of sequence number
This hack cannot work in the new sequence-numbering scheme. Remove it
while we wait for the maintainer to complete DM conversion as noted in
the existing comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
6d83c74db7 spi: Update for new sequence numbers
Use the new sequence number in all cases. Drop the rockchip case because
the sequence number should be 0 anyway, and assigning to the sequence
number is not permitted.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
42f3663a3f pci: Update to use new sequence numbers
Now that we know the sequence number at bind time, there is no need for
special-case code in dm_pci_hose_probe_bus().

Note: the PCI_CAP_ID_EA code may need a look, but there are no test
failures so I have left it as is.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
15a1196be8 dm: core: Allow manual sequence numbering
Some buses have their own rules which require assigning sequence numbers
with a bus-specific algorithm. For example, PCI requires that sub-buses
are numbered higher than their parent buses, meaning effectively that
parent buses must be numbered only after all of their child buses have
been numbered.

Add a uclass flag to indicate that driver model should not assign sequence
numbers. In this case, the uclass must do it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
552da3357b net: Update to use new sequence numbers
Checking for seq == -1 is effectively checking that the device is
activated. The new sequence numbers are never -1 for a bound device, so
update the check.

Also drop the note about valid sequence numbers so it is accurate with the
new approach.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
16df993246 i2c: Update for new sequence numbers
Use the new sequence number in all cases. Drop the logic to check for a
valid number in designware_i2c, since it will always be valid.

Also drop the numbering in the uclass, since we can rely on driver
model giving us the right sequence numbers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
5c58002255 octeon: Don't attempt to set the sequence number
Several Octeon drivers operate by setting the sequence number of their
device. This should not be needed with the new sequence number setup. Also
it is not permitted. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
a20b4a8cfb dm: test: Drop assumptions of no sequence numbers
Drop code in a few tests which assumes that sequence numbers are only
valid when a device is probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
4153e3a5fb dm: Fix return value in dev_read_alias_seq()
This should return 0 on success but currently does not. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
ba0e7daeef dm: core: Switch binding to use new sequence numbers
Update the core logic to use the new approach. For now the old code is
left as is. Update one test so it still passes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
1c55b22923 dm: test: Check all devices have a sequence numbers
Add a test that the new sequence numbers work as expected. Every device
should get one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
cd53e5bf4b dm: core: Add a new sequence number for devices
At present each device has two sequence numbers, with 'req_seq' being
set up at bind time and 'seq' at probe time. The idea is that devices
can 'request' a sequence number and then the conflicts are resolved when
the device is probed.

This makes things complicated in a few cases, since we don't really know
what the sequence number will end up being. We want to honour the
bind-time requests if at all possible, but in fact the only source of
these at present is the devicetree aliases. Since we have the devicetree
available at bind time, we may as well just use it, in the hope that the
required processing will turn out to be useful later (i.e. the device
actually gets used).

Add a new 'sqq' member, the bind-time sequence number. It operates in
parallel to the old values for now. All devices get a valid sqq value,
i.e. it is never -1.

Drop an #ifdef while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
d03adb4a78 dm: core: Update uclass_find_next_free_req_seq() args
At present this is passed a uclass ID and it has to do a lookup. The
callers all have the uclass pointer, except for the I2C uclass where the
code will soon be deleted.

Update the argument to a uclass * instead of an ID since it is more
efficient.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
8b85dfc675 dm: Avoid accessing seq directly
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.

The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
0b2fa98aa5 linker_lists: Fix alignment issue
The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.

For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.

With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.

Consider this example, where struct driver is 0x80 bytes:

	ll_entry_declare(struct driver, fred, driver)

...

	void *p = ll_entry_get(struct driver, fred, driver)

If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.

In the first case, an 8-byte 'fill' region is added:

 .u_boot_list_2_driver_2_testbus_drv
                0x0000000000270018       0x80 test/built-in.o
                0x0000000000270018                _u_boot_list_2_driver_2_testbus_drv
 .u_boot_list_2_driver_2_testfdt1_drv
                0x0000000000270098       0x80 test/built-in.o
                0x0000000000270098                _u_boot_list_2_driver_2_testfdt1_drv
 *fill*         0x0000000000270118        0x8
 .u_boot_list_2_driver_2_testfdt_drv
                0x0000000000270120       0x80 test/built-in.o
                0x0000000000270120                _u_boot_list_2_driver_2_testfdt_drv
 .u_boot_list_2_driver_2_testprobe_drv
                0x00000000002701a0       0x80 test/built-in.o
                0x00000000002701a0                _u_boot_list_2_driver_2_testprobe_drv

With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.

Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.

One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.

So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.

Update the ll_entry_start() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Tom Rini
549e7cb708 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi 2020-12-18 13:06:02 -05:00
Tom Rini
233a4d47e7 Merge tag 'u-boot-amlogic-20201218' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix Odroid-C4 soft-reboot caused by bad setup of SDCard VDD regulator
2020-12-18 13:05:47 -05:00
Marek Szyprowski
21a1bc6a90 ARM: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN
pin to the high impedance mode, otherwise the board is stuck in the
middle of loading early stages of the bootloader from SD card.

This can be achieved by using the OPEN_DRAIN flag instead if the
ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin
has the pull-up) and solve the issue.

Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-18 11:50:27 +01:00
Hongwei Zhang
936a645609 mtd: spi-nor-ids: add Micron MT25QL01G flash
Add Micron MT25QL01G flash, used on AST2600 board.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:19:33 +05:30
Pengpeng Chen
24f2794232 spi: ca_sflash: Add CAxxxx SPI Flash Controller
Add SPI Flash controller driver for Cortina Access
CAxxxx SoCs

Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Vignesh R <vigneshr@ti.com>
CC: Tom Rini <trini@konsulko.com>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
b55af5a225 riscv: Add device tree bindings for SPI
This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
fec7bf0460 spi: dw: Add mem_ops
The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
impossible to use the spi_xfer function to use spi, since the CS is
de-asserted in between calls.  This patch adds an implementation of
exec_op, which gives correct behaviour when reading/writing spi flash.

This patch also rearranges the headers to conform to U-Boot style.

[1] https://lkml.org/lkml/2015/12/23/132

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
0d98f6de62 spi: dw: Document devicetree binding
This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
U-Boot-specific ones.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
58875790fd spi: dw: Add support for multiple CTRLR0 layouts
CTRLR0 can have several different layouts depending on the specific device
(dw-apb-ssi vs dwc-ssi), and specific parameters set during synthesis.
Update the driver to support three specific configurations: dw-apb-ssi with
SSI_MAX_XFER_SIZE=16, dw-apb-ssi with SSI_MAX_XFER_SIZE=32, and dwc-ssi.

dw-apb-ssi is the version of the device on Altera/Intel SoCFPGAs, MSCC
SoCs, and Canaan Kendryte K210 SoCs. This is the only version this driver
supported before this change. The register layout before version 3.23a is:

|   31 .. 16  |
| other stuff |

|   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff |  TMOD  |  MODE  |  FRF   |  DFS   |

Note that DFS (Data Frame Size) is only 4 bits, limiting transfers to data
frames of 16 bits or less.

In version 3.23a, the SSI_MAX_XFER_SIZE parameter was introduced. This
parameter defaults to 16 (resulting in the same layout as prior versions),
but may also be set to 32. To allow setting longer data frame sizes, a new
DFS_32 register was introduced:

|   31 .. 21  | 20 .. 16 |
| other stuff |  DFS_32  |

|   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 |  3 .. 0   |
| other stuff |  TMOD  |  MODE  |  FRF   | all zeros |

The old DFS field no longer controls the data frame size. To detect this
layout, we try writing 0xF to DFS. If we read back 0x0, then this device
has SSI_MAX_XFER_SIZE=32.

dwc-ssi is the version of the device on Intel Keem Bay SoCs and Canaan
Kendryte K210 SoCs. The layout of ctrlr0 is:

|   31 .. 16  |
| other stuff |

|   15 .. 12  | 11 .. 10 | 9 .. 8 | 7 .. 6 | 4 .. 0 |
| other stuff |   TMOD   |  MODE  |  FRF   | DFS_32 |

The semantics of the fields have not changed since the previous version.
However, SSI_MAX_XFER_SIZE is effectively always 32.

To support these different layouts, we model our approach on the one
which the Linux kernel has taken. During probe, the driver calls an init
function stored in driver_data. This init function is responsible for
determining the layout of CTRLR0, and supplying the update_cr0 function.

The style of and information behind this commit is based on the Linux MMIO
driver for these devices. Specific reference was made to the series adding
support for Intel Keem Bay SoCs [1].

[1] https://lore.kernel.org/linux-spi/20200505130618.554-1-wan.ahmad.zainie.wan.mohamad@intel.com/

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
237e5880f8 spi: dw: Add SoC-specific compatible strings
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.

Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
ddd3450f39 spi: dw: Rearrange struct dw_spi_priv
This should reduce the size of the struct, and also groups more similar
fields together.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
934beab882 spi: dw: Remove spi_enable_chip
This function does nothing but wrap dw_write.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
3004034989 spi: dw: Rename registers to match datasheet
A few registers had slightly different names from what is in the datasheet.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Sean Anderson
c785f43ffd spi: dw: Use generic function to read reg address
Using an fdt-specific function causes problems when compiled with a live
tree.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Sean Anderson
13fc44e222 spi: dw: Rename "cs-gpio" to "cs-gpios"
This property is named differently than other SPI drivers with the same
property, as well as the property as used in Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Sean Anderson
1b3dd491e6 spi: dw: Convert calls to debug to dev_*
This allows different log levels to be enabled or disabled depending on the
desired level of verbosity. In particular, it allows for general debug
information to be printed while excluding more verbose logging which may
interfere with timing.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Sean Anderson
caf110798c spi: dw: Fix driving MOSI low while recieving
The resting state of MOSI is high when nothing is driving it. If we drive
it low while recieving, it looks like we are transmitting 0x00 instead of
transmitting nothing. This can confuse slaves (like SD cards) which allow
new commands to be sent over MOSI while they are returning data over MISO.
The return of MOSI from 0 to 1 at the end of recieving a byte can look like
a start bit and a transmission bit to an SD card. This will cause the card
to become out-of-sync with the SPI device, as it thinks the device has
already started transmitting two bytes of a new command. The mmc-spi driver
will not detect the R1 response from the SD card, since it is sent too
early, and offset by two bits. This patch fixes transfer errors when using
SD cards with dw spi.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Mikhail Kshevetskiy
25f068aa3e mtd: spinand: enable erasing of bad mtd blocks
U-Boot is able to erase bad mtd blocks on raw nand devices, but this
is not true for spinand flashes. Lets enable this feature for spinand
flashes as well. This is extemelly useful for flash testing.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@oktetlabs.ru>
2020-12-18 16:16:36 +05:30
Frieder Schrempf
031b89e51b mtd: spinand: Do not erase the block before writing a bad block marker
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.

In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
2020-12-18 16:16:36 +05:30
Frieder Schrempf
e6108004e6 mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.

Fix this by explicitly setting req.mode to MTD_OPS_RAW.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
2020-12-18 16:16:36 +05:30
Frieder Schrempf
987f1e56ed mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.

This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07eedf ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.

To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
2020-12-18 16:16:36 +05:30
Sean Anderson
40fc33fae0 spi: Fix typo in header
Spelling.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Sean Anderson
55a2bec7b5 doc: Fix typo in FIT documentation
u_boot should be u-boot

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Robert Marko
d1b6b942f8 mtd: spi-nor-ids: Add SECT_4K to mx25l12805d
According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.

Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Biju Das
9dddead735 mtd: spi-nor-ids: Add Winbond W25M512JW flash entry
Add Winbond W25M512JW flash device description.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Lad Prabhakar
1910aca0f1 mtd: spi-nor-ids: Add Winbond W25M512JV flash entry
Add Winbond W25M512JV flash device description.

Linux already has the flash entry present. A snippet below:
{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024...},

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Patrick Delaunay
46c5391b3d spi: migrate trace to dev and log macro in spi uclass
Define LOG_CATEGORY and change printf and pr_*
to dev_ (when dev is available) or log_ macro.

This patch adds the support of logging feature with log command
(filtering, display of device name in trace) and allows to
suppress traces via the syslog driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Jagan Teki
03a673cf49 dh_imx6: Switch to full DM-aware
Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Jagan Teki
538fe2f4ec cm_fx6: Switch to full DM-aware
Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Jagan Teki
9ca54ef263 cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
Enable DM_SPI/DM_SPI_FLASH with associated config
options.

Build fine, but not tested.

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Tom Rini
51f65b506f Merge branch 'master' of git://git.denx.de/u-boot-usb
- r8152, xhci fixes
2020-12-16 17:43:33 -05:00
Tom Rini
a439136599 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-16 10:58:24 -05:00
Tom Rini
25e6bd18c5 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Update cmdline parameter to be an env var in zimage boot
- Various minor fixes for Intel Edison board
2020-12-16 08:13:37 -05:00
Hayes Wang
7229440772 eth/r8152: fix the aggregation issue
Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for
RTL8153B, it is necessary to notify the hardware of the changes
of the aggregation settings.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-12-16 10:27:09 +01:00
Hayes Wang
17d5a461a0 eth/r8152: free previous memory if r8152_eth_probe fail
The r8152_eth_probe() may allocate a memory for ss->dev_priv.
It has to be freed if r8152_eth_probe() fails finally.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-12-16 10:27:09 +01:00
Ran Wang
621ed49d3a usb: xhci: fix lack of short packet event trb handling
For bulk IN transfer, the codes will set ISP flag to request event TRB
being generated by xHC for the case of short packet. So when encountering
buffer-cross-64K-boundary (which we will divide payload and enqueuqe
more than 1 transfer TRB), and the first TRB ends up with a short packet
condition it will trigger an short packet code transfer event per that
flag and cause more than 1 event TRB generated for this transfer.

However, current codes will only handle the first transfer event TRB
then mark current transfer completed, causing next transfer
failure due to event TRB mis-match.

Such issue has been observed on some Layerscape platforms (LS1028A,
LS1088A, etc) with USB ethernet device.

This patch adds a loop to make sure the event TRB for last transfer TRB
has been handled in time.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 10:27:09 +01:00
Andy Shevchenko
f89e8acbc8 x86: edison: Switch to DM_USB_GADGET
DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.

Move Intel Edison to use DM_USB_GADGET and drop hard coded values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko
23cdbba8b1 x86: edison: Use dwc3-generic driver for Intel Edison
Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko
d067fb7636 x86: edison: BINMAN selection is specific to the board
The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:42 +08:00
Andy Shevchenko
35d29a8f55 x86: edison: Add CPU to compatible string
Like in the rest of x86 boards append CPU to the board compatible string.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:03 +08:00
Andy Shevchenko
5384a3f56c x86: edison: Drop unneeded DM_PCI_COMPAT
None of the driver for Edison is using DM_PCI_COMPAT, hence drop it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:49:02 +08:00
Andy Shevchenko
21096c0af3 x86: tangier: Find proper memory region for relocation
It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.

Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.

According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.

Fixes: e71de54a49 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:47:34 +08:00
Simon Glass
1b6314be50 x86: coral: Update the boot script
Make use of the new bootargs substitution mechanism and zboot command
syntax.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:46:13 +08:00
Simon Glass
6c9a83502f x86: zimage: Update cmdline parameter to be an env var
With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.

In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.

Update the command accordingly.

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:46:11 +08:00
Tom Rini
af22790a3b Merge tag 'doc-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Documentation fixes for v2020.01-rc4

Move several README files to reStructured text for the HTML documentation.
Describe register for global data on x86.
Allow building HTML documentation with Sphinx 3
2020-12-15 13:57:03 -05:00
Igor Opaniuk
c9cb6a6002 distro_bootcmd: set devtype for dhcp boot
Set $devtype for DHCP boot, which can be handy for the boot.scr
for detection of devtype used (for example, when the same boot.scr is
used for both mmc/dhcp boot):

if test ${devtype} = "dhcp"; then
	...
fi

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-15 13:56:50 -05:00
Tom Rini
56f02f0ae8 Merge tag 'u-boot-amlogic-20201215' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix pinctrl BIAS setup which caused failure on some eMMC models
- fix dr-mode configuration in dwc3-meson-g12a glue driver
2020-12-15 09:08:14 -05:00
Heinrich Schuchardt
abd40a8f98 doc: uefi: remove leading $ from bash commands
Use the same formatting for all bash commands.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-15 09:39:07 +01:00
Heinrich Schuchardt
4cf91c886d doc: move README.bootmenu to HTML doc
Convert README.bootmenu to reStructured text and move it to
usage/bootmenu.rst.

Adjust the text concerning configuration settings as these now are managed
via Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2020-12-15 09:38:41 +01:00
Heinrich Schuchardt
dce26c7d56 doc: move README.trace to HTML documentation
Convert README.trace to reStructured text and move it to develop/trace.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-15 09:37:24 +01:00
Heinrich Schuchardt
d0253f7e5c doc: move README.NetConsole to HTML documentation
Convert README.NetConsole to reStructured text and move it to
doc/usage/netconsole.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-15 09:37:00 +01:00
Heinrich Schuchardt
9ebb71f70d doc: use code-block in pstore.rst
Use syntax highlighting for a Linux console session.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-15 09:35:29 +01:00
Heinrich Schuchardt
d2472dedbd doc: move pstore.rst to usage/pstore.rst
Let's have a separate chapter dedicated to using U-Boot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-15 09:35:04 +01:00
Heinrich Schuchardt
380c6b94da doc: move README.commands to HTML doc
Reformat README.commands as reStructured text and add it to the HTML
documentation as develop/commands.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-15 09:32:15 +01:00
Heinrich Schuchardt
ae2b48e84a doc: allow building htmldoc with Sphinx 3+
Due to removed function c_funcptr_sig_re building with Sphinx 3 fails.

With the patch building succeeds with a lot of warnings if the '-W' flag is
removed from doc/Makefile. Most of the documentation is correct

This follows the approach taken by the Linux kernel.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-15 09:31:39 +01:00
Heinrich Schuchardt
b2107a4b77 doc: global data pointer on x86, x86_64
On x86 the global data pointer is stored in register fs.
On x86_64 no register is used for the global data pointer.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-15 09:31:26 +01:00
Heinrich Schuchardt
c206702155 doc/build/gcc.rst: required packages for SUSE
Describe the packages required to build U-Boot on SUSE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-15 09:30:51 +01:00
Tom Rini
8351a29d2d Merge tag 'dm-pull-14dec20' of git://git.denx.de/u-boot-dm into next
Driver model tidy-up for livetree
Driver model big rename for consistency
Python 3 clean-ups for patman
Update sandbox serial driver to use membuff
2020-12-14 18:57:57 -05:00
Tom Rini
f40825e18e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix wrong amoswap t1 usage in startup.
- Reset the board after crash.
- Enable distro booting from an attached SCSI disk for QEMU.
- Support the optional header fields in efi header.
2020-12-14 15:11:05 -05:00
Neil Armstrong
5ccd5d2cc9 pinctrl: meson: fix bit manipulation of pin bias configuration
This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.

Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <arapov@gmail.com>
Reported-by: Otto Meier <gf435@gmx.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-14 19:58:54 +01:00
Marek Szyprowski
5c88b6ad40 usb: dwc3-meson-g12a: always configure dr-mode
dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However
it skips setting the mode if it matches the one done during driver probe
(stored in private structure). This fails if the mode has been changed
to other value and then back to initial one. Fix this by configuring the
dr-mode always, regadless of the one set at the driver probe).

This fixes operation of USB gadget based drivers when they are initialized
for the second time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-14 19:58:54 +01:00
Leo Yu-Chi Liang
9afaeec6ef riscv: Complete efi header for RV32/64
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-12-14 15:16:54 +08:00
Leo Yu-Chi Liang
9ea6952a9a riscv: Fix efi header size for RV32
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
2020-12-14 15:16:54 +08:00
Atish Patra
84c3db2ea3 riscv: Fix efi header for RV32
RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
   zero in absence of any usage.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-12-14 15:16:54 +08:00
Heinrich Schuchardt
b620363feb riscv: qemu: enable distro boot from scsi
Booting via distro boot fails for:

    qemu-system-riscv64
    -drive if=none,file=sct-riscv64.img,format=raw,id=mydisk \
    -device ich9-ahci,id=ahci -device ide-hd,drive=mydisk,bus=ahci.0

Enable distro booting from an attached SCSI disk.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-12-14 15:16:48 +08:00
Heinrich Schuchardt
c353f2b845 riscv: reset after crash
If an exception occurs on ARM or x86, we call panic() which will try to
reset the board. Do the same on RISC-V.

To avoid -Werror=format-zero-length move a '\n' to the string passed to
panic. We don't need a message here as depending on CONFIG_PANIC_HANG we
will either see

    ### ERROR ### Please RESET the board ###

or

    resetting ...

as next message.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-14 15:16:41 +08:00
Brad Kim
fb33eaa3a2 riscv: fix the wrong swap value register
Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value

Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-12-14 15:16:34 +08:00
Simon Glass
b7bbd553de checkpatch: Add warnings for unexpected struct names
As a way of keeping the driver declarations more consistent, add a warning
if the struct used does not end with _priv or _plat.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
b012ff1f1b dm: treewide: Update 'auto' declarations to be on one line
Fix up the code style for those declarations that should now fit onto one
line, which is all of them that currently do not.

This is needed for dtoc to detect the structs correctly, at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
c69cda25c9 dm: treewide: Rename dev_get_platdata() to dev_get_plat()
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
4f50086ad6 dm: Rename 'platdata_size' to 'plat_size'
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Simon Glass
78128d52df dtoc: Tidy up more Python style in dtb_platdata
Update this file to reduce the number of pylint warnings. Also add a few
missing comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
8ee05b5f90 dm: core: Drop unused parameter from dm_extended_scan_fdt()
This doesn't need to be passed the devicetree anymore. Drop it.
Also rename the function to drop the _fdt suffix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
725e4fce61 dm: core: Drop unused parameter from dm_scan_fdt()
This doesn't need to be passed the devicetree anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
2ebea5eaeb dm: core: Combine the flattree and livetree binding code
At present there are two copies of this code. With ofnode we can combine
them to reduce duplication. Update the dm_scan_fdt_node() function and
adjust its callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
d0c20ce6bc dm: core: Add an ofnode function to get the devicetree root
This is needed in at least one place. Avoid the conditional code in root.c
by adding this inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
e80be74934 dm: core: Drop device_bind_offset()
This function is not needed since the standard device_bind() can be used
instead. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
0d56fba3c4 dm: core: Drop dev_set_of_offset()
This pre-livetree function is not needed anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
20da4e0231 dm: Drop uses of dev_set_of_offset()
The need for this can be avoided by passing the correct node to the
device_bind() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
a2703ce10c dm: Remove uses of device_bind_offset()
This function is not needed since the standard device_bind() can be used
instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
0de1b07406 dm: core: Add a livetree function to check node status
Add a way to find out if a node is enabled or not, based on its 'status'
property.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
734206dda1 dm: core: Rename device_bind_ofnode() to device_bind()
This is the standard function to use when binding devices. Drop the
'_ofnode' suffix to make this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
e12052b322 dm: core: Rename device_bind() to device_bind_offset()
This function is not necessary anymore, since device_bind_ofnode() does
the same thing and works with both flattree and livetree.

Rename it to indicate that it is special.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Heinrich Schuchardt
6ca5ff3f20 test: unit test for exception command
Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Heinrich Schuchardt
04cc7914f2 efi_selftest: implement exception test for sandbox
Provide a unit test that causes an illegal instruction to occur.

The test can be run with the following commands:

    => setenv efi_selftest exception
    => bootefi selftest

This might be the output:

    Executing 'exception'
    EFI application triggers exception.
    Illegal instruction
    pc = 0x1444d016, pc_reloc = 0xffffaa078e8dd016
    UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
    UEFI image [0x000000001444b000:0x0000000014451fff] pc=0x2016 '/bug.efi'
    Resetting ...

It would tell us that the exception was triggered by an instruction
0x2016 bytes after the load address of the binary with filename /bug.efi.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Heinrich Schuchardt
3a5ec03578 cmd: sandbox: implement exception command
Implement the commands

* exception undefined - execute an illegal instruction
* exception sigsegv - cause a segment violation

Here is a possible output:

    => exception undefined
    Illegal instruction
    pc = 0x55eb8d0a7575, pc_reloc = 0x57575
    Resetting ...

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Heinrich Schuchardt
b46f30a378 sandbox: add handler for exceptions
Add a handler for SIGILL, SIGBUS, SIGSEGV.

When an exception occurs print the program counter and the loaded
UEFI binaries and reset the system if CONFIG_SANDBOX_CRASH_RESET=y
or exit to the OS otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
21f9075def sandbox: serial: Update to use membuff
Rather than implementing our own circular queue, use membuff. This allows
us to read multiple bytes at once into the serial input.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
1bf0a40219 sandbox: serial: Convert to livetree
Use a livetree function to read the colour.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
c5ea0167be serial: sandbox: Drop unnecessary #ifdefs
CONFIG_OF_CONTROL is always enabled for sandbox (as it should be for all
boards), so we can drop it. Also use IS_ENABLED() for the SPL check.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
9b3303822d dtoc: Tidy up Python style in dtb_platdata
Update this, mostly to add comments for argument and return types. It is
probably still too early to use type hinting since it was introduced in
3.5.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
479dd30f4a patman: Drop tools.ToChar() and ToChars()
This is useful anymore, since we always want to call chr() in Python 3.
Drop it and adjust callers to use chr().

Also drop ToChars() which is no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
6a4ccad8e0 patman: Drop tools.ToByte()
This is not needed in Python 3. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
fc0056e8d5 patman: Drop unicode helper functions
We don't need these now that everything uses Python 3. Remove them and
the extra code in GetBytes() and ToBytes() too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
5ea9dccf02 fdt: Use an Enum for the data type
Use an Enum instead of the current ad-hoc constants, so that there is a
data type associated with each 'type' value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Tom Rini
5a1a8a63be Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel fixes for 2021.01 cycle

This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.
2020-12-11 15:55:17 -05:00
Eugen Hristev
bb5eedbc7f ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible
The correct compatible for this eeproms is microchip,24aa02e48
The previous compatible string was working up to U-boot 2020.04.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2020-12-11 17:47:21 +02:00
Tom Rini
298a62960f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add lx2162 soc, lx2162qds support.
- Bug-fixes related ls102x-usb, ifc, bootcmd, secure-boot header,
- rgmii, vid, fdt, env variable, pci for Layerscape products
2020-12-11 09:35:03 -05:00
Tom Rini
ddaa949785 Merge tag 'efi-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi into next
Pull request for UEFI sub-system for next

Bug fixes

* avoid corruption of FAT file system when using long names
* correct values for RuntimeServicesSupport concerning UEFI capsule update
* link partition to block device via EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER

New feature

* support EFI_LOAD_FILE_PROTOCOL in LoadImage() boot service
2020-12-10 13:54:33 -05:00
Hui Song
ca0c7a5e4a configs: lx2162aqds: Enable gpio driver in defconfig
make lx2162aqds platform to enable gpio driver.

Signed-off-by: Hui Song <hui.song_1@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Aleksandar Gerasimovski
2ef53647d1 arm: ls102xa: select USB PHY erratum's only if USB is enabled
The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.

On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Aleksandar Gerasimovski
bb1828f345 drivers: ifc: add define for IFC_CSPRn TE bit
To drive TE pin high is supported IFC configuration that can be used on
some designs.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Chris Packham
0606bf2b7c powerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNT
If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Alban Bedel
cbf77d2018 armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A
When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.

First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.

Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.

Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Biwen Li
164941c2c4 net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
Read PFE ESBC header flash with spi_flash_read API
- logs as follows,
  Net:   SF: Detected s25fs512s with page size 256 Bytes, erase size 256
  KiB, total 64 MiB
  "Synchronous Abort" handler, esr 0x96000210
  elr: 000000008206db44 lr : 0000000082004ea0 (reloc)
  elr: 00000000b7ba6b44 lr : 00000000b7b3dea0
  x0 : 00000000b79407e8 x1 : 0000000040640000
  x2 : 0000000000000050 x3 : 0000000000000000
  x4 : 000000000000000a x5 : 0000000000000050
  x6 : 0000000000000366 x7 : 00000000b7942308
  x8 : 00000000b76407c0 x9 : 0000000000000008
  x10: 0000000000000044 x11: 00000000b7634d1c
  x12: 000000000000004f x13: 0000000000000044
  x14: 00000000b7634d98 x15: 00000000b76407c0
  x16: 0000000000000000 x17: 0000000000000000
  x18: 00000000b7636dd8 x19: 0000000000000000
  x20: 00000000b79407d0 x21: 00000000b79407e8
  x22: 0000000040640000 x23: 00000000b7634e58
  x24: 0000000000000000 x25: 0000000003800000
  x26: 00000000b7bdd000 x27: 0000000000000000
  x28: 0000000000000000 x29: 00000000b7634d10

  Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826)
  Resetting CPU ...

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Manish Tomar
4ed00656a9 lx2160a: Fix address for secure boot headers
Update kernel_size_sd variable with correct value for lx2160a.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Manish Tomar
507103f8a9 ls1043a: Fix address for secure boot headers
Update kernelheader_addr and kernelheader_addr variables with
correct values for ls1043a.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Priyanka Singh
03d095e87d layerscape: fdt.c: Check for NULL return value from fdt_getprop()
Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Madalin Bucur
848a2efd14 board: freescale: powerpc: add support for all RGMII modes
Make sure all RGMII internal delay modes are covered.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Madalin Bucur
ccedd4ff8e armv8: ls1043/ls1046aqds: add support for all RGMII modes
Make sure all RGMII internal delay modes are covered.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Priyanka Singh
f6cb837721 board: freescale: vid.c: Initialize variable 'i2caddress'
Initialize variable 'i2caddress' in adjust_vdd() to zero

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Biwen Li
fc9a3d1b29 include/configs: ls1012aqds: add default environment variable
This adds default environment variable for ls1012aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Biwen Li
e343ae7c96 board/freescale/common: fix a bug that failed to read/write eeprom on ls1021atsn
Fix a bug that failed to read/write eeprom on ls1021atsn

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Hou Zhiqiang
ee7c1225e3 pci: layerscape: fix a dead loop issue
Fixes: commit 8ec619f8fd ("pci: layerscape: Fixup PCIe EP
	mode DT nodes for LX2160A rev2")

This added the PCIe EP nodes fixup of LX2160A, but it
didn't update the condition value when there isn't a
property 'apio-wins'.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Fixed checkpatch error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Yangbo Lu
8114791aeb configs: lx2162aqds: enable eMMC HS400 mode support
Enable eMMC HS400 mode support on LX2162AQDS.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Yangbo Lu
9ff0fc8f77 configs: lx2162aqds: enable CONFIG_BOARD_EARLY_INIT_R
Enable CONFIG_BOARD_EARLY_INIT_R for SDHC adapter card
identification and configuration.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Ruchika Gupta
fd1f8c691d configs: lx2162a: Enable OPTEE support
Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2162

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
9ed303dfa9 armv8: lx2162aqds: Add support for LX2162AQDS platform
This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
3a187cff7a armv8: lx2162a: Add Soc changes to support LX2162A
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
2a29a9a1b4 drivers/net/phy: Add CORTINA_NO_FW_UPLOAD to Kconfig
Move CORTINA_NO_FW_UPLOAD to Kconfig file so that it can
be controlled via defconfig files.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
1255f8bc36 pci: ls_pcie_g4: Add size check for config resource
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
49df7c9086 pci: layerscape: Add size check for config resource
resource "config" is required to have minimum 8KB space
as per hardware documentation.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
4c72d2d53b arm: dts: ls1028a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
04c2d93d36 arm: dts: ls1043a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
6ba8b6a8f8 arm: dts: ls1012a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
7dfc20ab1d arm: dts: ls1088a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
ba45dd21f3 arm: dts: ls2080a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
2adb7970cb arm: dts: ls1046a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
6519ccd282 arm: dts: lx2160a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:38 +05:30
Wasim Khan
eac364416c pci: ls_pcie_g4: Print pcie controller number starting from 1
Print pcie controller number starting from 1

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
2020-12-10 13:56:38 +05:30
Wasim Khan
b6c6a245bf pci: layerscape: Update print of pcie controller
Print pcie controller number starting from 1

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Trimmed subject]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:38 +05:30
Wasim Khan
07f29f0217 configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4
LX2160A-Rev1 uses PCIe layerscape Gen4 controller.
Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:38 +05:30
Heinrich Schuchardt
264485131c efi_loader: link partition to block device
We provide a UEFI driver for block devices. When ConnectController() is
called for a handle with the EFI_BLOCK_IO_PROTOCOL this driver creates the
partitions. When DisconnectController() is called the handles for the
partitions have to be deleted. This requires that the child controllers
(partitions) open the EFI_BLOCK_IO_PROTOCOL of the controller (block IO
device) with attribute EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:33 +01:00
Heinrich Schuchardt
f9ad240e65 efi_loader: make efi_protocol_open() non-static
Provide efi_protocol_open() as library function.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:33 +01:00
Heinrich Schuchardt
7f8e656338 efi_selftest: test EFI_LOAD_FILE_PROTOCOL
A unit test is supplied to test the support for the EFI_LOAD_FILE_PROTOCOL
and the EFI_LOAD_FILE2_PROTOCOL by the LoadImage() boot service.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:33 +01:00
Heinrich Schuchardt
6d78ca8360 efi_selftest: clean up Makefile
Bring all obj-y entries together.

Sort *.o targets.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:33 +01:00
Heinrich Schuchardt
3da0b28582 efi_loader: support EFI_LOAD_FILE_PROTOCOL
Support loading images via the EFI_LOAD_FILE_PROTOCOL and
EFI_LOAD_FILE2_PROTOCOL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
0e074d1239 efi_loader: carve out efi_load_image_from_file()
efi_load_image_from_file() should read via either of:

* EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
* EFI_LOAD_FILE_PROTOCOL
* EFI_LOAD_FILE2_PROTOCOL

To make the code readable carve out a function to load the image via the
file system protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
c06c55b1f5 efi_loader: pass boot_policy to efi_load_image_from_path
Implementing support for loading images via the EFI_LOAD_FILE_PROTOCOL
requires the boot policy as input for efi_load_image_from_path().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
b6f11098c9 efi_loader: move EFI_LOAD_FILE2_PROTOCOL_GUID
The EFI_LOAD_FILE_PROTOCOL_GUID and EFI_LOAD_FILE2_PROTOCOL_GUID are needed
to complement the implementation of the LoadFile() boot service.

Remove a duplicate declaration of a variable for the
EFI_LOAD_FILE2_PROTOCOL_GUID.
Move the remaining declaration to efi_boottime.c.
Add a variable for the EFI_LOAD_FILE_PROTOCOL_GUID.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
0e9d2d7bc2 efi_loader: resequence functions in efi_boottime.c
For implementing support for the EFI_LOAD_FILE_PROTOCOL in the LoadImage()
service we will have to call the LocateDevicePath() service. To avoid a
forward declaration resequence the functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
861072b2a8 efi_loader: remove EFI_HII_CONFIG_ROUTING_PROTOCOL
Our implementation of the EFI_HII_CONFIG_ROUTING_PROTOCOL is a mere stub,
where all services return an error code. The protocol is neither needed for
the EFI shell nor for the UEFI SCT. To reduce the code size remove it from
the U-Boot binary.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
470fa190f3 efi_loader: don't set EFI_RT_SUPPORTED_UPDATE_CAPSULE
The EFI_RT_PROPERTIES_TABLE configuration table indicates which runtime
services are available at runtime.

Even if CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y, we neither support
UpdateCapsule() nor QueryCapsuleCapabilities() at runtime. Thus we should
not set the corresponding flags EFI_RT_SUPPORTED_UPDATE_CAPSULE and
EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES in RuntimeServicesSupported.

Fixes: 2bc27ca8a0 ("efi_loader: define UpdateCapsule api")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:32 +01:00
Heinrich Schuchardt
3d20d212cf fs: fat: deletion of long file names
Long file names are stored in multiple directory entries. When deleting a
file we must delete all of them.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:00 +01:00
Heinrich Schuchardt
89735b44c4 fs: fat: first dentry of long name in FAT iterator
A long name is split over multiple directory entries. When deleting a file
with a long name we need the first directory entry to be able to delete the
whole chain.

Add the necessary fields to the FAT iterator:

* cluster of first directory entry
* address of first directory entry
* remaining entries in cluster

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:15:00 +01:00
Heinrich Schuchardt
4a593dd0c5 fs: fat: use constant DELETED_FLAG
When deleting a directory entry 0xe5 is written to name[0].

We have a constant for this value and should use it consistently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
1e51c8d64a fs: fat: search file should not allocate cluster
Searching for a file is not a write operation. So it should not lead to the
allocation of a new cluster to the directory.

If we reuse deleted entries, we might not even use the new cluster and due
to not flushing it the directory could be corrupted.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
3049a5106c fs: fat: reuse deleted directory entries
When creating new directory entries try to reuse entries marked as deleted.

In fill_dir_slot() do not allocate new clusters as this has already been
done in fat_find_empty_dentries().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
32a5f887c4 fs: fat: fat_find_empty_dentries()
Provide a function to find a series of empty directory entries.

The current directory is scanned for deleted entries.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
569b0e1938 fs: fat: flush new directory cluster
When handling long file names directory entries may be split over multiple
clusters. We must make sure that new clusters are zero filled on disk.

When allocating a new cluster for a directory flush it.

The flushing should be executed before updating the FAT. This way if
flushing fails, we still have a valid directory structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
7557c84855 fs: fat: set start cluster for root directory
When iterating over a child directory we set itr->start_clust.
Do the same when over the root directory.

When looking for deleted directory entries or existing short names we will
have to iterate over directories a second and third time. With this patch
we do not need any special logic for the root directory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
27ed690382 fs: fat: dentry iterator for fill_dir_slot()
For reusing deleted directory entries we have to adjust the function called
to step to the next directory entry.

This patch alone is not enough to actually reuse deleted directory entries
as the fill_dir_slot() is still called with first never used directory
entry.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
3a331aee56 fs: fat: generate unique short names
File names must be unique within their directory. So before assigning a
short name we must check that it is unique.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
57b745e238 fs: fat: call set_name() only once
In set_name() we select the short name. Once this is correctly implemented
this will be a performance intensive operation because we need to check
that the name does not exist yet. So set_name should only be called once.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
a343249bef fs: fat: pass shortname to fill_dir_slot
Currently we pass the short name via the directory iterator.
Pass it explicitly as a parameter.

This removes the requirement to set the short name in the iterator before
writing the long name.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:59 +01:00
Heinrich Schuchardt
28cef9ca2e fs: fat: create correct short names
The current function set_name() used to create short names has the
following deficiencies resolved by this patch:

* Long names (e.g. FOO.TXT) are stored even if a short name is enough.
* Short names with spaces are created, e.g. "A     ~1.TXT".
* Short names with illegal characters are created, e.g. "FOO++BAR".
* Debug output does not not consider that the short file name has no
  concluding '\0'.

The solution for the following bug is split of into a separate patch:

* Short file names must be unique.

This patch only provides the loop over possible short file names.

Fixes: c30a15e590 ("FAT: Add FAT write feature")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:58 +01:00
Heinrich Schuchardt
d236e825a2 fs: fat: export fat_next_cluster()
Rename function next_cluster() to fat_next_cluster() and export it.

When creating a new directory entries we should reuse deleted entries.
This requires re-scanning the directory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:58 +01:00
Heinrich Schuchardt
c5924118c0 fs: fat: correct first cluster for '..'
The FAT specification [1] requires that for a '..' directory entry pointing
to the root directory the fields DIR_FstClusHi and DIR_FstClusLo are 0.

[1] Microsoft FAT Specification, Microsoft Corporation, August 30 2005

Fixes: 31a18d570d ("fs: fat: support mkdir")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-12-10 09:14:58 +01:00
Tom Rini
2a42de6df1 Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
2020-12-09 11:36:41 -05:00
Marek Vasut
9b36b7dc96 ARM: dts: stm32: Add USB OTG ID pin on DH AV96
Add USB OTG ID pin mux and switch the USB OTG port
from peripheral to OTG mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
1399be91cb ARM: dts: stm32: Enable SDMMC3 on DH DRC02
The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
75df748b87 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
845c6720ec ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
b52b9330c6 .mailmap: map Patrick Delaunay and my email address
Add our new email address dedicated for upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
5905e0880a MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emails
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Manuel Reis
81d4c4e45c add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition

Voids the need to set such partition as bootable to work with the
'dev:auto' tuple

Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Tom Rini
19ea606109 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2020-12-08 09:53:03 -05:00
Alexandru Gagniuc
03f1f78a9b spl: fit: Prefer a malloc()'d buffer for loading images
Fit images were loaded to a buffer provided by spl_get_load_buffer().
This may work when the FIT image is small and fits between the start
of DRAM and SYS_TEXT_BASE.

One problem with this approach is that the location of the buffer may
be manipulated by changing the 'size' field of the FIT. A maliciously
crafted FIT image could place the buffer over executable code and be
able to take control of SPL. This is unacceptable for secure boot of
signed FIT images.

Another problem is with larger FIT images, usually containing one or
more linux kernels. In such cases the buffer be be large enough so as
to start before DRAM (Figure I). Trying to load an image in this case
has undefined behavior.
For example, on stm32mp1, the MMC controller hits a RX overrun error,
and aborts loading.
    _________________
   |    FIT Image    |
   |                 |
  /===================\                        /=====================\
  ||      DRAM       ||                        |        DRAM         |
  ||                 ||                        |                     |
  ||_________________||  SYS_TEXT_BASE         | ___________________ |
  |                   |                        ||     FIT Image     ||
  |                   |                        ||                   ||
  | _________________ |  SYS_SPL_MALLOC_START  || _________________ ||
  ||  malloc() data  ||                        |||  malloc() data  |||
  ||_________________||                        |||_________________|||
  |                   |                        ||___________________||
  |                   |                        |                     |

        Figure I                                       Figure II

One possibility that was analyzed was to remove the negative offset,
such that the buffer starts at SYS_TEXT_BASE. This is not a proper
solution because on a number of platforms, the malloc buffer() is
placed at a fixed address, usually after SYS_TEXT_BASE. A large
enough FIT image could cause the malloc()'d data to be overwritten
(Figure II) when loading.

          /======================\
          |        DRAM          |
          |                      |
          |                      |   CONFIG_SYS_TEXT_BASE
          |                      |
          |                      |
          | ____________________ |   CONFIG_SYS_SPL_MALLOC_START
          ||   malloc() data    ||
          ||                    ||
          || __________________ ||
          |||    FIT Image     |||
          |||                  |||
          |||                  |||

                 Figure III

The solution proposed here is to replace the ad-hoc heuristics of
spl_get_load_buffer() with malloc(). This provides two advantages:
    * Bounds checking of the buffer region
    * Guarantees the buffer does not conflict with other memory

The first problem is solved by constraining the buffer such that it
will not overlap currently executing code. This eliminates the chance
of a malicious FIT being able to replace the executing SPL code prior
to signature checking.

The second problem is solved in conjunction with increasing
CONFIG_SYS_SPL_MALLOC_SIZE. Since the SPL malloc() region is
carefully crafted on a per-platform basis, the chances of memory
conflicts are virtually eliminated.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2020-12-07 17:40:34 -05:00
Tom Rini
cd833de059 Merge branch '2020-12-07-bootm-and-spl-atf-improvements' into next
- Series to improve "bootm" by allowing variable evaluation within the
  cmdline we would be passing.  This will help with Chrome OS but can be
  useful elsewhere.
- Improve ATF (TF-A) support within SPL.
2020-12-07 17:16:23 -05:00
Tom Rini
ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00
Tom Rini
8c5ea5361c configs: migrate CONFIG_IMX_THERMAL to defconfigs
Done via moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-07 08:54:29 +01:00
Baruch Siach
6cb007a1c7 imx8mp_evk: README instruction fixes
Use the full name of firmware self extracting file to make it run.

Also, don't use sudo when not needed.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-12-07 08:54:29 +01:00
Oliver Graute
eb38171034 doc: board: imx8qm-rom7720-a1.rst: convert readme to reST
Convert README to reStructuredText format.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2020-12-07 08:54:20 +01:00
Claudiu Beznea
8454cf0d23 clk: at91: sam9x60: remove the parsing of atmel, main-osc-bypass
Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60
have no support for crystal oscillator bypass. Setting this bit might
affect the device functionality.

Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-12-07 09:36:45 +02:00
Pali Rohár
061c6d1b23 arm: mvebu: Espressobin: Detect presence of emmc at runtime
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.

This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-12-07 07:11:37 +01:00
Pali Rohár
135973967b arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.

Code for emmc is extracted from commit f1a43c84a9 ("arm64: dts: a3720:
add support for espressobin with populated emmc").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
2020-12-07 07:11:37 +01:00
Pali Rohár
c5c4b69857 Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit f1a43c84a9.
2020-12-07 07:11:37 +01:00
Pali Rohár
338c5ee26a Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit 03bb6a9b1e.
2020-12-07 07:11:37 +01:00
Joshua Scott
28f0cbcdd2 arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.

As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Luka Kovacic
5115de8d64 arm: mvebu: puzzle-m801: Add a maintainer
Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Igor Opaniuk
89f7d08b2a colibri-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
5d39967dcf apalis-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
90311be09f apalis-imx8: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
2f36a693e3 imx8: allow overriding memory layout
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
3730106cf0 doc: board: apalis-imx8x: add documentation
This documents the u-boot build and deployment procedure.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
a51fdba3fa board: toradex: add apalis-imx8x 2gb wb it v1.1a module support
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
3d1103cefc ARM: dts: fsl-imx8qxp-apalis: add initial device tree
Introduce initial hierarchy of device trees for Apalis iMX8X
System on Module.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Tim Harvey
bc479b2118 imx8m: fix cache setup for dynamic sdram size
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
72a1b9a977 verdin-imx8mm: automatic ram size detection
Implement board_phys_sdram_size() to automatically detect Verdin iMX8M
Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB.

Note: This only works if we keep using similar RAM chips!

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
2a1a2559fb toradex: tdx-cfg-clock: fix i.mx 8m mini interactive
Now with them first Verdin iMX8M Mini DualLite modules in for bring-up
we got clarity how is_cpu_type() actually behaves.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
b8eecbac6a verdin-imx8mm: spl: enable pca9450 i2c level translator
Enable PCA9450 i2c level translator, as this is used for the
on module ADC.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
423ca964c3 verdin-imx8mm: implement hardware version detection
And select the correct devicetree accordingly by setting the variant
environment variable.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
7d43807d6c verdin-imx8mm: spl: switch to pca9450 pmic
V1.1A HW switched the PMIC from BD71837 to PCA9450.

- Disable combined DVS in PCA9450_BUCK123_DVS.
- Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM.
- Configure WDOG_B behaviour.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
caafc6c497 ARM: dts: imx8mm-verdin: follow changed pmic
The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A.
Adjust the device tree accordingly.
Remove the old ADC node as the ADC has been changed and has no longer
a separate power rail.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
8f9abdf4d4 power: pmic: add SPL_DM_PMIC_PCA9450 symbol to Kconfig
Add SPL_DM_PMIC_PCA9450 symbol to Kconfig.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
5d89afe27f pca9450a: fix i2c address
The I2C address is 0x25, not 0x35. This according to the datasheet and
tests with a PCA9450A.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
a5b5ad4d85 toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skus
Add new i.MX 8M Mini/Plus SKUs to ConfigBlock handling:

0058: Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT

0059: Verdin iMX8M Mini Quad 2GB IT

0060: Verdin iMX8M Mini DualLite 1GB WB IT

0061: Verdin iMX8M Plus Quad 2GB

Rename existing SKU (use correct one):
Verdin iMX8M Nano SoloLite 1GB -> Verdin iMX8M Nano Quad 1GB Wi-Fi

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2020-12-06 15:31:37 +01:00
Haibo Chen
5d772196d9 mmc: fsl_esdhc_imx: optimize the timing setting
For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the
card clock will be divied by 2 automatically by the host. So need
to first config the DDR_EN correctly, then update the card clock.
This will make sure the actual card clock is as our expected.
IC also suggest config the DDR_EN firstly, then config the clock
divider.

For HS400/HS400ES mode, need to config the strobe dll, this need
to based on the correct target clock rate, so need to do this after
clock rate is update.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:37 +01:00
Oliver Graute
ea51af2fdd imx: imx8qm_rom7720_a1: add missing DTS to the MAINTAINERS
add the dts file to the MAINTAINERS entry

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:37 +01:00
Ian Ray
4f1970f437 board: ge: bx50v3: check b850v3 power management watchdog
Set `bootcause' from b850v3 power management watchdog status.

Boot cause "REVERT" is no longer used, remove it.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:37 +01:00
Ian Ray
559aaa2526 board: ge: reduce VPD EEPROM partition size
Reduce vital product data size to match the latest specification.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:37 +01:00
Sebastian Reichel
2d86fb31bd board: ge: bx50v3: reduce magic numbers
Use VPD product ID instead of confidx, so that we can easily reuse the
product ID defines and avoid some magic numbers.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00
Sebastian Reichel
822e1b31bd board: ge: bx50v3: drop unused pinmux defines
Remove pinmux defines, that are no longer used after
converting the code to devicetree.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00
Ian Ray
f2ac6f7796 board: ge: bx50v3: correct CONFIG_CMD_NFS
Fix typo in NFS command configuration check.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00
Sebastian Reichel
c4c2d2465e board: ge: common: vpd: fix name
Commit f692b479f0 changed the VPD partition name from "vpd" to
"vpd@0". Fix the VPD reader code to use the new name, so that
the VPD code keeps working.

Fixes: f692b479f0 ("i2c: eeprom: Use reg property instead of offset and size")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00
Haibo Chen
b5874b552f mmc: fsl_esdhc_imx: add wait_dat0() support
Add wait_dat0() support, upper layer will use this callback.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
b15cd88b22 imx: ahab: fix implicit declaration warning
Fix the following warning:

arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
   flush_dcache_range(s, e);
   ^~~~~~~~~~~~~~~~~~

Include cpu_func.h header which declares the flush_dcache_range()
function.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
492b728f9f imx: ahab: fix compiler warnings in debug
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
   debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",

Fix those by using "%lu" specified.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
f4433e7f27 imx: ahab: Fix compiler warnings in printf
arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects
argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long
long unsigned int}’ [-Wformat=]

Fix those by using %llx

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
61eb1fe568 imx: clk: added IPG Clock for I2C on imx8qm
This patch fixes this clk issue on I2C on imx8qm

 => i2c bus
 Bus 3:  i2c@5a830000
 => i2c dev 3
 Setting bus to 3
 Failed to enable ipg clk
 Failure changing bus number (-524)

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-12-06 15:07:51 +01:00
Heiko Schocher
7a8d18da4b imx: aristainetos: enable U-Boot Environment variables protection
enable Environment protection with:

CONFIG_ENV_APPEND=y
CONFIG_ENV_WRITEABLE_LIST=y
CONFIG_ENV_ACCESS_IGNORE_FORCE

and add board specific env_get_location()
function.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:40 +01:00
Heiko Schocher
68163c3bf0 arm: dts: aristainetos: sync with changes in linux
sync with comaptible changes in linux from
Krzysztof Kozlowski.

https://patchwork.kernel.org/project/linux-arm-kernel/patch/20200930190143.27032-12-krzk@kernel.org/

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:35 +01:00
Heiko Schocher
015c026f7a imx6: add support for aristainetos2c_cslb board variant
add support for aristainetos2c_cslb board variant.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:06 +01:00
Heiko Schocher
3cf02f5ffa imx6: remove not longer supported aristainetos boards
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.

Adapt board code to remove stuff not needed anymore.

Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.

Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
2020-12-06 15:06:16 +01:00
Tom Rini
837d034d9a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
- Assorted updates
2020-12-05 15:41:18 -05:00
Simon Glass
51bb33846a bootm: Support string substitution in bootargs
In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

  setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
		kern_guid=${uuid}"
  part uuid mmc 2:2 uuid
  bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 19:48:29 -05:00
Simon Glass
1a62d64c7d cli: Support macro processing with a fixed-size buffer
At present cli_simple_process_macros() requires that the caller provide
an output buffer that is exactly CONFIG_SYS_CBSIZE bytes in length. This
makes sense since it is designed to be used from the command line. But we
also want to use it for bootargs substitution.

Update the function to allow the caller to specify the buffer size. Also
return an error if the buffer is exhausted. The caller can ignore that if
preferred.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:10:01 -05:00
Simon Glass
488d89afb8 x86: zimage: Add silent-console processing
At present zimage does its own command-line processing and does not
support the 'silent console' feature. There doesn't seem to be any good
reason for this.

Add support for silent console to zimage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:10:00 -05:00
Simon Glass
4448fe8e4e bootm: Allow updating the bootargs in a buffer
At present we only support updating the 'bootargs' environment
variable. Add another function to update a buffer instead. This will
allow zimage to use this feature.

Also add a lot more tests to cover various cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
b3c01678fd bootm: Update bootm_process_cmdline_env() to use flags
At present only one transformation is supported: making the Linux console
silent. To prepare for adding more, convert the boolean parameter into a
flag value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
b6386f3841 bootm: Split out bootargs environment reading / writing
At present bootm_process_cmdline_env() reads the 'bootargs' variable and
then writes it back afterwards. This is painful for tests, which would
rather use a simple buffer.

It is also useful for zimage to use a buffer, since it does not actually
put the Linux command line in the bootargs variable.

Refactor the existing code into two pieces. One handles reading and
writing the environment variable, as well as allocating a buffer for use
by the rest of the code, which now operates on a buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
6cd92b1a7c bootm: Use size rather than length for CONSOLE_ARG
Use the size (including terminator) for in this function, rather than
the length. This is arguably easier to follow, with the coming
refactor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
d9477a0a4d bootm: Add a bool parameter to bootm_process_cmdline_env()
This function will soon do more than just handle the 'silent linux'
feature. As a first step, update it to take a boolean parameter,
indicating whether or not the processing is required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
4dcb81545a bootm: Rename fixup_silent_linux()
We want to add more processing to this function. Before doing so, rename
it to bootm_process_cmdline_env(), which is more generic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
4ae42643d0 bootm: Update fixup_silent_linux() to return an error
At present this function fails silently on error. Update it to produce
an error code. Report this error to the user and abort the boot, since it
likely will prevent a successful start.

No tests are added at this stage, since additional refactoring is taking
place in subsequent patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
f158ba15ee bootm: Add tests for fixup_silent_linux()
This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Simon Glass
96434a76fd env: Allow returning errors from hdelete_r()
At present this function returns 1 on success and 0 on failure. But in
the latter case it provides no indication of what went wrong.

If an attempt is made to delete a non-existent variable, the caller may
want to ignore this error. This happens when setting a non-existent
variable to "", for example.

Update the function to return 0 on success and a useful error code on
failure. Add a function comment too.

Make sure that env_set() does not return an error if it is deleting a
variable that doesn't exist. We could update env_set() to return useful
error numbers also, but that is beyond the scope of this change.

Signed-off-by: Simon Glass <sjg@chromium.org>

wip
2020-12-04 16:09:06 -05:00
Michael Walle
4c450daf7d board: sl28: add OP-TEE Trusted OS support (bl32)
Add support to load the OP-TEE Trusted OS by the SPL.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
e057760f38 board: sl28: add ATF support (bl31)
Add support to load the bl31 part of the ARM Trusted Firmware by the
SPL.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
ea22783f40 board: sl28: remove u-boot from loadable DT node
It is not needed. Remove it.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
8084e918bc armv8: layerscape: don't initialize GIC in SPL
The BL31 expects the GIC to be uninitialized. Thus, if we are loading
the BL31 by the SPL we must not initialize it. If u-boot is loaded by
the SPL directly, it will initialize the GIC again (in the same
lowlevel_init()).

This was tested on a custom board with SPL loading the BL31 and jumping
to u-boot as BL33 as well as loading u-boot directly by the SPL. In case
the ATF BL1/BL2 is used, this patch won't change anything, because no
SPL is used at all.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
7b866825cd spl: atf: add support for LOAD_IMAGE_V2
Newer platforms use the LOAD_IMAGE_V2 parameter passing method. Add
support for it.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
553825c109 spl: atf: remove helper structure from common header
bl2_to_bl31_params_mem is just an implementation detail of the SPL ATF
support and is not needed anywhere else. Move it from the header to the
actual module.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-12-04 16:09:05 -05:00
Michael Walle
d2cb0c8f75 spl: atf: provide a bl2_plat_get_bl31_params_default()
Move the actual implementation of the bl2_plat_get_bl31_params() to its
own function. The weak function will just call the default
implementation. This has the advantage that board code can still call
the original implementation if it just want to modify minor things.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:05 -05:00
Michael Walle
37c218a06e spl: atf: move storage for bl31_params into function
There is no need to have the storage available globally. This is also a
preparation for LOAD_IMAGE_V2 support. That will introduce a similar
generator function which also has its own storage.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-12-04 16:09:05 -05:00
Michael Walle
59b07a257c treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORT
There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT.
Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-12-04 16:09:05 -05:00
Patrick Delaunay
4f5128ff89 configs: cei-tk1-som: remove CONFIG_ARMV7_PSCI in include file
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.

Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.

Hi,

This patch depend on the previous serie [1].

I don't test this patch on real hardware but
after this patch the size of the binary don't change.

In .config we have:
  CONFIG_ARCH_SUPPORT_PSCI=y
  CONFIG_ARMV7_PSCI=y
  # CONFIG_ARMV7_PSCI_1_0 is not set
  # CONFIG_ARMV7_PSCI_0_2 is not set
  CONFIG_ARMV7_PSCI_0_1=y
  CONFIG_ARMV7_PSCI_NR_CPUS=4

In u-boot.cfg, this patch only add the 2 lines
  #define CONFIG_ARCH_SUPPORT_PSCI 1
  #define CONFIG_ARMV7_PSCI_0_1 1

[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029

Regards
Patrick

END

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:39:15 -07:00
Peter Robinson
fe669925cb arm: tegra: add options for BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186
Upstream linux DT naming doesn't align with the U-Boot DT, which may
not always be the case so this allows using BOOTENV_EFI_SET_FDTFILE_FALLBACK
where it might be appropriate for some boards.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:30:42 -07:00
Peter Robinson
632fb978a5 arm: tegra: define fdtfile option for distro boot
For booting via UEFI we need to define the fdtfile option so
bootefi has the option to load a fdtfile from disk. For arm64
the kernel dtb is located in a vendor directory so we define
that as nvidia for that architecture.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:30:16 -07:00
Marcel Ziswiler
1b56cd868e colibri_t30: disable rs232 serial transceiver forceoff pins
Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
8e487f38cc apalis/colibri_t30: add note about colibri vs. nvidia uart mapping
The following mapping is applicable for Apalis T30:

Apalis UART1: NVIDIA UARTA
Apalis UART2: NVIDIA UARTD
Apalis UART3: NVIDIA UARTB
Apalis UART4: NVIDIA UARTC

The following mapping is applicable for Colibri T30:

Colibri UART-A: NVIDIA UARTA
Colibri UART-B: NVIDIA UARTD
Colibri UART-C: NVIDIA UARTB

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
4ba4bd0f87 apalis/colibri_t30: avoid uart input from floating pins
Avoid UART input from floating RX pins on UARTB and UARTC (Colibri T30)
and UARTB, UARTC and UARTD (Apalis T30).

Note: Floating pins may cause spurious break conditions potentially
interrupting U-Boot's autoboot.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
a6094e1b0a colibri_t30: fix spi1 and uart2/3 resp. uartb/c pinmuxing
Fix SPI1 and UART2/3 resp. UARTB/C pinmuxing.

Note: The former was illegally muxing multiple SoC balls onto the same
internal SoC signal which caused rather strange behaviour regarding
the RS232 serial transceiver ForceOFF# pins as available on Iris.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
bfe682e9dd apalis/colibri_t30: add comment about tristate and input vs. output pinmuxing
Add pinmuxing comment stating that TRISTATE means the output driver is
tri-stated and INPUT means the input driver is enabled vs. OUTPUT where
it is disabled.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Tom Rini
5157ea5261 Merge tag 'efi-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi into next
Pull request for UEFI sub-system for next

This pull request adds:

* eventlog support for TCG2_PROTOCOL
* UEFI capusule updates

It replace printf by log in efi_uclass.c
2020-12-03 16:21:51 -05:00
AKASHI Takahiro
3616b4f4b9 sandbox: enable capsule update for testing
Add more configuration options to allow for efi capsule update
on sandbox.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
4926e7d29a test/py: efi_capsule: test for raw image capsule
The test can run on sandbox build and it attempts to execute a firmware
update via a capsule-on-disk, using a raw image capsule,
CONFIG_EFI_CAPSULE_RAW.

To run this test successfully, you need configure U-Boot specifically;
See test_capsule_firmware.py for requirements, and hence it won't run
on Travis CI, at least, for now.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
450596f2ac test/py: efi_capsule: test for FIT image capsule
The test can run on sandbox build and it attempts to execute a firmware
update via a capsule-on-disk, using a FIT image capsule,
CONFIG_EFI_CAPSULE_FIT.

To run this test successfully, you need configure U-Boot specifically;
See test_capsule_firmware.py for requirements, and hence it won't run
on Travis CI, at least, for now.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
fab430be2f tools: add mkeficapsule command for UEFI capsule update
This is a utility mainly for test purpose.
  mkeficapsule -f: create a test capsule file for FIT image firmware

Having said that, you will be able to customize the code to fit
your specific requirements for your platform.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
7f35cedfd9 cmd: add "efidebug capsule" command
"efidebug capsule" is more or less a debugging utility.
  efidebug capsule update: invoke UpdateCapsule against data on memory
  efidebug capsule show: show a capsule header
  efidebug capsule result: dump a capsule result variable

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
bb7e71d33c efi_loader: add firmware management protocol for raw image
In this commit, a very simple firmware management protocol driver
is implemented. It will take a binary image in a capsule file and
apply the data using dfu backend storage drivers via dfu_write_by_alt()
interface.

So "dfu_alt_info" variable should be properly set to specify a device
and location to be updated. Please read README.dfu.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
f27c201485 efi_loader: add firmware management protocol for FIT image
In this commit, a very simple firmware management protocol driver
is implemented. It will take a common FIT image firmware in a capsule
file and apply the data using dfu backend storage drivers via
update_fit() interface.

So "dfu_alt_info" variable should be properly set to specify a device
and location to be updated. Please read README.dfu.

Fit image is a common file format for firmware update on U-Boot, and
this protocol works neatly just as a wrapper for one.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
8d99026f06 efi_loader: capsule: support firmware update
A capsule tagged with the guid, EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID,
is handled as a firmware update object.
What efi_update_capsule() basically does is to load any firmware management
protocol (or fmp) drivers contained in a capsule, find out an appropriate
fmp driver and then invoke its set_image() interface against each binary
in a capsule.
In this commit, however, loading drivers is not supported.

The result of applying a capsule is set to be stored in "CapsuleXXXX"
variable, but its implementation is deferred to a fmp driver.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:50 +01:00
AKASHI Takahiro
ed9349c697 efi_loader: capsule: add memory range capsule definitions
Memory range capsule gives us a way to notify that some memory regions
should be left untouched across the next reset.
See UEFI specification, section 8.5.3.

Since how we should handle this kind of capsule is totally up to
the system, no implementation will be added in this commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:49 +01:00
AKASHI Takahiro
c74cd8bd08 efi_loader: capsule: add capsule_on_disk support
Capsule data can be loaded into the system either via UpdateCapsule
runtime service or files on a file system (of boot device).
The latter case is called "capsules on disk", and actual updates will
take place at the next boot time.

In this commit, we will support capsule on disk mechanism.

Please note that U-Boot itself has no notion of "boot device" and
all the capsule files to be executed will be detected only if they
are located in a specific directory, \EFI\UpdateCapsule, on a device
that is identified as a boot device by "BootXXXX" variables.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:49 +01:00
AKASHI Takahiro
2bc27ca8a0 efi_loader: define UpdateCapsule api
In this commit, skeleton functions for capsule-related API's are
added under CONFIG_EFI_UPDATE_CAPSULE configuration.
Detailed implementation for a specific capsule type will be added
in the succeeding patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:49 +01:00
AKASHI Takahiro
96ec4b1a18 common: update: fix an "unused" warning against update_flash()
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.

After the commit 3149e524fc, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.

This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.

Fixes: 3149e524fc ("common: update: add a generic interface for FIT
       image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-03 21:22:49 +01:00
Ilias Apalodimas
94e7820024 cmd: efidebug: Add support for TCG2 final events table
A previous commit is adding EFI_TCG2_PROTOCOL, which in it's eventlog
support registers an EFI configuration table.
Let's add the necessary GUID so 'efidebug table' command can display
table names properly.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-12-03 21:22:40 +01:00
Ilias Apalodimas
c8d0fd5825 efi_loader: Introduce eventlog support for TCG2_PROTOCOL
In the previous patches we only introduced a minimal subset of the
EFI_TCG2_PROTOCOL protocol implementing GetCapability().
So let's continue adding features to it, introducing the
GetEventLog() and HashLogExtendEvent() functions.

In order to do that we first need to construct the eventlog in memory,
specifically in EFI_BOOT_SERVICES_DATA memory and a configuration table
from EFI_ACPI_MEMORY_NVS.
U-Boot won't currently add any events to the log or measure any
components, but will expose the necessary EFI APIs for applications
to do so.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-12-03 21:22:40 +01:00
Ilias Apalodimas
8e0b0871b8 tpm: Add tpm2 headers for TCG2 eventlog support
A following patch introduces support for the EFI_TCG2_PROTOCOL
eventlog management.
Introduce the necessary tpm related headers

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-12-03 21:22:40 +01:00
Ilias Apalodimas
e926136bb2 tpm: use more than sha256 on pcr_extend
The current tpm2_pcr_extend is hardcoded using SHA256.
Let's make the actual command to the TPM2 configurable so we can support
a wider range of algorithms and keep the current command line as-is i.e
limited to SHA256 only

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-03 21:22:40 +01:00
Heinrich Schuchardt
fc364424ac efi_loader: replace printf by log in efi_uclass.c
Use logging functions instead of printf() and debug().

Change logging messages for uclass creation and destruction to log_debug().

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-03 21:22:30 +01:00
Tom Rini
ee1e04558f Merge branch '2020-12-02-master-imports'
- Assorted minor fixes
2020-12-03 09:43:47 -05:00
Holger Brunck
a6cd384b9c km/common: remove CONFIG_MTD_CONCAT
This was used for a board which is not supproted anymore and can
therefore be dropped.

CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-02 16:21:58 -05:00
Holger Brunck
4cb8a10f7e remove obsolete option CONFIG_JFFS2_CMDLINE
This option is obsolete since 2009 and can be removed globally.

CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-02 16:21:58 -05:00
Michael Walle
382985675c mtd: spi-nor-ids: add Winbond W25Q32JW-IM flash
The Kontron SMARC-sAL28 board uses that flash.

This is the same change as in the linux commit f3418718c0ec ("mtd:
spi-nor: Add support for w25q32jwm").

Signed-off-by: Michael Walle <michael@walle.cc>
Reported-by: Leo Krueger <leo.krueger@zal.aero>
2020-12-02 16:21:58 -05:00
Heinrich Schuchardt
e405efcf4b MAINTAINERS: assign include/log.h
include/log.h belongs to LOGGING.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-02 16:21:58 -05:00
Heinrich Schuchardt
9e925d0c47 log: typos in include/log.h
Correct several typos.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-02 16:21:58 -05:00
AKASHI Takahiro
50efdf2c6f common: update: fix an "unused" warning against update_flash()
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.

After the commit 3149e524fc, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.

This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.

Fixes: 3149e524fc ("common: update: add a generic interface for FIT
       image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-12-02 16:21:58 -05:00
Simon Glass
d211e0418f global_data: Fix comment for dm_driver_rt
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.

Fixes: a294ead8d2 ("dm: Use an allocated array for run-time device info")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-02 16:21:58 -05:00
Simon Glass
d61e784136 log: Fix comment for LOGC_BOOT
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.

Fixes: b73d61a556 ("x86: zimage: Add a little more logging")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-02 16:21:58 -05:00
Andy Shevchenko
3cbb026f17 linux/compat.h: Remove debug() from spin_lock_irqsave()
It seems nobody tested the debug() option in spin_lock_irqsave().
Currently, when #define DEBUG, it spoils the compiler with

In file included from drivers/usb/dwc3/gadget.c:18:
drivers/usb/dwc3/gadget.c: In function ‘dwc3_gadget_set_selfpowered’:
include/log.h:235:4: warning: ‘flags’ is used uninitialized in this function [-Wuninitialized]
  235 |    printf(pr_fmt(fmt), ##args); \
      |    ^~~~~~
drivers/usb/dwc3/gadget.c:1347:17: note: ‘flags’ was declared here
 1347 |  unsigned long  flags;
      |                 ^~~~~

and so on...
Drop useless debug() call to make compiler happy.

Fixes: 0c06db5983 ("lib, linux: move linux specific defines to linux/compat.h")
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-12-02 16:21:58 -05:00
Zhao Qiang
c2ba01c082 watchdog: sbsa: timeout should be in "millisecond"
timeout should be in "millisecond" instead of second,
so divided it by 1000 when calculate the load value.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2020-12-02 16:21:58 -05:00
Richard Genoud
7e932ac790 fs/squashfs: sqfs_close/sqfs_read_sblk: set ctxt.sblk to NULL after free
This will prevent a double free error if sqfs_close() is called twice.

Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
2020-12-02 16:21:58 -05:00
Tom Rini
ab31883ae7 Merge tag 'dm-pull-30nov20' of git://git.denx.de/u-boot-dm
Minor bugfixes
2020-12-02 11:36:51 -05:00
Tom Rini
a2c8324711 Merge branch '2020-12-01-next-imports' into next
- More IPQ40xx improvements
- Add string support to setexpr (and tests)
- ProxyDHCP support
- Assorted cleanups
2020-12-02 11:35:02 -05:00
Holger Brunck
7292a18256 km/arm: coding style clean up
Address most of the checkpatch issues we found in km_arm and common km
code.

CC: Stefan Roese <sr@denx.de>
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-01 14:12:28 -05:00
Philippe Reynes
7d5b1bf6b8 spl: spl_fit.c: enable check of signature for config node in spl/tpl
This commit add the support of signature check for config node
in spl/tpl when the function spl_load_simple_fit is used.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-01 14:12:28 -05:00
Robert Marko
a282ada198 IPQ40xx: clk: add USB clock handling
USB clocks were completely forgotten as driver would always return 0 even if clock ID was unknown.

This behaviour changed with "IPQ40xx: clk: dont always return 0" and this will now causes the USB-s to fail probing as clock enable will return -EINVAL.

So to fix that lets add all of the USB clocks to the driver.

Fixes: 430e1dcf ("IPQ40xx: Add USB nodes")

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Robert Marko
20476b51aa IPQ40xx: clk: dont always return 0
Currently the driver will go through the clock ID-s and set/enable them as needed.
But if the ID is unknown it will fall through the switch case to the default case which will always return 0.

This is not correct and default cases should return a error code since clock ID is unknown.
So lets return -EINVAL instead.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Robert Marko
164cc98a7b IPQ40xx: clk: drop breaks in switch case
There is no point in having break statements in the switch case as there is already a return before break.

So lets drop them from the driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Robert Marko
90534536a3 IPQ40xx: clk: use dev_read_addr()
Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr().

While we are here, lets also alphabetise the includes.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Patrick Delaunay
48aee0afb6 cmd: Kconfig: migrate CONFIG_SYS_PROMPT_HUSH_PS2
Move CONFIG_SYS_PROMPT_HUSH_PS2 in Kconfig, depending
on CONFIG_HUSH_PARSER, and remove the default value defined
in cli_hush.c under __U_BOOT__.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-01 14:12:28 -05:00
Patrick Delaunay
310f285e78 hush: Remove default CONFIG_SYS_PROMPT_HUSH_PS2 setting from board files
There is no reason to define default option for this macro which is
already done in common/cli_hush.c.

  87 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2
  88 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
  89 #endif

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
2020-12-01 14:12:28 -05:00
Heinrich Schuchardt
e1864db60d net: sntp: remove CONFIG_TIMESTAMP constraint
CONFIG_TIMESTAMP is not related to the RTC drivers. It does not make any
sense to let the updating of the RTC by the sntp command depend on it.

Drop the CONFIG_TIMESTAMP checks.

Furthermore function dm_rtc_set() is enabled by CONFIG_DM_RTC. There is no
reason to require CONFIG_CMD_DATE when using a driver model RTC. The UEFI
sub-system can consume the RTC functions even if there is not date command.

Only check CONFIG_CMD_DATE when using a non-driver model RTC.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-01 14:12:28 -05:00
Simon Glass
2c02152a8e setexpr: Add support for strings
Add support for dealing with string operands, including reading a string
from memory into an environment variable and concatenating two strings.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Behún <marek.behun@nic.cz>
2020-12-01 10:33:38 -05:00
Simon Glass
f66bee41ab setexpr: Convert to use a struct for values
At present a ulong is used to hold operand values. This means that
strings cannot be used. While most operations are not useful for strings,
concatenation is. As a starting point to supporting strings, convert the
code to use a struct instead of a ulong for operands.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
8f4aa7ddb9 setexpr: Correct buffer overflow bug and enable tests
At present when more than one substitution is made this function
overwrites its buffers. Fix this bug and update the tests now that they
can pass.

Also update the debug code to show all substrings, since at present it
omits the final one.

Fixes: 855f18ea0e ("setexpr: add regex substring matching and substitution")
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
9528229f22 setexpr: Correct dropping of final unmatched string
At present the 'nlen' variable increases with each loop. If the previous
loop had back references, then subsequent loops without back references
use the wrong value of nlen. The value is larger, meaning that the string
terminator from nbuf is copied along to the main buffer, thus terminating
the string prematurely.

This leads to the final result being truncated, e.g. missing the last
(unmatched) part of the string. So "match match tail" become
"replaced replaced" instead of "replaced replaced tail".

Fix this by resetting nlen to the correct value each time around the lop.

Fixes: 855f18ea0e ("setexpr: add regex substring matching and substitution")
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
d422c77ae8 setexpr: Add some tests for buffer overflow and backref
Add tests to check for buffer overflow using simple replacement as well
as back references. At present these don't fully pass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
56331b2680 setexpr: Split the core logic into its own function
At present this function always allocates a large amount of stack, and
selects its own size for buffers. This makes it hard to test the code
for buffer overflow.

Separate out the inner logic of the substitution so that tests can call
this directly. This will allow checking that the algorithm does not
overflow the buffer.

Fix up one of the error lines at the same time, since it should be
printing nbuf_size, not data_size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
e713124e35 test: Add some setexpr regex tests
Add tests for the setexpr regex commands.

Note that these tests currently crash on sandbox due to an existing bug in
the setexpr implementation, so two of the tests are commented out.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
25a43ac84a setexpr: Add explicit support for 32- and 64-bit ints
At present this function assumes that a size of 4 refers to a ulong. This
is true on 32-bit machines but not commonly on 64-bit machines.

This means that the 'l' specify does not work correctly with setexpr.

Add an explicit case for 32-bit values so that 64-bit machines can still
use the 'l' specifier. On 32-bit machines, 64-bit is still not supported.

This corrects the operation of the default size (which is 4 for setexpr),
so update the tests accordingly.

The original code for reading from memory was included in 47ab5ad145
("cmd_setexpr: allow memory addresses in expressions") but I am not adding
a Fixes: tag since that code was not written with 64-bit machines in mind.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
7526deec7e command: Add constants for cmd_get_data_size string / error
At present these values are open-coded in a few places. Add constants so
the meaning is clear.

Also add a comment to cmd_get_data_size()

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Simon Glass
90a9901764 test: Add some tests for setexpr
This command currently has no tests. Add some for basic assignment and the
integer operations.

Note that the default size for setexpr is ulong, which varies depending on
the build machine. So for sandbox on a 64-bit host, this means that the
default size is 64 bits.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Pali Rohár
4532bf411e Makefile: Correctly propagate failure when removing target
On more places is used pattern 'command > $@ || rm -f $@'. But it does not
propagate failure from 'command' as 'rm -f' returns success.

Fix it by calling 'false' to correctly propagate failure after 'rm -f'.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-01 10:33:38 -05:00
Patrick Delaunay
8558217153 gpio: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-12-01 10:33:37 -05:00
Lyle Franklin
c8e251f82a Adds basic support for ProxyDHCP
- ProxyDHCP allows a second DHCP server to exist alongside your main
  DHCP server and supply additional BOOTP related options
- When u-boot sends out a DHCP request, the real DHCP server will
  respond with a normal response containing the new client IP address
  while simultaneously the ProxyDHCP server will respond with a blank
  client IP address and a `bootfile` option
- This patch adds CONFIG_SERVERIP_FROM_PROXYDHCP (default false) to
  enable this behavior and CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS
  (default 100) which tells u-boot to wait additional time after
  receiving the main DHCP response to give the ProxyDHCP response time
  to arrive
- The PXE spec for ProxyDHCP is more complicated than the solution
  added here as diagramed on page 16:
  http://www.pix.net/software/pxeboot/archive/pxespec.pdf:

```
DHCP Discover will be retried four times. The four timeouts are 4, 8, 16
and 32 seconds respectively. If a DHCPOFFER is received without an Option
timeouts in an attempt to receive a PXE response.
```

- Adding a simple delay worked for my purposes but let me know if a
  more robust solution is required

Signed-off-by: Lyle Franklin <lylejfranklin@gmail.com>
2020-12-01 10:33:37 -05:00
Anton Leontiev
db3667413d cmd: pxe: Use internal FDT if retrieving from FDTDIR fails
As FDTDIR label doesn't specify exact file to be loaded, it should
not fail if no file exists in the directory. In this case try to boot
with internal FDT if it exists.

Signed-off-by: Anton Leontiev <aleontiev@elvees.com>
2020-12-01 10:33:37 -05:00
Tom Rini
80cbd731df Merge tag 'mips-fixes-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- MIPS: octeon: fix allocation bug in DDR driver
- MIPS: octeon: fix init of gd->ram_size
- MIPS: octeon: add support for Octeon boot header
2020-11-30 21:45:25 -05:00
Michal Simek
a9e73d287b binman: Remove additional backslash
The origin patch didn't have this change and it was caused by manual
resolution where additional backslash was added.

Fixes: 6723b4c6ca ("binman: Call helper function binman_set_rom_offset() to fill offset")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-30 13:14:43 -07:00
Marek Vasut
e7e7e1093b dm: core: Fix incorrect flag check
The test should be checking whether $flags are non-zero and $drv_flags
contain specific flags, however these two sets of flags are separate,
and the two tests should be logically ANDed, not bitwise ANDed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-30 13:14:43 -07:00
Alper Nebi Yasak
87d07ccc23 sandbox: cros_ec: Basic support for EC_CMD_GET_NEXT_EVENT
Since commit 6900797678 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") the cros-ec-keyb driver has started using this
command, but the sandbox EC emulator does not recognize it and
continuously prints:

    ** Unknown EC command 0x67

This patch makes the sandbox driver send basic responses to the command,
but the response only supports keyboard scans for now.

The EC side of this command stores and returns events from a queue, and
returns -EC_RES_UNAVAILABLE when there are no new events. This should be
possible to implement by hooking into the SDL event queue (perhaps via
sandbox_sdl_poll_events). Implementing that is a bit harder to do since
the existing sandbox code is discarding pending keyboard events, then
reading the current keyboard state.

Since the EC emulator never explicitly fails to work on this command,
the fallback to the older command will not trigger and will not be
tested anymore.

Fixes: 6900797678 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-30 13:14:43 -07:00
Simon Glass
f31e83d6cf binman: Handle tool paths containing '~' correctly
At present if CROSS_COMPILE contains a tilde, such as
~/.buildman-toolchains/gcc-7.3.0-nolibc/i386-linux/bin/i386-linux-gcc
then binman gives a confusing error:

   binman: Error 255 running '~/..buildman-toolchains/gcc-7.3.0- ...

Fix this by expanding it out before running the tool.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-30 13:14:43 -07:00
Stefan Roese
540a2bcec1 mips: octeon: tools: Add update_octeon_header tool
Add a tool to update or insert an Octeon specific header into the U-Boot
image. This is needed e.g. for booting via SPI NOR, eMMC and NAND.

While working on this, move enum cvmx_board_types_enum and
cvmx_board_type_to_string() to cvmx-bootloader.h and remove the
unreferenced (unsupported) board definition.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-11-30 18:32:09 +01:00
Stefan Roese
b7eac19a3d mips: octeon: bootoctlinux: Use gd->ram_size instead of ram_get_info()
Using ram_get_info() is complicated and does not work after relocation.
Now that gd->ram_size holds the full RAM size, let's use it instead and
remove the ram_get_size logic completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-11-30 18:31:56 +01:00
Stefan Roese
8bab2c893c mips: octeon: Report full DDR size in dram_init() to gd->ram_size
With this patch, gd->ram_size now holds to full RAM size detected by the
DDR init code. It introduces the get_effective_memsize() function to
report the maximum usable RAM size in U-Boot to the system instead.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-11-30 18:31:56 +01:00
Stefan Roese
8a138257dd mips: octeon: Fix Octeon DDR driver to use the correct struct
Don't use "platdata_auto_alloc_size" but "priv_auto_alloc_size" instead
to auto allocate the private data struct, which is referenced via
dev_get_priv() in this driver. This fixes an ugly bug detected while
trying to boot via SPI NOR.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-11-30 18:31:56 +01:00
Stefan Roese
de24bc7e0e mips: start.S: Add Octeon boot header compatibility
Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC.
Here the only 2 instructions are allowed in the first few bytes of the
image. And these instructions need to be one branch and a nop. This
patch adds the necessary nop after the nop, to that the common MIPS
image is compatible with this Octeon header.

The tool to patch the Octeon boot header into the image will be send in
a follow-up patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-11-30 18:31:56 +01:00
Eugen Hristev
6c5f79d0ce ARM: mach-at91: fix timer.o compile condition
The AT91 architecture now has two possible timer blocks, the old PIT timer
and the new PIT64B.
The timer.c file has an old non DM driver that works for platforms
that do not use the ATMEL_PIT_TIMER DM-based driver.
Update the Makefile to select this old driver in case neither of the
ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected.

Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-26 10:12:47 +02:00
Nicolas Ferre
62495e2cdb ARM: at91: armv7: sama7g5 uses CCF clock driver
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older
at91 clock.c driver. Remove it from the compilation list and adapt cpu.c
arch_cpu_init() to avoid calling at91_clock_init() which is wrong
anyway.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-11-26 10:12:47 +02:00
Eugen Hristev
1a5c5b716c ARM: dts: at91: sam9x60: enable slewrate/high drive for sdhci0 pinout
Align the pin setup for sdhci0 with linux kernel.
This means to have slew rate enable and high drive strength.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-26 10:12:47 +02:00
Eugen Hristev
7eace38d54 mmc: atmel-sdhci: fix the clk_enable call in case of no ops
If the clock driver does not offer a clk_enable ops, then the system will
return -ENOSYS.
The clk_enable works with CCF (common clock framework).
Some clocks in some cases (like the generic clock for some products: sama5d2)
do not have the clk_enable primitive, and in this case probing of the driver
will fail.
This patch changes the behavior to return an error in case there is really
an error, and not a missing primitive.
If the clock driver does not have an enable primitive, most likely clocks
are always enabled or enabled in the set_rate primitives.

Fixes: 81f16438d4 ("mmc: atmel-sdhci: enable the required generic clock")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-11-26 10:12:47 +02:00
4212 changed files with 105659 additions and 44095 deletions

View File

@@ -67,7 +67,11 @@ jobs:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: make htmldocs
- script: |
virtualenv -p /usr/bin/python3 /tmp/venvhtml
. /tmp/venvhtml/bin/activate
pip install -r doc/sphinx/requirements.txt
make htmldocs
- job: todo
displayName: 'Search for TODO within source tree'
@@ -140,7 +144,7 @@ jobs:
export USER=azure
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install pyelftools pytest pygit2
pip install -r test/py/requirements.txt
export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
@@ -454,7 +458,7 @@ jobs:
cat << "EOF" >> build.sh
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -W ${BUILDMAN} ${OVERRIDE} || ret=$?;
tools/buildman/buildman -o /tmp -P -E -W ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 ]]; then
tools/buildman/buildman -o /tmp -seP ${BUILDMAN};
exit $ret;

View File

@@ -11,7 +11,6 @@ stages:
- world build
.buildman_and_testpy_template: &buildman_and_testpy_dfn
tags: [ 'all' ]
stage: test.py
before_script:
# Clone uboot-test-hooks
@@ -53,7 +52,6 @@ stages:
--build-dir "$UBOOT_TRAVIS_BUILD_DIR"
build all 32bit ARM platforms:
tags: [ 'all' ]
stage: world build
script:
- ret=0;
@@ -64,7 +62,6 @@ build all 32bit ARM platforms:
fi;
build all 64bit ARM platforms:
tags: [ 'all' ]
stage: world build
script:
- virtualenv -p /usr/bin/python3 /tmp/venv
@@ -78,7 +75,6 @@ build all 64bit ARM platforms:
fi;
build all PowerPC platforms:
tags: [ 'all' ]
stage: world build
script:
- ret=0;
@@ -89,7 +85,6 @@ build all PowerPC platforms:
fi;
build all other platforms:
tags: [ 'all' ]
stage: world build
script:
- ret=0;
@@ -102,14 +97,12 @@ build all other platforms:
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
cppcheck:
tags: [ 'all' ]
stage: testsuites
script:
- cppcheck -j$(nproc) --force --quiet --inline-suppr .
# search for TODO within source tree
grep TODO/FIXME/HACK:
tags: [ 'all' ]
stage: testsuites
script:
- grep -r TODO .
@@ -119,41 +112,38 @@ grep TODO/FIXME/HACK:
# build HTML documentation
htmldocs:
tags: [ 'all' ]
stage: testsuites
script:
- virtualenv -p /usr/bin/python3 /tmp/venvhtml
- . /tmp/venvhtml/bin/activate
- pip install -r doc/sphinx/requirements.txt
- make htmldocs
# some statistics about the code base
sloccount:
tags: [ 'all' ]
stage: testsuites
script:
- sloccount .
# ensure all configs have MAINTAINERS entries
Check for configs without MAINTAINERS entry:
tags: [ 'all' ]
stage: testsuites
script:
- if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
# Ensure host tools build
Build tools-only:
tags: [ 'all' ]
stage: testsuites
script:
- make tools-only_config tools-only -j$(nproc)
# Ensure env tools build
Build envtools:
tags: [ 'all' ]
stage: testsuites
script:
- make tools-only_config envtools -j$(nproc)
Run binman, buildman, dtoc, Kconfig and patman testsuites:
tags: [ 'all' ]
stage: testsuites
script:
- git config --global user.name "GitLab CI Runner";
@@ -161,7 +151,7 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
export USER=gitlab;
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
pip install pyelftools pytest pygit2;
pip install -r test/py/requirements.txt;
export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl;
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
@@ -173,7 +163,6 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
make testconfig
Run tests for Nokia RX-51 (aka N900):
tags: [ 'all' ]
stage: testsuites
script:
- ./tools/buildman/buildman --fetch-arch arm;
@@ -182,54 +171,46 @@ Run tests for Nokia RX-51 (aka N900):
# Test sandbox with test.py
sandbox test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox"
<<: *buildman_and_testpy_dfn
sandbox with clang test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox"
OVERRIDE: "-O clang-10"
<<: *buildman_and_testpy_dfn
sandbox_spl test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
<<: *buildman_and_testpy_dfn
evb-ast2500 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
sandbox_flattree test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox_flattree"
<<: *buildman_and_testpy_dfn
vexpress_ca15_tc2 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "vexpress_ca15_tc2"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
vexpress_ca9x4 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
integratorcp_cm926ejs test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_TEST_SPEC: "not sleep"
@@ -237,49 +218,42 @@ integratorcp_cm926ejs test.py:
<<: *buildman_and_testpy_dfn
qemu_arm test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu_arm"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_arm64 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_mips test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu_mips"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_mipsel test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu_mipsel"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_mips64 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu_mips64"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_mips64el test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu_mips64el"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu_malta test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "malta"
TEST_PY_TEST_SPEC: "not sleep and not efi"
@@ -287,7 +261,6 @@ qemu_malta test.py:
<<: *buildman_and_testpy_dfn
qemu_maltael test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "maltael"
TEST_PY_TEST_SPEC: "not sleep and not efi"
@@ -295,7 +268,6 @@ qemu_maltael test.py:
<<: *buildman_and_testpy_dfn
qemu_malta64 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "malta64"
TEST_PY_TEST_SPEC: "not sleep and not efi"
@@ -303,7 +275,6 @@ qemu_malta64 test.py:
<<: *buildman_and_testpy_dfn
qemu_malta64el test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "malta64el"
TEST_PY_TEST_SPEC: "not sleep and not efi"
@@ -311,84 +282,72 @@ qemu_malta64el test.py:
<<: *buildman_and_testpy_dfn
qemu-ppce500 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv32 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv32"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv64"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv32_spl test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv32_spl"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64_spl test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv64_spl"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-x86 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-x86"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-x86_64 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
r2dplus_i82557c test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id i82557c_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_pcnet test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id pcnet_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_rtl8139 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id rtl8139_qemu"
<<: *buildman_and_testpy_dfn
r2dplus_tulip test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
<<: *buildman_and_testpy_dfn
xilinx_zynq_virt test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_TEST_SPEC: "not sleep"
@@ -396,7 +355,6 @@ xilinx_zynq_virt test.py:
<<: *buildman_and_testpy_dfn
xilinx_versal_virt test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "xilinx_versal_virt"
TEST_PY_TEST_SPEC: "not sleep"
@@ -404,7 +362,6 @@ xilinx_versal_virt test.py:
<<: *buildman_and_testpy_dfn
xtfpga test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "xtfpga"
TEST_PY_TEST_SPEC: "not sleep"

View File

@@ -30,7 +30,10 @@ Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
Markus Klotzbuecher <mk@denx.de>
Patrice Chotard <patrice.chotard@foss.st.com> <patrice.chotard@st.com>
Patrick Delaunay <patrick.delaunay@foss.st.com> <patrick.delaunay@st.com>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>

View File

@@ -1,698 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright Roger Meier <r.meier@siemens.com>
# build U-Boot on Travis CI - https://travis-ci.org/
sudo: required
dist: bionic
language: c
addons:
apt:
update: true
sources:
- sourceline: 'deb http://apt.llvm.org/bionic/ llvm-toolchain-bionic-10 main'
key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
packages:
- autopoint
- cppcheck
- sloccount
- sparse
- bc
- build-essential
- libsdl2-dev
- python
- python3-sphinx
- python3-virtualenv
- python3-pip
- python3-pygit2
- swig
- libpython-dev
- iasl
- grub-efi-ia32-bin
- grub-efi-amd64-bin
- rpm2cpio
- wget
- device-tree-compiler
- lzop
- liblz4-tool
- lzma-alone
- libisl15
- clang-10
- srecord
- graphviz
- coreutils
- util-linux
- dosfstools
- gdisk
- mount
- mtools
- openssl
- sbsigntool
- fakeroot
- mtd-utils
- squashfs-tools
install:
# Clone uboot-test-hooks
- git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
# prepare buildman environment
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh2" >> ~/.buildman
- echo -e "x86 = i386" >> ~/.buildman;
- echo -e "riscv = riscv64" >> ~/.buildman;
- cat ~/.buildman
- grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- wget http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb && sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb
- wget http://mirrors.kernel.org/ubuntu/pool/universe/e/efitools/efitools_1.8.1-0ubuntu2_amd64.deb && sudo dpkg -i efitools_1.8.1-0ubuntu2_amd64.deb && rm efitools_1.8.1-0ubuntu2_amd64.deb
env:
global:
- PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/sbin:/usr/bin:/bin:/usr/local/bin
- PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
- BUILD_DIR=build
- HOSTCC="cc"
- HOSTCXX="c++"
- QEMU_VERSION="v4.2.0"
before_script:
# install toolchains based on TOOLCHAIN} variable
- if [[ "${TOOLCHAIN}" == *m68k* ]]; then ./tools/buildman/buildman --fetch-arch m68k ; fi
- if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi
- if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi
- if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi
- if [[ "${TOOLCHAIN}" == *i386* ]]; then
./tools/buildman/buildman --fetch-arch i386;
fi
- if [[ "${TOOLCHAIN}" == arc ]]; then
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2019.09-release/arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == "nds32" ]]; then
wget https://github.com/vincentzwc/prebuilt-nds32-toolchain/releases/download/20180521/nds32le-linux-glibc-v3-upstream.tar.gz &&
tar -C /tmp -xf nds32le-linux-glibc-v3-upstream.tar.gz &&
echo -e "\n[toolchain-prefix]\nnds32 = /tmp/nds32le-linux-glibc-v3-upstream/bin/nds32le-linux-" >> ~/.buildman;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
./tools/buildman/buildman --fetch-arch arm &&
./tools/buildman/buildman --fetch-arch aarch64;
fi
- if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
- if [[ "${TOOLCHAIN}" == "riscv" ]]; then
./tools/buildman/buildman --fetch-arch riscv32 &&
./tools/buildman/buildman --fetch-arch riscv64;
fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
pushd /tmp/qemu;
git submodule update --init dtc &&
git checkout ${QEMU_VERSION} &&
./configure --prefix=/tmp/qemu-install --target-list=${QEMU_TARGET} &&
make -j4 all install;
popd;
fi
# Build GRUB UEFI targets
- if [[ "${QEMU_TARGET}" == "arm-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=arm --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ranlib &&
make -j4 &&
./grub-mkimage -O arm-efi -o ~/grub_arm.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${QEMU_TARGET}" == "aarch64-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=aarch64 --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-ranlib &&
make -j4 &&
./grub-mkimage -O arm64-efi -o ~/grub_arm64.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${QEMU_TARGET}" == "riscv32-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=riscv32 --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-ranlib &&
make -j4 &&
./grub-mkimage -O riscv32-efi -o ~/grub_riscv32.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${QEMU_TARGET}" == "riscv64-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=riscv64 --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-ranlib &&
make -j4 &&
./grub-mkimage -O riscv64-efi -o ~/grub_riscv64.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
script:
# Comments must be outside the command strings below, or the Travis parser
# will get confused.
#
# If we've been asked to use clang only do one configuration.
#
# Build a selection of boards if TEST_PY_BD is empty
- if [[ "${BUILDMAN}" != "" ]]; then
ret=0
tools/buildman/buildman -P -E -W ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 ]]; then
tools/buildman/buildman -seP ${BUILDMAN};
exit $ret;
fi;
fi
# Build just the one board needed for testing, if TEST_PY_BD is non-empty
# Note: "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
- if [[ "${TEST_PY_BD}" != "" ]]; then
export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/;
if [[ -e ~/grub_arm.efi ]]; then
cp ~/grub_arm.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
if [[ -e ~/grub_arm64.efi ]]; then
cp ~/grub_arm64.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
if [[ -e ~/grub_riscv32.efi ]]; then
cp ~/grub_riscv32.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
if [[ -e ~/grub_riscv64.efi ]]; then
cp ~/grub_riscv64.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE} || exit;
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt;
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR" || exit;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
pip install pyelftools &&
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test &&
./tools/patman/patman test &&
./tools/buildman/buildman -t &&
./tools/dtoc/dtoc -t &&
make testconfig;
fi;
fi
matrix:
include:
# we need to build by vendor due to 50min time limit for builds
# each env setting here is a dedicated build
- name: "buildman arc"
env:
- BUILDMAN="arc"
TOOLCHAIN="arc"
- name: "buildman arm11 arm7 arm920t arm946es"
env:
- BUILDMAN="arm11 arm7 arm920t arm946es"
- name: "buildman arm926ejs (non-NXP,siemens,at91,kirkwood,spear)"
env:
- JOB="arm926ejs"
BUILDMAN="arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
- name: "buildman at91 (non arm v7)"
env:
- BUILDMAN="at91 -x armv7"
- name: "buildman at91 (non arm926ejs)"
env:
- BUILDMAN="at91 -x arm926ejs"
- name: "buildman boundary engicam toradex"
env:
- BUILDMAN="boundary engicam toradex"
- name: "buildman ARM bcm"
env:
- BUILDMAN="bcm -x mips"
- name: "buildman NXP ARM32 (catch-all)"
env:
- BUILDMAN="freescale -x powerpc,m68k,aarch64,ls101,ls102,ls104,ls108,ls20,lx216"
- name: "buildman NXP LS101x"
env:
- BUILDMAN="freescale&ls101"
- name: "buildman NXP LS102x"
env:
- BUILDMAN="freescale&ls102"
- name: "buildman NXP LS104x"
env:
- BUILDMAN="freescale&ls104"
- name: "buildman NXP LS108x"
env:
- BUILDMAN="freescale&ls108"
- name: "buildman NXP LS20xx"
env:
- BUILDMAN="freescale&ls20"
- name: "buildman NXP LX216x"
env:
- BUILDMAN="freescale&lx216"
- name: "buildman i.MX6 tqc"
env:
- BUILDMAN="mx6&tqc"
- name: "buildman i.MX6 (catch-all)"
env:
- BUILDMAN="mx6 -x boundary,engicam,freescale,technexion,toradex,tqc"
- name: "buildman i.MX (non-i.MX6 catch-all)"
env:
- BUILDMAN="mx -x freescale,mx6,toradex,technexion"
- name: "buildman keystone 2/3"
env:
- BUILDMAN="k2 k3"
- name: "buildman samsung socfpga"
env:
- BUILDMAN="samsung socfpga"
- name: "buildman spear"
env:
- BUILDMAN="spear"
- name: "buildman sun4i"
env:
- BUILDMAN="sun4i"
- name: "buildman sun5i"
env:
- BUILDMAN="sun5i"
- name: "buildman sun6i"
env:
- BUILDMAN="sun6i"
- name: "buildman sun7i"
env:
- BUILDMAN="sun7i"
- name: "buildman 64bit sun8i"
env:
- BUILDMAN="sun8i&aarch64 -x orangepi"
- name: "buildman 32bit sun8i"
env:
- BUILDMAN="sun8i&armv7 -x orangepi"
- name: "buildman sun9i"
env:
- BUILDMAN="sun9i"
- name: "buildman sun50i"
env:
- BUILDMAN="sun50i -x orangepi"
- name: "buildman catch-all ARM"
env:
- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rk,toradex,socfpga,k2,k3,zynq"
- name: "buildman sandbox x86"
env:
- BUILDMAN="sandbox x86"
TOOLCHAIN="i386"
- name: "buildman technexion"
env:
- BUILDMAN="technexion"
- name: "buildman kirkwood"
env:
- BUILDMAN="kirkwood"
- name: "buildman mvebu"
env:
- BUILDMAN="mvebu"
- name: "buildman m68k"
env:
- BUILDMAN="m68k"
TOOLCHAIN="m68k"
- name: "buildman microblaze"
env:
- BUILDMAN="microblaze"
TOOLCHAIN="microblaze"
- name: "buildman mips"
env:
- BUILDMAN="mips"
TOOLCHAIN="mips"
- name: "buildman non-Freescale PowerPC"
env:
- BUILDMAN="powerpc -x freescale"
TOOLCHAIN="powerpc"
- name: "buildman mpc85xx&freescale (excluding many)"
env:
- BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
TOOLCHAIN="powerpc"
- name: "buildman t208xrdb corenet_ds"
env:
- BUILDMAN="t208xrdb corenet_ds"
TOOLCHAIN="powerpc"
- name: "buildman Freescale PowerPC"
env:
- BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
TOOLCHAIN="powerpc"
- name: "buildman t102*"
env:
- BUILDMAN="t102*"
TOOLCHAIN="powerpc"
- name: "buildman p1_p2_rdb_pc"
env:
- BUILDMAN="p1_p2_rdb_pc"
TOOLCHAIN="powerpc"
- name: "buildman p1010rdb bsc91"
env:
- BUILDMAN="p1010rdb bsc91"
TOOLCHAIN="powerpc"
- name: "buildman siemens"
env:
- BUILDMAN="siemens"
- name: "buildman tegra"
env:
- BUILDMAN="tegra -x toradex"
- name: "buildman am33xx (no siemens)"
env:
- BUILDMAN="am33xx -x siemens"
- name: "buildman omap"
env:
- BUILDMAN="omap"
- name: "buildman orangepi"
env:
- BUILDMAN="orangepi"
- name: "buildman uniphier"
env:
- BUILDMAN="uniphier"
- name: "buildman catch-all AArch64"
env:
- BUILDMAN="aarch64 -x bcm,k3,tegra,ls1,ls2,lx216,mvebu,uniphier,sunxi,samsung,socfpga,rk,versal,zynq"
- name: "buildman rockchip"
env:
- BUILDMAN="rk -x orangepi"
- name: "buildman sh"
env:
- BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "buildman Zynq* (ARMv7)"
env:
- BUILDMAN="zynq&armv7"
- name: "buildman ZynqMP and Versal"
env:
- BUILDMAN="versal|zynqmp&aarch64"
- name: "buildman xtensa"
env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa-dc233c-elf"
- name: "buildman riscv"
env:
- BUILDMAN="riscv"
TOOLCHAIN="riscv"
- name: "buildman nds32"
env:
- BUILDMAN="nds32"
TOOLCHAIN="nds32"
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
- name: "cppcheck"
script:
- cppcheck -j$(nproc) --force --quiet --inline-suppr .
# build HTML documentation
- name: "htmldocs"
script:
- make htmldocs
# search for TODO within source tree
- name: "grep TODO"
script:
- grep -r TODO .
# search for FIXME within source tree
- name: "grep FIXME HACK"
script:
- grep -r FIXME .
# search for HACK within source tree and ignore HACKKIT board
script:
- grep -r HACK . | grep -v HACKKIT
# some statistics about the code base
- name: "sloccount"
script:
- sloccount .
# ensure all configs have MAINTAINERS entries
- name: "Check for configs without MAINTAINERS entry"
script:
- if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
# Ensure host tools build
- name: "Build tools-only"
script:
- make tools-only_config tools-only -j$(nproc)
# Ensure env tools build
- name: "Build envtools"
script:
- make tools-only_config envtools -j$(nproc)
- name: "Run tests for Nokia RX-51 (aka N900)"
script:
- export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH
- test/nokia_rx51_test.sh
# test/py
- name: "test/py sandbox"
env:
- TEST_PY_BD="sandbox"
TOOLCHAIN="i386"
- name: "test/py sandbox with clang"
env:
- TEST_PY_BD="sandbox"
OVERRIDE="-O clang-10"
- name: "test/py sandbox_spl"
env:
- TEST_PY_BD="sandbox_spl"
TEST_PY_TEST_SPEC="test_ofplatdata or test_handoff or test_spl"
TOOLCHAIN="i386"
TEST_PY_TOOLS="yes"
- name: "test/py sandbox_flattree"
env:
- TEST_PY_BD="sandbox_flattree"
TOOLCHAIN="i386"
- name: "test/py evb-ast2500"
env:
- TEST_PY_BD="evb-ast2500"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
- name: "test/py vexpress_ca15_tc2"
env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
- name: "test/py vexpress_ca9x4"
env:
- TEST_PY_BD="vexpress_ca9x4"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
- name: "test/py integratorcp_cm926ejs"
env:
- TEST_PY_BD="integratorcp_cm926ejs"
TEST_PY_TEST_SPEC="not sleep"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
- name: "test/py qemu_arm"
env:
- TEST_PY_BD="qemu_arm"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
- name: "test/py qemu_arm64"
env:
- TEST_PY_BD="qemu_arm64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
- name: "test/py qemu_mips"
env:
- TEST_PY_BD="qemu_mips"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu_mipsel"
env:
- TEST_PY_BD="qemu_mipsel"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mipsel-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu_mips64"
env:
- TEST_PY_BD="qemu_mips64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu_mips64el"
env:
- TEST_PY_BD="qemu_mips64el"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64el-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-malta"
env:
- TEST_PY_BD="malta"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mips-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-maltael"
env:
- TEST_PY_BD="maltael"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mipsel-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-malta64"
env:
- TEST_PY_BD="malta64"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mips64-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-malta64el"
env:
- TEST_PY_BD="malta64el"
TEST_PY_TEST_SPEC="not sleep and not efi"
TEST_PY_ID="--id qemu"
QEMU_TARGET="mips64el-softmmu"
TOOLCHAIN="mips"
- name: "test/py qemu-ppce500"
env:
- TEST_PY_BD="qemu-ppce500"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="ppc-softmmu"
TOOLCHAIN="powerpc"
- name: "test/py qemu-riscv32"
env:
- TEST_PY_BD="qemu-riscv32"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv32-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-riscv64"
env:
- TEST_PY_BD="qemu-riscv64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv64-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-riscv32_spl"
env:
- TEST_PY_BD="qemu-riscv32_spl"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv32-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-riscv64_spl"
env:
- TEST_PY_BD="qemu-riscv64_spl"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv64-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-x86"
env:
- TEST_PY_BD="qemu-x86"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="i386-softmmu"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py qemu-x86_64"
env:
- TEST_PY_BD="qemu-x86_64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="x86_64-softmmu"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py r2dplus_i82557c"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id i82557c_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_pcnet"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id pcnet_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_rtl8139"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id rtl8139_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py r2dplus_tulip"
env:
- TEST_PY_BD="r2dplus"
TEST_PY_ID="--id tulip_qemu"
QEMU_TARGET="sh4-softmmu"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "test/py xilinx_zynq_virt"
env:
- TEST_PY_BD="xilinx_zynq_virt"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
- name: "test/py xilinx_versal_virt"
env:
- TEST_PY_BD="xilinx_versal_virt"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
TEST_PY_ID="--id qemu"
- name: "test/py xtfpga"
env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
TOOLCHAIN="xtensa-dc233c-elf"
# TODO make it perfect ;-r

13
Kconfig
View File

@@ -217,22 +217,25 @@ config SYS_MALLOC_LEN
TODO: Use for other architectures
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL before relocation"
hex "Size of malloc() pool in SPL"
depends on SYS_MALLOC_F && SPL
default 0x2800 if RCAR_GEN3
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
In SPL memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
It is possible to enable CONFIG_SYS_SPL_MALLOC_START to start a new
malloc() region in SDRAM once it is inited.
config TPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in TPL before relocation"
hex "Size of malloc() pool in TPL"
depends on SYS_MALLOC_F && TPL
default SYS_MALLOC_F_LEN
default SPL_SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
In TPL memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.

View File

@@ -195,8 +195,15 @@ F: drivers/watchdog/cortina_wdt.c
F: drivers/serial/serial_cortina.c
F: drivers/led/led_cortina.c
F: drivers/mmc/ca_dw_mmc.c
F: drivers/spi/ca_sflash.c
F: drivers/i2c/i2c-cortina.c
F: drivers/i2c/i2c-cortina.h
F: drivers/mtd/nand/raw/cortina_nand.c
F: drivers/mtd/nand/raw/cortina_nand.h
F: drivers/net/cortina_ni.c
F: drivers/net/cortina_ni.h
F: drivers/net/phy/ca_phy.c
F: configs/cortina_presidio-asic-pnand_defconfig
ARM/CZ.NIC TURRIS MOX SUPPORT
M: Marek Behun <marek.behun@nic.cz>
@@ -385,7 +392,7 @@ F: drivers/smem/msm_smem.c
F: drivers/usb/host/ehci-msm.c
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
M: Patrice Chotard <patrice.chotard@foss.st.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
F: arch/arm/mach-sti/
@@ -411,8 +418,8 @@ F: arch/arm/cpu/arm926ejs/spear/
F: arch/arm/include/asm/arch-spear/
ARM STM STM32MP
M: Patrick Delaunay <patrick.delaunay@st.com>
M: Patrice Chotard <patrice.chotard@st.com>
M: Patrick Delaunay <patrick.delaunay@foss.st.com>
M: Patrice Chotard <patrice.chotard@foss.st.com>
L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
S: Maintained
@@ -547,6 +554,7 @@ S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynq/
F: doc/board/xilinx/
F: doc/device-tree-bindings/video/syncoam,seps525.txt
F: drivers/clk/clk_zynq.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
@@ -588,6 +596,7 @@ F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/timer/cadence-ttc.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/video/seps525.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmppl.h
F: include/zynqmp_firmware.h
@@ -679,6 +688,7 @@ S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
F: doc/api/efi.rst
F: doc/uefi/*
F: doc/usage/bootefi.rst
F: drivers/rtc/emul_rtc.c
F: include/capitalization.h
F: include/charset.h
@@ -696,6 +706,7 @@ F: test/unicode_ut.c
F: cmd/bootefi.c
F: cmd/efidebug.c
F: cmd/nvedit_efi.c
F: tools/efivar.py
F: tools/file2include.c
EFI VARIABLES VIA OP-TEE
@@ -758,6 +769,7 @@ T: git https://gitlab.denx.de/u-boot/u-boot.git
F: common/log*
F: cmd/log.c
F: doc/develop/logging.rst
F: include/log.h
F: lib/getopt.c
F: test/log/
F: test/py/tests/test_log.py
@@ -799,8 +811,35 @@ F: drivers/watchdog/cortina_wdt.c
F: drivers/serial/serial_cortina.c
F: drivers/led/led_cortina.c
F: drivers/mmc/ca_dw_mmc.c
F: drivers/spi/ca_sflash.c
F: drivers/i2c/i2c-cortina.c
F: drivers/i2c/i2c-cortina.h
F: drivers/net/cortina_ni.c
F: drivers/net/cortina_ni.h
F: drivers/net/phy/ca_phy.c
MIPS MEDIATEK
M: Weijie Gao <weijie.gao@mediatek.com>
R: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>
S: Maintained
F: arch/mips/mach-mtmips/
F: arch/mips/dts/mt7620.dtsi
F: arch/mips/dts/mt7620-u-boot.dtsi
F: include/configs/mt7620.h
F: include/dt-bindings/clock/mt7620-clk.h
F: include/dt-bindings/clock/mt7628-clk.h
F: include/dt-bindings/reset/mt7620-reset.h
F: include/dt-bindings/reset/mt7628-reset.h
F: drivers/clk/mtmips/
F: drivers/pinctrl/mtmips/
F: drivers/gpio/mt7620_gpio.c
F: drivers/net/mt7620-eth.c
F: drivers/phy/mt7620-usb-phy.c
F: drivers/reset/reset-mtmips.c
F: drivers/serial/serial_mt7620.c
F: drivers/spi/mt7620_spi.c
F: drivers/sysreset/sysreset_resetctl.c
F: drivers/watchdog/mt7620_wdt.c
MIPS MSCC
M: Gregory CLEMENT <gregory.clement@bootlin.com>
@@ -854,6 +893,7 @@ F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
M: Ramon Fried <rfried.dev@gmail.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-net.git
F: drivers/net/
@@ -941,6 +981,7 @@ S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-riscv.git
F: arch/riscv/
F: cmd/riscv/
F: doc/usage/sbi.rst
F: drivers/timer/andes_plmt_timer.c
F: drivers/timer/sifive_clint_timer.c
F: tools/prelink-riscv.c

View File

@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2021
PATCHLEVEL = 01
PATCHLEVEL = 04
SUBLEVEL =
EXTRAVERSION = -rc3
EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
@@ -885,7 +885,7 @@ cmd_static_rela = \
tools/relocate-rela $(3) $(4) $$start $$end
else
quiet_cmd_static_rela =
cmd_static_rela = true
cmd_static_rela =
endif
# Always append INPUTS so that arch config.mk's can add custom ones
@@ -1005,7 +1005,7 @@ cmd_cat = cat $(filter-out $(PHONY), $^) > $@
append = cat $(filter-out $< $(PHONY), $^) >> $@
quiet_cmd_pad_cat = CAT $@
cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; }
quiet_cmd_lzma = LZMA $@
cmd_lzma = lzma -c -z -k -9 $< > $@
@@ -1312,7 +1312,11 @@ endif
shell_cmd = { $(call echo-cmd,$(1)) $(cmd_$(1)); }
quiet_cmd_objcopy_uboot = OBJCOPY $@
cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_SYS_TEXT_BASE)) || rm -f $@
ifdef cmd_static_rela
cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_SYS_TEXT_BASE)) || { rm -f $@; false; }
else
cmd_objcopy_uboot = $(cmd_objcopy)
endif
u-boot-nodtb.bin: u-boot FORCE
$(call if_changed,objcopy_uboot)
@@ -1382,6 +1386,7 @@ MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-p $(CONFIG_FIT_EXTERNAL_OFFSET) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST)))
else
@@ -1583,13 +1588,16 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),)
quiet_cmd_gensplx4 = GENSPLX4 $@
cmd_gensplx4 = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp > $@ || rm -f $@
cmd_gensplx4 = $(OBJCOPY) -I binary -O binary --gap-fill=0x0 \
--pad-to=$(CONFIG_SPL_PAD_TO) \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp && \
cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp > $@ || { rm -f $@; false; }
spl/u-boot-splx4.sfp: spl/u-boot-spl.sfp FORCE
$(call if_changed,gensplx4)
quiet_cmd_socboot = SOCBOOT $@
cmd_socboot = cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@
cmd_socboot = cat spl/u-boot-splx4.sfp u-boot.img > $@ || { rm -f $@; false; }
u-boot-with-spl.sfp: spl/u-boot-splx4.sfp u-boot.img FORCE
$(call if_changed,socboot)
@@ -1599,12 +1607,12 @@ cmd_gensplpadx4 = dd if=/dev/zero of=spl/u-boot-spl.pad bs=64 count=1024 ; \
spl/u-boot-spl.sfp spl/u-boot-spl.pad \
spl/u-boot-spl.sfp spl/u-boot-spl.pad \
spl/u-boot-spl.sfp spl/u-boot-spl.pad > $@ || \
rm -f $@ spl/u-boot-spl.pad
{ rm -f $@ spl/u-boot-spl.pad; false; }
u-boot-spl-padx4.sfp: spl/u-boot-spl.sfp FORCE
$(call if_changed,gensplpadx4)
quiet_cmd_socnandboot = SOCNANDBOOT $@
cmd_socnandboot = cat u-boot-spl-padx4.sfp u-boot.img > $@ || rm -f $@
cmd_socnandboot = cat u-boot-spl-padx4.sfp u-boot.img > $@ || { rm -f $@; false; }
u-boot-with-nand-spl.sfp: u-boot-spl-padx4.sfp u-boot.img FORCE
$(call if_changed,socnandboot)
@@ -1846,9 +1854,13 @@ prepare: prepare0
# Generate some files
# ---------------------------------------------------------------------------
# Use sed to remove leading zeros from PATCHLEVEL to avoid using octal numbers
define filechk_version.h
(echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \
echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; \
echo \#define U_BOOT_VERSION_NUM $(VERSION); \
echo \#define U_BOOT_VERSION_NUM_PATCH $$(echo $(PATCHLEVEL) | \
sed -e "s/^0*//"); \
echo \#define CC_VERSION_STRING \"$$(LC_ALL=C $(CC) --version | head -n 1)\"; \
echo \#define LD_VERSION_STRING \"$$(LC_ALL=C $(LD) --version | head -n 1)\"; )
endef

16
README
View File

@@ -575,7 +575,6 @@ The following options need to be configured:
* The bootm command automatically updates the fdt
OF_TBCLK - The timebase frequency.
OF_STDOUT_PATH - The path to the console device
boards with QUICC Engines require OF_QE to set UCC MAC
addresses
@@ -1925,13 +1924,6 @@ The following options need to be configured:
try longer timeout such as
#define CONFIG_NFS_TIMEOUT 10000UL
- Command Interpreter:
CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
printed when the command interpreter needs more input
to complete a command. Usually "> ".
Note:
In the current implementation, the local variables
@@ -2777,13 +2769,6 @@ Low Level (hardware related) configuration options:
CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
- CONFIG_PCI_ENUM_ONLY
Only scan through and get the devices on the buses.
Don't do any setup work, presumably because someone or
something has already done it, and we don't need to do it
a second time. Useful for platforms that are pre-booted
by coreboot or similar.
- CONFIG_PCI_INDIRECT_BRIDGE:
Enable support for indirect PCI bridges.
@@ -3160,6 +3145,7 @@ i2c - I2C sub-system
sspi - SPI utility commands
base - print or set address offset
printenv- print environment variables
pwm - control pwm channels
setenv - set environment variables
saveenv - save environment variables to persistent storage
protect - enable or disable FLASH write protection

View File

@@ -642,7 +642,7 @@ int syscall(int call, int *retval, ...)
return 1;
}
void api_init(void)
int api_init(void)
{
struct api_signature *sig;
@@ -679,7 +679,7 @@ void api_init(void)
sig = malloc(sizeof(struct api_signature));
if (sig == NULL) {
printf("API: could not allocate memory for the signature!\n");
return;
return -ENOMEM;
}
env_set_hex("api_address", (unsigned long)sig);
@@ -691,6 +691,8 @@ void api_init(void)
sig->checksum = crc32(0, (unsigned char *)sig,
sizeof(struct api_signature));
debugf("syscall entry: 0x%lX\n", (unsigned long)sig->syscall);
return 0;
}
void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,

View File

@@ -8,7 +8,7 @@
#ifndef _API_PRIVATE_H_
#define _API_PRIVATE_H_
void api_init(void);
int api_init(void);
void platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
int platform_sys_info(struct sys_info *);

View File

@@ -7,6 +7,17 @@ config HAVE_ARCH_IOREMAP
config NEEDS_MANUAL_RELOC
bool
config LINKER_LIST_ALIGN
int
default 32 if SANDBOX
default 8 if ARM64 || X86
default 4
help
Force the each linker list to be aligned to this boundary. This
is required if ll_entry_get() is used, since otherwise the linker
may add padding into the table, thus breaking it.
See linker_lists.rst for full details.
choice
prompt "Architecture select"
default SANDBOX
@@ -112,6 +123,7 @@ config SANDBOX
imply BITREVERSE
select BLOBLIST
imply CMD_DM
imply CMD_EXCEPTION
imply CMD_GETTIME
imply CMD_HASH
imply CMD_IO
@@ -146,6 +158,8 @@ config SANDBOX
imply ACPI_PMC_SANDBOX
imply CMD_PMC
imply CMD_CLONE
imply SILENT_CONSOLE
imply BOOTARGS_SUBST
config SH
bool "SuperH architecture"

View File

@@ -90,14 +90,15 @@
};
spi0: spi@0 {
compatible = "snps,dw-apb-ssi";
compatible = "snps,axs10x-spi", "snps,dw-apb-ssi";
reg = <0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&apbclk>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
num-cs = <1>;
cs-gpios = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;

View File

@@ -128,14 +128,15 @@
};
spi0: spi@f0020000 {
compatible = "snps,dw-apb-ssi";
compatible = "snps,hsdk-spi", "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
num-cs = <1>;
cs-gpios = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;

View File

View File

@@ -11,6 +11,7 @@
#include <lmb.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;

View File

@@ -6,6 +6,7 @@
#include <config.h>
#include <common.h>
#include <cpu_func.h>
#include <asm/global_data.h>
#include <linux/bitops.h>
#include <linux/compiler.h>
#include <linux/kernel.h>

View File

@@ -9,6 +9,7 @@
#include <vsprintf.h>
#include <asm/arcregs.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;

View File

@@ -7,6 +7,7 @@
#include <elf.h>
#include <log.h>
#include <asm-generic/sections.h>
#include <asm/global_data.h>
extern ulong __image_copy_start;
extern ulong __ivt_start;

View File

@@ -621,11 +621,6 @@ config TARGET_FLEA3
bool "Support flea3"
select CPU_ARM1136
config TARGET_MX35PDK
bool "Support mx35pdk"
select BOARD_LATE_INIT
select CPU_ARM1136
config ARCH_BCM283X
bool "Broadcom BCM283X family"
select DM
@@ -799,6 +794,7 @@ config ARCH_OMAP2PLUS
select SPL_BOARD_INIT if SPL
select SPL_STACK_R if SPL
select SUPPORT_SPL
imply TI_SYSC if DM && OF_CONTROL
imply FIT
config ARCH_MESON
@@ -1045,6 +1041,7 @@ config ARCH_SUNXI
select SPL_USE_TINY_PRINTF
select USE_PREBOOT
select SYS_RELOC_GD_ENV_ADDR
imply BOARD_LATE_INIT
imply CMD_DM
imply CMD_GPT
imply CMD_UBI if MTD_RAW_NAND
@@ -1224,18 +1221,6 @@ config TARGET_LS2080A_EMU
development platform that supports the QorIQ LS2080A
Layerscape Architecture processor.
config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
help
Support for Freescale LS2080A_SIMU platform.
The LS2080A Development System (QDS) is a pre silicon
development platform that supports the QorIQ LS2080A
Layerscape Architecture processor.
config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
@@ -1326,6 +1311,18 @@ config TARGET_LX2160AQDS
is a high-performance development platform that supports the
QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
config TARGET_LX2162AQDS
bool "Support lx2162aqds"
select ARCH_LX2162A
select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
help
Support for NXP LX2162AQDS platform.
The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
config TARGET_HIKEY
bool "Support HiKey 96boards Consumer Edition Platform"
select ARM64
@@ -1983,7 +1980,6 @@ source "board/cavium/thunderx/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
source "board/eets/pdu001/Kconfig"
source "board/emulation/qemu-arm/Kconfig"
source "board/freescale/ls2080a/Kconfig"
source "board/freescale/ls2080aqds/Kconfig"
source "board/freescale/ls2080ardb/Kconfig"
source "board/freescale/ls1088a/Kconfig"
@@ -2001,7 +1997,6 @@ source "board/freescale/ls1012aqds/Kconfig"
source "board/freescale/ls1012ardb/Kconfig"
source "board/freescale/ls1012afrdm/Kconfig"
source "board/freescale/lx2160a/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/grinn/chiliboard/Kconfig"
source "board/hisilicon/hikey/Kconfig"

View File

@@ -12,6 +12,7 @@
#include <div64.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/imx-regs.h>

View File

@@ -8,6 +8,7 @@
#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/armada100.h>

View File

@@ -12,6 +12,7 @@
#include <time.h>
#include <asm/arch/cpu.h>
#include <asm/arch/armada100.h>
#include <asm/global_data.h>
#include <linux/delay.h>
/*

View File

@@ -15,6 +15,7 @@
#include <net.h>
#include <netdev.h>
#include <vsprintf.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-imx/cpu.h>
#include <asm/arch/imx-regs.h>

View File

@@ -19,6 +19,7 @@
#include <div64.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/ptrace.h>

View File

@@ -15,6 +15,7 @@
#include <hang.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/io.h>

View File

@@ -11,6 +11,7 @@
#include <init.h>
#include <log.h>
#include <serial.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>

View File

@@ -12,6 +12,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>

View File

@@ -11,6 +11,7 @@
#include <i2c.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
#include <linux/mtd/st_smi.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>

View File

@@ -7,6 +7,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spr_gpt.h>

View File

@@ -7,6 +7,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <div64.h>
#include <bootstage.h>

View File

@@ -5,11 +5,11 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008407
select SYS_FSL_ERRATUM_A008850
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A008997 if USB
select SYS_FSL_ERRATUM_A009007 if USB
select SYS_FSL_ERRATUM_A009008 if USB
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009798 if USB
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_HAS_CCI400

View File

@@ -5,6 +5,7 @@
#include <common.h>
#include <clock_legacy.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/immap_ls102xa.h>
#include <asm/arch/clock.h>

View File

@@ -9,6 +9,7 @@
#include <net.h>
#include <vsprintf.h>
#include <asm/arch/clock.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/immap_ls102xa.h>
#include <asm/cache.h>
@@ -316,6 +317,8 @@ int arch_cpu_init(void)
struct ccsr_scfg *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
u32 state;
icache_enable();
/*
* The RCPM FSM state may not be reset after power-on.
* So, reset them.

View File

@@ -6,6 +6,7 @@
#include <common.h>
#include <clock_legacy.h>
#include <net.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/io.h>
@@ -52,7 +53,11 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
continue;
}
#ifdef CONFIG_DM_ETH
priv = dev_get_priv(dev);
#else
priv = dev->priv;
#endif
if (priv->flags & TSEC_SGMII)
continue;

View File

@@ -6,6 +6,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <div64.h>
#include <asm/arch/immap_ls102xa.h>

View File

@@ -6,6 +6,7 @@
#include <common.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/clk.h>

View File

@@ -10,6 +10,7 @@
#include <div64.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/pwm.h>
#include <asm/arch/clk.h>

View File

@@ -8,6 +8,7 @@
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/arch/nexell.h>

View File

@@ -7,6 +7,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-stv0991/hardware.h>
#include <asm/arch-stv0991/stv0991_cgu.h>

View File

@@ -8,6 +8,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
#include <linux/delay.h>

View File

@@ -10,6 +10,7 @@
#include <init.h>
#include <net.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>

View File

@@ -6,6 +6,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>

View File

@@ -21,7 +21,6 @@
#include <stdio_dev.h>
#include <linux/ctype.h>
#include <linux/types.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/armv7.h>

View File

@@ -24,6 +24,7 @@
#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/bitops.h>

View File

@@ -104,7 +104,7 @@ config PSCI_RESET
default y
select ARM_SMCCC if OF_CONTROL
depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \
!TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
!TARGET_LS2080AQDS && \
!TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \
!TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
@@ -115,7 +115,7 @@ config PSCI_RESET
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
!TARGET_LS1046AFRWY && \
!TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \
!TARGET_LX2160AQDS && \
!TARGET_LX2160AQDS && !TARGET_LX2162AQDS && \
!ARCH_UNIPHIER && !TARGET_S32V234EVB
help
Most armv8 systems have PSCI support enabled in EL3, either through

View File

@@ -9,14 +9,16 @@ obj-y += cpu.o
ifndef CONFIG_$(SPL_TPL_)TIMER
obj-$(CONFIG_SYS_ARCH_TIMER) += generic_timer.o
endif
ifndef CONFIG_$(SPL_)SYS_DCACHE_OFF
obj-y += cache_v8.o
obj-y += cache.o
endif
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o
else
obj-y += exceptions.o
obj-y += exception_level.o
endif
obj-y += cache.o
obj-y += tlb.o
obj-y += transition.o
ifndef CONFIG_ARMV8_PSCI
@@ -27,6 +29,8 @@ obj-$(CONFIG_ARM_SMCCC) += smccc-call.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
else
obj-$(CONFIG_ARCH_SUNXI) += fel_utils.o
endif
obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o

View File

@@ -12,6 +12,7 @@
#include <hang.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/system.h>
#include <asm/armv8/mmu.h>

View File

@@ -9,7 +9,7 @@
#include <asm/system.h>
#include <asm/armv8/sec_firmware.h>
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
int psci_update_dt(void *fdt)
{
/*

View File

@@ -0,0 +1,81 @@
/*
* Utility functions for FEL mode, when running SPL in AArch64.
*
* Copyright (c) 2017 Arm Ltd.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <asm/system.h>
#include <linux/linkage.h>
/*
* We don't overwrite save_boot_params() here, to save the FEL state upon
* entry, since this would run *after* the RMR reset, which clobbers that
* state.
* Instead we store the state _very_ early in the boot0 hook, *before*
* resetting to AArch64.
*/
/*
* The FEL routines in BROM run in AArch32.
* Reset back into 32-bit mode here and restore the saved FEL state
* afterwards.
* Resetting back into AArch32/EL3 using the RMR always enters the BROM,
* but we can use the CPU hotplug mechanism to branch back to our code
* immediately.
*/
ENTRY(return_to_fel)
/*
* the RMR reset will clear all registers, so save the arguments
* (LR and SP) in the fel_stash structure, which we read anyways later
*/
adr x2, fel_stash
str w0, [x2]
str w1, [x2, #4]
adr x1, fel_stash_addr // to find the fel_stash address in AA32
str w2, [x1]
ldr x0, =0xfa50392f // CPU hotplug magic
#ifdef CONFIG_MACH_SUN50I_H616
ldr x2, =(SUNXI_R_CPUCFG_BASE + 0x1c0)
str w0, [x2], #0x4
#elif CONFIG_MACH_SUN50I_H6
ldr x2, =(SUNXI_RTC_BASE + 0x1b8) // BOOT_CPU_HP_FLAG_REG
str w0, [x2], #0x4
#else
ldr x2, =(SUNXI_CPUCFG_BASE + 0x1a4) // offset for CPU hotplug base
str w0, [x2, #0x8]
#endif
adr x0, back_in_32
str w0, [x2]
dsb sy
isb sy
mov x0, #2 // RMR reset into AArch32
dsb sy
msr RMR_EL3, x0
isb sy
1: wfi
b 1b
/* AArch32 code to restore the state from fel_stash and return back to FEL. */
back_in_32:
.word 0xe59f0028 // ldr r0, [pc, #40] ; load fel_stash address
.word 0xe5901008 // ldr r1, [r0, #8]
.word 0xe129f001 // msr CPSR_fc, r1
.word 0xf57ff06f // isb
.word 0xe590d000 // ldr sp, [r0]
.word 0xe590e004 // ldr lr, [r0, #4]
.word 0xe5901010 // ldr r1, [r0, #16]
.word 0xee0c1f10 // mcr 15, 0, r1, cr12, cr0, {0} ; VBAR
.word 0xe590100c // ldr r1, [r0, #12]
.word 0xee011f10 // mcr 15, 0, r1, cr1, cr0, {0} ; SCTLR
.word 0xf57ff06f // isb
.word 0xe12fff1e // bx lr ; return to FEL
fel_stash_addr:
.word 0x00000000 // receives fel_stash addr, by AA64 code above
ENDPROC(return_to_fel)

View File

@@ -208,6 +208,35 @@ config ARCH_LS2080A
imply DISTRO_DEFAULTS
imply PANIC_HANG
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
select FSL_LSCH3
select NXP_LSCH3_2
select SYS_HAS_SERDES
select SYS_FSL_SRDS_1
select SYS_FSL_SRDS_2
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50
select SYS_FSL_EC1
select SYS_FSL_EC2
select SYS_FSL_ERRATUM_A050106
select SYS_FSL_HAS_RGMII
select SYS_FSL_HAS_SEC
select SYS_FSL_HAS_CCN508
select SYS_FSL_HAS_DDR4
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
@@ -345,7 +374,7 @@ config SYS_FSL_ERRATUM_A050106
help
USB3.0 Receiver needs to enable fixed equalization
for each of PHY instances in an SOC. This is similar
to erratum A-009007, but this one is for LX2160A,
to erratum A-009007, but this one is for LX2160A and LX2162A,
and the register value is different.
config SYS_FSL_ERRATUM_A010315
@@ -362,6 +391,7 @@ config MAX_CPUS
default 16 if ARCH_LS2080A
default 8 if ARCH_LS1088A
default 16 if ARCH_LX2160A
default 16 if ARCH_LX2162A
default 1
help
Set this number to the maximum number of possible CPUs in the SoC.
@@ -491,6 +521,7 @@ config SYS_FSL_DUART_CLK_DIV
int "DUART clock divider"
default 1 if ARCH_LS1043A
default 4 if ARCH_LX2160A
default 4 if ARCH_LX2162A
default 2
help
This is the divider that is used to derive DUART clock from Platform
@@ -502,6 +533,7 @@ config SYS_FSL_I2C_CLK_DIV
default 4 if ARCH_LS1012A
default 4 if ARCH_LS1028A
default 8 if ARCH_LX2160A
default 8 if ARCH_LX2162A
default 8 if ARCH_LS1088A
default 2
help
@@ -514,6 +546,7 @@ config SYS_FSL_IFC_CLK_DIV
default 4 if ARCH_LS1012A
default 4 if ARCH_LS1028A
default 8 if ARCH_LX2160A
default 8 if ARCH_LX2162A
default 8 if ARCH_LS1088A
default 2
help
@@ -560,14 +593,14 @@ config SYS_FSL_EC1
bool
help
Ethernet controller 1, this is connected to
MAC17 for LX2160A or to MAC3 for other SoCs
MAC17 for LX2160A and LX2162A or to MAC3 for other SoCs
Provides DPAA2 capabilities
config SYS_FSL_EC2
bool
help
Ethernet controller 2, this is connected to
MAC18 for LX2160A or to MAC4 for other SoCs
MAC18 for LX2160A and LX2162A or to MAC4 for other SoCs
Provides DPAA2 capabilities
config SYS_FSL_ERRATUM_A008336

View File

@@ -27,6 +27,11 @@ obj-$(CONFIG_SYS_HAS_SERDES) += lx2160a_serdes.o
obj-y += icid.o lx2160_ids.o
endif
ifneq ($(CONFIG_ARCH_LX2162A),)
obj-$(CONFIG_SYS_HAS_SERDES) += lx2160a_serdes.o
obj-y += icid.o lx2160_ids.o
endif
ifneq ($(CONFIG_ARCH_LS2080A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
obj-y += icid.o ls2088_ids.o

View File

@@ -14,6 +14,7 @@
#include <net.h>
#include <vsprintf.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <linux/errno.h>
@@ -79,6 +80,9 @@ static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(LX2160A, LX2160A, 16),
CPU_TYPE_ENTRY(LX2120A, LX2120A, 12),
CPU_TYPE_ENTRY(LX2080A, LX2080A, 8),
CPU_TYPE_ENTRY(LX2162A, LX2162A, 16),
CPU_TYPE_ENTRY(LX2122A, LX2122A, 12),
CPU_TYPE_ENTRY(LX2082A, LX2082A, 8),
};
#define EARLY_PGTABLE_SIZE 0x5000
@@ -403,7 +407,7 @@ void cpu_name(char *name)
for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
if ((cpu_type_list[i].soc_ver & SVR_WO_E) == ver) {
strcpy(name, cpu_type_list[i].name);
#ifdef CONFIG_ARCH_LX2160A
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
if (IS_C_PROCESSOR(svr))
strcat(name, "C");
#endif
@@ -1229,7 +1233,7 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
void __efi_runtime reset_cpu(ulong addr)
{
#ifdef CONFIG_ARCH_LX2160A
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
/* clear the RST_REQ_MSK and SW_RST_REQ */
out_le32(rstcr, 0x0);

View File

@@ -9,6 +9,7 @@ SoC overview
7. LS2081A
8. LX2160A
9. LS1028A
10. LX2162A
LS1043A
---------
@@ -379,3 +380,58 @@ The LS1028A SoC includes the following function and features:
- Layerscape Trust Architecture
- Service Processor (SP) provides pre-boot initialization and secure-boot
capabilities
LX2162A
--------
The QorIQ LX2162A processor is built on the Layerscape architecture
combining sixteen ARM A72 processor cores with advanced, high-performance
datapath acceleration and network, peripheral interfaces required for
networking, wireless infrastructure, storage, and general-purpose embedded
applications.
LX2162A is compliant with the Layerscape Chassis Generation 3.2.
The LX2162A SoC includes the following function and features:
Sixteen 32-bit / 64-bit ARM v8 A72 CPUs
Cache Coherent Interconnect Fabric (CCN508)
One 64-bit 2.9GT/s DDR4 SDRAM memory controllers with ECC.
Data path acceleration architecture (DPAA2)
12 Serdes lanes at up to 25 GHz
Ethernet interfaces
Support for 10G-SXGMII (aka USXGMII).
Support for SGMII (and 1000Base-KX)
Support for XFI (and 10GBase-KR)
Support for CAUI2 (50G) and 25G-AUI(25G).
Support for XLAUI (and 40GBase-KR4) for 40G.
Support for two RGMII parallel interfaces.
Energy efficient Ethernet support (802.3az)
IEEE 1588 support.
High-speed peripheral interfaces
One PCIe Gen 3.0 8-lane controllers supporting SR-IOV,
Two PCIe Gen 3.0 4-lane controllers.
Four serial ATA (SATA 3.0) controllers.
One USB 3.0 controllers with integrated PHY
Two Enhanced secure digital host controllers
Two Controller Area Network (CAN) modules
Flexible Serial peripheral interface (FlexSPI) controller.
Three Serial peripheral interface (SPI) controllers.
Eight I2C Controllers.
Four PL011 UARTs supporting two 4-pin UART ports or four 2-pin UART ports.
General Purpose IO (GPIO)
Support for hardware virtualization and partitioning (ARM MMU-500)
Support for GIC (ARM GIC-500)
QorIQ platform Trust Architecture 3.0
One Secure WatchDog timer and one Non-Secure Watchdog timer.
ARM Generic Timer
Two Flextimers
Debug supporting run control, data acquisition, high-speed trace,
performance/event monitoring
Thermal Monitor Unit (TMU) with +/- 2C accuracy
Support for Voltage ID (VID) for yield improvement
LX2162A SoC has 2 more similar SoC personalities
1)LX2122A, few difference w.r.t. LX2162A:
a) Twelve 64-bit ARM v8 Cortex-A72 CPUs
2)LX2082A, few difference w.r.t. LX2162A:
a) Eight 64-bit ARM v8 Cortex-A72 CPUs

View File

@@ -26,7 +26,7 @@
#endif
#include <fsl_sec.h>
#include <asm/arch-fsl-layerscape/soc.h>
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
#include <asm/armv8/sec_firmware.h>
#endif
#include <asm/arch/speed.h>
@@ -81,7 +81,7 @@ void ft_fixup_cpu(void *blob)
"device_type", "cpu", 4);
}
#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT) && \
defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
int node;
u32 psci_ver;
@@ -383,7 +383,7 @@ static void fdt_fixup_msi(void *blob)
}
#endif
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
/* Remove JR node used by SEC firmware */
void fdt_fixup_remove_jr(void *blob)
{
@@ -400,10 +400,12 @@ void fdt_fixup_remove_jr(void *blob)
while (jr_node != -FDT_ERR_NOTFOUND) {
reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
jr_offset = fdt_read_number(reg, addr_cells);
if (jr_offset == used_jr) {
fdt_del_node(blob, jr_node);
break;
if (reg) {
jr_offset = fdt_read_number(reg, addr_cells);
if (jr_offset == used_jr) {
fdt_del_node(blob, jr_node);
break;
}
}
jr_node = fdt_node_offset_by_compatible(blob, jr_node,
"fsl,sec-v4.0-job-ring");
@@ -488,7 +490,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
else {
ccsr_sec_t __iomem *sec;
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
fdt_fixup_remove_jr(blob);
fdt_fixup_kaslr(blob);
#endif

View File

@@ -7,6 +7,7 @@
#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <asm/global_data.h>
#include <linux/compiler.h>
#include <asm/io.h>
#include <asm/processor.h>

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016-2018 NXP
* Copyright 2016-2018, 2020 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
@@ -26,7 +26,7 @@ static u8 serdes3_prtcl_map[SERDES_PRCTL_COUNT];
#endif
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
#ifdef CONFIG_ARCH_LX2160A
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
int xfi_dpmac[XFI14 + 1];
int sgmii_dpmac[SGMII18 + 1];
int a25gaui_dpmac[_25GE10 + 1];
@@ -159,7 +159,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
else {
serdes_prtcl_map[lane_prtcl] = 1;
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
#ifdef CONFIG_ARCH_LX2160A
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
if (lane_prtcl >= XFI1 && lane_prtcl <= XFI14)
wriop_init_dpmac(sd, xfi_dpmac[lane_prtcl],
(int)lane_prtcl);
@@ -552,7 +552,7 @@ void fsl_serdes_init(void)
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int i , j;
#ifdef CONFIG_ARCH_LX2160A
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
for (i = XFI1, j = 1; i <= XFI14; i++, j++)
xfi_dpmac[i] = j;

View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2015, Freescale Semiconductor, Inc.
* Copyright 2019 NXP Semiconductors
* Copyright 2019-2020 NXP
*
* Derived from arch/power/cpu/mpc85xx/speed.c
*/
@@ -9,6 +9,7 @@
#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <asm/global_data.h>
#include <linux/compiler.h>
#include <fsl_ifc.h>
#include <asm/processor.h>
@@ -180,7 +181,7 @@ int get_clocks(void)
#ifdef CONFIG_FSL_ESDHC
#if defined(CONFIG_ARCH_LS1028A) || defined(CONFIG_ARCH_LS1088A)
clock = sys_info.freq_cga_m2;
#elif defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LS2080A)
#elif defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LX2162A)
clock = sys_info.freq_systembus;
#endif
gd->arch.sdhc_per_clk = clock / CONFIG_SYS_FSL_SDHC_CLK_DIV;

View File

@@ -192,6 +192,7 @@ ENTRY(lowlevel_init)
#endif
/* Initialize GIC Secure Bank Status */
#if !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
branch_if_slave x0, 1f
bl get_gic_offset
@@ -205,6 +206,7 @@ ENTRY(lowlevel_init)
bl gic_init_secure_percpu
#endif
#endif
#endif
100:
branch_if_master x0, x1, 2f

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018 NXP
* Copyright 2018, 2020 NXP
*/
#include <common.h>
@@ -11,6 +11,22 @@ struct serdes_config {
u8 lanes[SRDS_MAX_LANES];
};
#if defined(CONFIG_ARCH_LX2162A)
static struct serdes_config serdes1_cfg_tbl[] = {
/* SerDes 1 */
{0x01, {PCIE1, PCIE1, PCIE1, PCIE1 } },
{0x02, {SGMII6, SGMII5, SGMII4, SGMII3 } },
{0x03, {XFI6, XFI5, XFI4, XFI3 } },
{0x09, {SGMII6, SGMII5, SGMII4, PCIE1 } },
{0x0B, {SGMII6, SGMII5, PCIE1, PCIE1 } },
{0x0F, {_50GE2, _50GE2, _50GE1, _50GE1 } },
{0x10, {_25GE6, _25GE5, _50GE1, _50GE1 } },
{0x11, {_25GE6, _25GE5, _25GE4, _25GE3 } },
{0x12, {_25GE6, _25GE5, XFI4, XFI3 } },
{0x14, {_40GE1, _40GE1, _40GE1, _40GE1 } },
{}
};
#else
static struct serdes_config serdes1_cfg_tbl[] = {
/* SerDes 1 */
{0x01, {PCIE2, PCIE2, PCIE2, PCIE2, PCIE1, PCIE1, PCIE1, PCIE1 } },
@@ -48,6 +64,7 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0x16, {XFI10, XFI9, PCIE2, PCIE2, XFI6, XFI5, XFI4, XFI3 } },
{}
};
#endif
static struct serdes_config serdes2_cfg_tbl[] = {
/* SerDes 2 */

View File

@@ -8,6 +8,7 @@
#include <image.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/mp.h>

View File

@@ -8,6 +8,7 @@
#include <config.h>
#include <errno.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/system.h>
#include <asm/types.h>
#include <asm/arch/soc.h>
@@ -16,7 +17,7 @@
#elif defined(CONFIG_FSL_LSCH2)
#include <asm/arch/immap_lsch2.h>
#endif
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
#include <asm/armv8/sec_firmware.h>
#endif
#ifdef CONFIG_CHAIN_OF_TRUST

View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2015 Freescale Semiconductor
* Copyright 2019 NXP
* Copyright 2019-2020 NXP
*/
#include <common.h>
@@ -33,13 +33,10 @@
#include <fsl_validate.h>
#endif
#include <fsl_immap.h>
#ifdef CONFIG_TFABOOT
#include <env_internal.h>
#endif
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/err.h>
#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
#ifdef CONFIG_GIC_V3_ITS
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -186,7 +183,8 @@ static void erratum_a008997(void)
out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4)
#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) || \
defined(CONFIG_ARCH_LS1028A) || defined(CONFIG_ARCH_LX2160A)
defined(CONFIG_ARCH_LS1028A) || defined(CONFIG_ARCH_LX2160A) || \
defined(CONFIG_ARCH_LX2162A)
#define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \
out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \
@@ -222,7 +220,7 @@ static void erratum_a009007(void)
#if defined(CONFIG_FSL_LSCH3)
static void erratum_a050106(void)
{
#if defined(CONFIG_ARCH_LX2160A)
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
void __iomem *dcsr = (void __iomem *)DCSR_BASE;
PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1);
@@ -392,7 +390,8 @@ void fsl_lsch3_early_init_f(void)
#endif
#if defined(CONFIG_ARCH_LS1088A) || defined(CONFIG_ARCH_LS1028A) || \
defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LX2160A)
defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LX2160A) || \
defined(CONFIG_ARCH_LX2162A)
set_icids();
#endif
}
@@ -954,28 +953,12 @@ int board_late_init(void)
#endif
#ifdef CONFIG_TFABOOT
/*
* check if gd->env_addr is default_environment; then setenv bootcmd
* and mcinitcmd.
* Set bootcmd and mcinitcmd if they don't exist in the environment.
*/
#ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR
if (gd->env_addr == (ulong)&default_environment[0]) {
#else
if (gd->env_addr + gd->reloc_off == (ulong)&default_environment[0]) {
#endif
if (!env_get("bootcmd"))
fsl_setenv_bootcmd();
if (!env_get("mcinitcmd"))
fsl_setenv_mcinitcmd();
}
/*
* If the boot mode is secure, default environment is not present then
* setenv command needs to be run by default
*/
#ifdef CONFIG_CHAIN_OF_TRUST
if ((fsl_check_boot_mode_secure() == 1)) {
fsl_setenv_bootcmd();
fsl_setenv_mcinitcmd();
}
#endif
#endif
#ifdef CONFIG_QSPI_AHB_INIT
qspi_ahb_init();

View File

@@ -12,6 +12,7 @@
#include <log.h>
#include <spl.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <fsl_ifc.h>
#include <i2c.h>
@@ -38,6 +39,9 @@ u32 spl_boot_device(void)
#ifdef CONFIG_SPL_BUILD
/* Define board data structure */
static struct bd_info bdata __attribute__ ((section(".data")));
void spl_board_init(void)
{
#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
@@ -74,7 +78,7 @@ void board_init_f(ulong dummy)
get_clocks();
preloader_console_init();
spl_set_bd();
gd->bd = &bdata;
#ifdef CONFIG_SYS_I2C
#ifdef CONFIG_SPL_I2C_SUPPORT

View File

@@ -7,7 +7,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/cache.h>
#include <asm/macro.h>
#include <asm/psci.h>

View File

@@ -8,6 +8,7 @@
#include <bootstage.h>
#include <command.h>
#include <time.h>
#include <asm/global_data.h>
#include <asm/system.h>
#include <linux/bitops.h>

View File

@@ -8,6 +8,7 @@
#include <cpu_func.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>

View File

@@ -10,6 +10,7 @@
#include <image.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/ptrace.h>
#include <linux/kernel.h>
#include <asm/io.h>
@@ -316,7 +317,7 @@ __weak bool sec_firmware_is_valid(const void *sec_firmware_img)
return false;
}
if (!fit_check_format(sec_firmware_img)) {
if (fit_check_format(sec_firmware_img, IMAGE_SIZE_INVAL)) {
printf("SEC Firmware: Bad firmware image (bad FIT header)\n");
return false;
}

View File

@@ -39,8 +39,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
kirkwood-atl-sbx81lifxcat.dtb \
kirkwood-blackarmor-nas220.dtb \
kirkwood-d2net.dtb \
kirkwood-db-88f6281.dtb \
kirkwood-db-88f6281-spi.dtb \
kirkwood-dns325.dtb \
kirkwood-dockstar.dtb \
kirkwood-dreamplug.dtb \
@@ -110,6 +108,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-roc-cc.dtb \
rk3328-rock64.dtb \
rk3328-rock-pi-e.dtb
@@ -161,14 +160,19 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxl-s905x-p212.dtb \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905x-libretech-cc.dtb \
meson-gxl-s905x-libretech-cc-v2.dtb \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-gxm-wetek-core2.dtb \
meson-axg-s400.dtb \
meson-g12a-u200.dtb \
meson-g12a-sei510.dtb \
meson-g12b-gtking.dtb \
meson-g12b-gtking-pro.dtb \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2-plus.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
@@ -204,7 +208,6 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-espressobin-emmc.dtb \
armada-3720-turris-mox.dtb \
armada-3720-uDPU.dtb \
armada-375-db.dtb \
@@ -415,7 +418,11 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
fsl-lx2160a-qds-19-x-x.dtb \
fsl-lx2160a-qds-19-11-x.dtb \
fsl-lx2160a-qds-20-x-x.dtb \
fsl-lx2160a-qds-20-11-x.dtb
fsl-lx2160a-qds-20-11-x.dtb \
fsl-lx2162a-qds.dtb\
fsl-lx2162a-qds-17-x.dtb\
fsl-lx2162a-qds-18-x.dtb\
fsl-lx2162a-qds-20-x.dtb
dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb \
@@ -429,6 +436,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1012a-frdm.dtb \
fsl-ls1012a-frwy.dtb
dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \
fsl-ls1028a-kontron-sl28-var1.dtb \
fsl-ls1028a-kontron-sl28-var2.dtb \
fsl-ls1028a-kontron-sl28-var3.dtb \
fsl-ls1028a-kontron-sl28-var4.dtb \
@@ -587,6 +596,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v40-bananapi-m2-berry.dtb
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-s3-pinecube.dtb \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-bananapi-m2-plus.dtb \
@@ -602,9 +612,13 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-beelink-gs1.dtb \
sun50i-h6-orangepi-3.dtb \
sun50i-h6-orangepi-lite2.dtb \
sun50i-h6-orangepi-one-plus.dtb \
sun50i-h6-pine-h64.dtb
sun50i-h6-pine-h64.dtb \
sun50i-h6-tanix-tx6.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
sun50i-h616-orangepi-zero2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-amarula-relic.dtb \
sun50i-a64-bananapi-m64.dtb \
@@ -643,14 +657,8 @@ dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
dtb-y += \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
imx6dl-aristainetos2b_4.dtb \
imx6dl-aristainetos2b_7.dtb \
imx6dl-aristainetos2b_csl_4.dtb \
imx6dl-aristainetos2b_csl_7.dtb \
imx6dl-aristainetos2c_4.dtb \
imx6dl-aristainetos2c_7.dtb \
imx6dl-aristainetos2c_cslb_7.dtb \
imx6dl-brppt2.dtb \
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
@@ -768,6 +776,7 @@ dtb-$(CONFIG_ARCH_IMX8) += \
imx8qm-rom7720-a1.dtb \
fsl-imx8qxp-ai_ml.dtb \
fsl-imx8qxp-colibri.dtb \
fsl-imx8qxp-apalis.dtb \
fsl-imx8qxp-mek.dtb \
imx8-deneb.dtb \
imx8-giedi.dtb
@@ -779,8 +788,10 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-ddr4-evk.dtb \
imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-phanbell.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
imx8mq-pico-pi.dtb
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
@@ -798,6 +809,8 @@ dtb-$(CONFIG_RCAR_GEN2) += \
dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a774b1-beacon-rzg2n-kit.dtb \
r8a774e1-beacon-rzg2h-kit.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \
@@ -891,6 +904,9 @@ dtb-$(CONFIG_TARGET_OMAP4_SDP4430) += \
dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \
omap5-uevm.dtb
dtb-$(CONFIG_TARGET_SAMA7G5EK) += \
sama7g5ek.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
at91-sama5d2_ptc_ek.dtb
@@ -898,7 +914,8 @@ dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
at91-sama5d2_xplained.dtb
dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
at91-sama5d27_som1_ek.dtb
at91-sama5d27_som1_ek.dtb \
at91-sama5d27_giantboard.dtb
dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
at91-sama5d27_wlsom1_ek.dtb
@@ -953,6 +970,7 @@ dtb-$(CONFIG_ARCH_BCM6858) += \
dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb
dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb

View File

@@ -53,8 +53,6 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
@@ -238,8 +236,19 @@
status = "okay";
};
&lcdc {
status = "disabled";
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
status = "disabled";
};
};
};
};
&elm {

View File

@@ -53,8 +53,6 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
@@ -228,8 +226,19 @@
status = "disabled";
};
&lcdc {
status = "disabled";
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
status = "disabled";
};
};
};
};
&elm {

View File

@@ -54,8 +54,6 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
@@ -259,8 +257,19 @@
status = "okay";
};
&lcdc {
status = "disabled";
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
status = "disabled";
};
};
};
};
&elm {

View File

@@ -59,7 +59,6 @@
/*backlight = <&tps_bl>; */
compatible = "ti,tilcdc,panel";
status = "okay";
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
@@ -298,10 +297,21 @@
status = "okay";
};
&lcdc {
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
};
};
};
};
&elm {

View File

@@ -79,8 +79,6 @@
backlight = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
@@ -254,10 +252,21 @@
status = "okay";
};
&lcdc {
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
};
};
};
};
&elm {

View File

@@ -4,6 +4,8 @@
* Author: Marcin Niestroj <m.niestroj@grinn-global.com>
*/
#include "am33xx-u-boot.dtsi"
/ {
chosen {
stdout-path = &uart0;

View File

@@ -20,11 +20,6 @@
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
@@ -112,6 +107,12 @@
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart4 {
status = "disabled";
};

View File

@@ -3,13 +3,22 @@
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/ {
panel {
u-boot,dm-pre-reloc;
#include "am33xx-u-boot.dtsi"
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
};
};
};
};
&mmc3 {
status = "disabled";
};

View File

@@ -486,7 +486,7 @@
&epwmss0 {
status = "okay";
ecap0: ecap@48300100 {
ecap0: ecap@100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;

View File

@@ -5,8 +5,18 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
/ {
panel {
u-boot,dm-pre-reloc;
#include "am33xx-u-boot.dtsi"
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
};
};
};
};

View File

@@ -531,7 +531,7 @@
&epwmss2 {
status = "okay";
ecap2: ecap@48304100 {
ecap2: ecap@100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;

View File

@@ -4,20 +4,32 @@
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
#include "am33xx-u-boot.dtsi"
/ {
ocp {
u-boot,dm-pre-reloc;
};
panel {
u-boot,dm-pre-reloc;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
};
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
};
};
};
};
&mmc1 {
u-boot,dm-pre-reloc;
};
@@ -26,11 +38,6 @@
u-boot,dm-pre-reloc;
};
&rtc {
clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clock-names = "int-clk";
};
&scm {
u-boot,dm-pre-reloc;
};

View File

@@ -2,6 +2,9 @@
/*
* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
*/
#include "am33xx-u-boot.dtsi"
/ {
xtal25mhz: xtal25mhz {
compatible = "fixed-clock";

View File

@@ -3,20 +3,32 @@
* Copyright (C) 2018 EETS GmbH - https://www.eets.ch/
*/
#include "am33xx-u-boot.dtsi"
/ {
ocp {
u-boot,dm-pre-reloc;
};
panel {
u-boot,dm-pre-reloc;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
};
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
};
};
};
};
&scm {
u-boot,dm-pre-reloc;
};

View File

@@ -148,7 +148,7 @@
&epwmss0 {
status = "okay";
ecap0: ecap@48300100 {
ecap0: ecap@100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;

View File

@@ -5,8 +5,18 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
/ {
panel {
u-boot,dm-pre-reloc;
#include "am33xx-u-boot.dtsi"
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
};
};
};
};

View File

@@ -3,6 +3,8 @@
* Copyright (C) 2020 Linumiz
*/
#include "am33xx-u-boot.dtsi"
/ {
chosen {
#address-cells = <1>;

View File

@@ -5,8 +5,18 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
/ {
panel {
u-boot,dm-pre-reloc;
#include "am33xx-u-boot.dtsi"
&l4_per {
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
};
};
};
};

View File

@@ -174,7 +174,7 @@
&epwmss0 {
status = "okay";
ecap0: ecap@48300100 {
ecap0: ecap@100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;

View File

@@ -3,6 +3,8 @@
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
*/
#include "am33xx-u-boot.dtsi"
/ {
ocp {
u-boot,dm-pre-reloc;

View File

@@ -136,7 +136,7 @@
&epwmss1 {
status = "okay";
ehrpwm1: pwm@48302200 {
ehrpwm1: pwm@200 {
pinctrl-names = "default";
pinctrl-0 = <&ehrpwm1_pins>;
status = "okay";

View File

@@ -3,6 +3,8 @@
* Copyright (C) 2019 DENX Software Engineering GmbH
*/
#include "am33xx-u-boot.dtsi"
/ {
chosen {
#address-cells = <1>;

View File

@@ -334,49 +334,49 @@
timer1_fck: timer1_fck@528 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
clocks = <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
reg = <0x0528>;
};
timer2_fck: timer2_fck@508 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0508>;
};
timer3_fck: timer3_fck@50c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x050c>;
};
timer4_fck: timer4_fck@510 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0510>;
};
timer5_fck: timer5_fck@518 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0518>;
};
timer6_fck: timer6_fck@51c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x051c>;
};
timer7_fck: timer7_fck@504 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0504>;
};
@@ -407,7 +407,7 @@
wdt1_fck: wdt1_fck@538 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&clk_rc32k_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&clk_rc32k_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0538>;
};
@@ -477,7 +477,7 @@
gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck@53c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x053c>;
};
@@ -539,86 +539,140 @@
};
&prcm {
l4_per_cm: l4_per_cm@0 {
per_cm: per-cm@0 {
compatible = "ti,omap4-cm";
reg = <0x0 0x200>;
reg = <0x0 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x200>;
ranges = <0 0x0 0x400>;
l4_per_clkctrl: clk@14 {
l4ls_clkctrl: l4ls-clkctrl@38 {
compatible = "ti,clkctrl";
reg = <0x14 0x13c>;
reg = <0x38 0x2c>, <0x6c 0x28>, <0xac 0xc>, <0xc0 0x1c>, <0xec 0xc>, <0x10c 0x8>, <0x130 0x4>;
#clock-cells = <2>;
};
l3s_clkctrl: l3s-clkctrl@1c {
compatible = "ti,clkctrl";
reg = <0x1c 0x4>, <0x30 0x8>, <0x68 0x4>, <0xf8 0x4>;
#clock-cells = <2>;
};
l3_clkctrl: l3-clkctrl@24 {
compatible = "ti,clkctrl";
reg = <0x24 0xc>, <0x94 0x10>, <0xbc 0x4>, <0xdc 0x8>, <0xfc 0x8>;
#clock-cells = <2>;
};
l4hs_clkctrl: l4hs-clkctrl@120 {
compatible = "ti,clkctrl";
reg = <0x120 0x4>;
#clock-cells = <2>;
};
pruss_ocp_clkctrl: pruss-ocp-clkctrl@e8 {
compatible = "ti,clkctrl";
reg = <0xe8 0x4>;
#clock-cells = <2>;
};
cpsw_125mhz_clkctrl: cpsw-125mhz-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x0 0x18>;
#clock-cells = <2>;
};
lcdc_clkctrl: lcdc-clkctrl@18 {
compatible = "ti,clkctrl";
reg = <0x18 0x4>;
#clock-cells = <2>;
};
clk_24mhz_clkctrl: clk-24mhz-clkctrl@14c {
compatible = "ti,clkctrl";
reg = <0x14c 0x4>;
#clock-cells = <2>;
};
};
l4_wkup_cm: l4_wkup_cm@400 {
wkup_cm: wkup-cm@400 {
compatible = "ti,omap4-cm";
reg = <0x400 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x400 0x100>;
l4_wkup_clkctrl: clk@4 {
l4_wkup_clkctrl: l4-wkup-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x4 0xd4>;
reg = <0x0 0x10>, <0xb4 0x24>;
#clock-cells = <2>;
};
l3_aon_clkctrl: l3-aon-clkctrl@14 {
compatible = "ti,clkctrl";
reg = <0x14 0x4>;
#clock-cells = <2>;
};
l4_wkup_aon_clkctrl: l4-wkup-aon-clkctrl@b0 {
compatible = "ti,clkctrl";
reg = <0xb0 0x4>;
#clock-cells = <2>;
};
};
mpu_cm: mpu_cm@600 {
mpu_cm: mpu-cm@600 {
compatible = "ti,omap4-cm";
reg = <0x600 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x600 0x100>;
mpu_clkctrl: clk@4 {
mpu_clkctrl: mpu-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x4 0x4>;
reg = <0x0 0x8>;
#clock-cells = <2>;
};
};
l4_rtc_cm: l4_rtc_cm@800 {
l4_rtc_cm: l4-rtc-cm@800 {
compatible = "ti,omap4-cm";
reg = <0x800 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x800 0x100>;
l4_rtc_clkctrl: clk@0 {
l4_rtc_clkctrl: l4-rtc-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x0 0x4>;
#clock-cells = <2>;
};
};
gfx_l3_cm: gfx_l3_cm@900 {
gfx_l3_cm: gfx-l3-cm@900 {
compatible = "ti,omap4-cm";
reg = <0x900 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x900 0x100>;
gfx_l3_clkctrl: clk@4 {
gfx_l3_clkctrl: gfx-l3-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x4 0x4>;
reg = <0x0 0x8>;
#clock-cells = <2>;
};
};
l4_cefuse_cm: l4_cefuse_cm@a00 {
l4_cefuse_cm: l4-cefuse-cm@a00 {
compatible = "ti,omap4-cm";
reg = <0xa00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xa00 0x100>;
l4_cefuse_clkctrl: clk@20 {
l4_cefuse_clkctrl: l4-cefuse-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x20 0x4>;
reg = <0x0 0x24>;
#clock-cells = <2>;
};
};

2026
arch/arm/dts/am33xx-l4.dtsi Normal file

File diff suppressed because it is too large Load Diff

View File

@@ -9,3 +9,11 @@
u-boot,dm-pre-reloc;
};
};
&prcm_clocks {
compatible = "simple-bus";
};
&scm_clocks {
compatible = "simple-bus";
};

View File

@@ -8,6 +8,7 @@
* kind, whether express or implied.
*/
#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>
#include <dt-bindings/clock/am3.h>
@@ -46,6 +47,7 @@
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a8";
enable-method = "ti,am3352";
device_type = "cpu";
reg = <0>;
@@ -55,6 +57,17 @@
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
cpu-idle-states = <&mpu_gate>;
};
idle-states {
mpu_gate: mpu_gate {
compatible = "arm,idle-state";
entry-latency-us = <40>;
exit-latency-us = <90>;
min-residency-us = <300>;
ti,idle-wkup-m3;
};
};
};
@@ -167,11 +180,6 @@
ti,hwmods = "l3_main";
l4_wkup: l4_wkup@44c00000 {
compatible = "ti,am3-l4-wkup", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x44c00000 0x280000>;
wkup_m3: wkup_m3@100000 {
compatible = "ti,am3352-wkup-m3";
reg = <0x100000 0x4000>,
@@ -180,73 +188,14 @@
ti,hwmods = "wkup_m3";
ti,pm-firmware = "am335x-pm-firmware.elf";
};
prcm: prcm@200000 {
compatible = "ti,am3-prcm", "simple-bus";
reg = <0x200000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x200000 0x4000>;
prcm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
prcm_clockdomains: clockdomains {
};
};
scm: scm@210000 {
compatible = "ti,am3-scm", "simple-bus";
reg = <0x210000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
#pinctrl-cells = <1>;
ranges = <0 0x210000 0x2000>;
am33xx_pinmux: pinmux@800 {
compatible = "pinctrl-single";
reg = <0x800 0x238>;
#address-cells = <1>;
#size-cells = <0>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x7f>;
};
scm_conf: scm_conf@0 {
compatible = "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x800>;
scm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
};
wkup_m3_ipc: wkup_m3_ipc@1324 {
compatible = "ti,am3352-wkup-m3-ipc";
reg = <0x1324 0x24>;
interrupts = <78>;
ti,rproc = <&wkup_m3>;
mboxes = <&mailbox &mbox_wkupm3>;
};
edma_xbar: dma-router@f90 {
compatible = "ti,am335x-edma-crossbar";
reg = <0xf90 0x40>;
#dma-cells = <3>;
dma-requests = <32>;
dma-masters = <&edma>;
};
scm_clockdomains: clockdomains {
};
};
};
l4_per: interconnect@48000000 {
};
l4_fw: interconnect@47c00000 {
};
l4_fast: interconnect@4a000000 {
};
l4_mpuss: interconnect@4b140000 {
};
intc: interrupt-controller@48200000 {
@@ -256,149 +205,100 @@
reg = <0x48200000 0x1000>;
};
edma: edma@49000000 {
compatible = "ti,edma3-tpcc";
ti,hwmods = "tpcc";
reg = <0x49000000 0x10000>;
reg-names = "edma3_cc";
interrupts = <12 13 14>;
interrupt-names = "edma3_ccint", "edma3_mperr",
"edma3_ccerrint";
dma-requests = <64>;
#dma-cells = <2>;
target-module@49000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x49000000 0x4>;
reg-names = "rev";
clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x49000000 0x10000>;
ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
<&edma_tptc2 0>;
edma: dma@0 {
compatible = "ti,edma3-tpcc";
reg = <0 0x10000>;
reg-names = "edma3_cc";
interrupts = <12 13 14>;
interrupt-names = "edma3_ccint", "edma3_mperr",
"edma3_ccerrint";
dma-requests = <64>;
#dma-cells = <2>;
ti,edma-memcpy-channels = <20 21>;
ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
<&edma_tptc2 0>;
ti,edma-memcpy-channels = <20 21>;
};
};
edma_tptc0: tptc@49800000 {
compatible = "ti,edma3-tptc";
ti,hwmods = "tptc0";
reg = <0x49800000 0x100000>;
interrupts = <112>;
interrupt-names = "edma3_tcerrint";
target-module@49800000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x49800000 0x4>,
<0x49800010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
ti,sysc-midle = <SYSC_IDLE_FORCE>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_SMART>;
clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x49800000 0x100000>;
edma_tptc0: dma@0 {
compatible = "ti,edma3-tptc";
reg = <0 0x100000>;
interrupts = <112>;
interrupt-names = "edma3_tcerrint";
};
};
edma_tptc1: tptc@49900000 {
compatible = "ti,edma3-tptc";
ti,hwmods = "tptc1";
reg = <0x49900000 0x100000>;
interrupts = <113>;
interrupt-names = "edma3_tcerrint";
target-module@49900000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x49900000 0x4>,
<0x49900010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
ti,sysc-midle = <SYSC_IDLE_FORCE>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_SMART>;
clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x49900000 0x100000>;
edma_tptc1: dma@0 {
compatible = "ti,edma3-tptc";
reg = <0 0x100000>;
interrupts = <113>;
interrupt-names = "edma3_tcerrint";
};
};
edma_tptc2: tptc@49a00000 {
compatible = "ti,edma3-tptc";
ti,hwmods = "tptc2";
reg = <0x49a00000 0x100000>;
interrupts = <114>;
interrupt-names = "edma3_tcerrint";
};
target-module@49a00000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x49a00000 0x4>,
<0x49a00010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
ti,sysc-midle = <SYSC_IDLE_FORCE>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_SMART>;
clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x49a00000 0x100000>;
gpio0: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x44e07000 0x1000>;
interrupts = <96>;
};
gpio1: gpio@4804c000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x4804c000 0x1000>;
interrupts = <98>;
};
gpio2: gpio@481ac000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x481ac000 0x1000>;
interrupts = <32>;
};
gpio3: gpio@481ae000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x481ae000 0x1000>;
interrupts = <62>;
};
uart0: serial@44e09000 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart1";
clock-frequency = <48000000>;
reg = <0x44e09000 0x2000>;
interrupts = <72>;
status = "disabled";
dmas = <&edma 26 0>, <&edma 27 0>;
dma-names = "tx", "rx";
};
uart1: serial@48022000 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart2";
clock-frequency = <48000000>;
reg = <0x48022000 0x2000>;
interrupts = <73>;
status = "disabled";
dmas = <&edma 28 0>, <&edma 29 0>;
dma-names = "tx", "rx";
};
uart2: serial@48024000 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart3";
clock-frequency = <48000000>;
reg = <0x48024000 0x2000>;
interrupts = <74>;
status = "disabled";
dmas = <&edma 30 0>, <&edma 31 0>;
dma-names = "tx", "rx";
};
uart3: serial@481a6000 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart4";
clock-frequency = <48000000>;
reg = <0x481a6000 0x2000>;
interrupts = <44>;
status = "disabled";
};
uart4: serial@481a8000 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart5";
clock-frequency = <48000000>;
reg = <0x481a8000 0x2000>;
interrupts = <45>;
status = "disabled";
};
uart5: serial@481aa000 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart6";
clock-frequency = <48000000>;
reg = <0x481aa000 0x2000>;
interrupts = <46>;
status = "disabled";
edma_tptc2: dma@0 {
compatible = "ti,edma3-tptc";
reg = <0 0x100000>;
interrupts = <114>;
interrupt-names = "edma3_tcerrint";
};
};
i2c0: i2c@44e0b000 {
@@ -466,13 +366,6 @@
status = "disabled";
};
hwspinlock: spinlock@480ca000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x480ca000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <1>;
};
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
@@ -480,143 +373,6 @@
interrupts = <91>;
};
dcan0: can@481cc000 {
compatible = "ti,am3352-d_can";
ti,hwmods = "d_can0";
reg = <0x481cc000 0x2000>;
clocks = <&dcan0_fck>;
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 0>;
interrupts = <52>;
status = "disabled";
};
dcan1: can@481d0000 {
compatible = "ti,am3352-d_can";
ti,hwmods = "d_can1";
reg = <0x481d0000 0x2000>;
clocks = <&dcan1_fck>;
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 1>;
interrupts = <55>;
status = "disabled";
};
mailbox: mailbox@480c8000 {
compatible = "ti,omap4-mailbox";
reg = <0x480C8000 0x200>;
interrupts = <77>;
ti,hwmods = "mailbox";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
mbox_wkupm3: wkup_m3 {
ti,mbox-send-noirq;
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <0 0 3>;
};
};
timer1: timer@44e31000 {
compatible = "ti,am335x-timer-1ms";
reg = <0x44e31000 0x400>;
interrupts = <67>;
ti,hwmods = "timer1";
ti,timer-alwon;
clocks = <&timer1_fck>;
clock-names = "fck";
};
timer2: timer@48040000 {
compatible = "ti,am335x-timer";
reg = <0x48040000 0x400>;
interrupts = <68>;
ti,hwmods = "timer2";
clocks = <&timer2_fck>;
clock-names = "fck";
};
timer3: timer@48042000 {
compatible = "ti,am335x-timer";
reg = <0x48042000 0x400>;
interrupts = <69>;
ti,hwmods = "timer3";
};
timer4: timer@48044000 {
compatible = "ti,am335x-timer";
reg = <0x48044000 0x400>;
interrupts = <92>;
ti,hwmods = "timer4";
ti,timer-pwm;
};
timer5: timer@48046000 {
compatible = "ti,am335x-timer";
reg = <0x48046000 0x400>;
interrupts = <93>;
ti,hwmods = "timer5";
ti,timer-pwm;
};
timer6: timer@48048000 {
compatible = "ti,am335x-timer";
reg = <0x48048000 0x400>;
interrupts = <94>;
ti,hwmods = "timer6";
ti,timer-pwm;
};
timer7: timer@4804a000 {
compatible = "ti,am335x-timer";
reg = <0x4804a000 0x400>;
interrupts = <95>;
ti,hwmods = "timer7";
ti,timer-pwm;
};
rtc: rtc@44e3e000 {
compatible = "ti,am3352-rtc", "ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
interrupts = <75
76>;
ti,hwmods = "rtc";
clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clock-names = "int-clk";
};
spi0: spi@48030000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x48030000 0x400>;
interrupts = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
dmas = <&edma 16 0
&edma 17 0
&edma 18 0
&edma 19 0>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
spi1: spi@481a0000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x481a0000 0x400>;
interrupts = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
dmas = <&edma 42 0
&edma 43 0
&edma 44 0
&edma 45 0>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
usb: usb@47400000 {
compatible = "ti,am33xx-usb";
reg = <0x47400000 0x1000>;
@@ -731,121 +487,18 @@
"tx14", "tx15";
};
cppi41dma: dma-controller@47402000 {
cppi41dma: dma-controller@2000 {
compatible = "ti,am3359-cppi41";
reg = <0x47400000 0x1000
0x47402000 0x1000
0x47403000 0x1000
0x47404000 0x4000>;
reg = <0x0000 0x1000>,
<0x2000 0x1000>,
<0x3000 0x1000>,
<0x4000 0x4000>;
reg-names = "glue", "controller", "scheduler", "queuemgr";
interrupts = <17>;
interrupt-names = "glue";
#dma-cells = <2>;
#dma-channels = <30>;
#dma-requests = <256>;
status = "disabled";
};
};
epwmss0: epwmss@48300000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48300000 0x10>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
0x48300180 0x48300180 0x80 /* EQEP */
0x48300200 0x48300200 0x80>; /* EHRPWM */
ecap0: ecap@48300100 {
compatible = "ti,am3352-ecap",
"ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48300100 0x80>;
clocks = <&l4ls_gclk>;
clock-names = "fck";
interrupts = <31>;
interrupt-names = "ecap0";
status = "disabled";
};
ehrpwm0: pwm@48300200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48300200 0x80>;
clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
clock-names = "tbclk", "fck";
status = "disabled";
};
};
epwmss1: epwmss@48302000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48302000 0x10>;
ti,hwmods = "epwmss1";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48302100 0x48302100 0x80 /* ECAP */
0x48302180 0x48302180 0x80 /* EQEP */
0x48302200 0x48302200 0x80>; /* EHRPWM */
ecap1: ecap@48302100 {
compatible = "ti,am3352-ecap",
"ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48302100 0x80>;
clocks = <&l4ls_gclk>;
clock-names = "fck";
interrupts = <47>;
interrupt-names = "ecap1";
status = "disabled";
};
ehrpwm1: pwm@48302200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48302200 0x80>;
clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
clock-names = "tbclk", "fck";
status = "disabled";
};
};
epwmss2: epwmss@48304000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48304000 0x10>;
ti,hwmods = "epwmss2";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48304100 0x48304100 0x80 /* ECAP */
0x48304180 0x48304180 0x80 /* EQEP */
0x48304200 0x48304200 0x80>; /* EHRPWM */
ecap2: ecap@48304100 {
compatible = "ti,am3352-ecap",
"ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48304100 0x80>;
clocks = <&l4ls_gclk>;
clock-names = "fck";
interrupts = <61>;
interrupt-names = "ecap2";
status = "disabled";
};
ehrpwm2: pwm@48304200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48304200 0x80>;
clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
clock-names = "tbclk", "fck";
status = "disabled";
};
};
@@ -904,60 +557,26 @@
};
};
ocmcram: ocmcram@40300000 {
ocmcram: sram@40300000 {
compatible = "mmio-sram";
reg = <0x40300000 0x10000>; /* 64k */
ranges = <0x0 0x40300000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
pm_sram_code: pm-sram-code@0 {
pm_sram_code: pm-code-sram@0 {
compatible = "ti,sram";
reg = <0x0 0x1000>;
protect-exec;
};
pm_sram_data: pm-sram-data@1000 {
pm_sram_data: pm-data-sram@1000 {
compatible = "ti,sram";
reg = <0x1000 0x1000>;
pool;
};
};
elm: elm@48080000 {
compatible = "ti,am3352-elm";
reg = <0x48080000 0x2000>;
interrupts = <4>;
ti,hwmods = "elm";
status = "disabled";
};
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
};
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
dmas = <&edma 53 0>, <&edma 57 0>;
dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
};
am335x_adc: adc {
#io-channel-cells = <1>;
compatible = "ti,am3359-adc";
};
};
emif: emif@4c000000 {
compatible = "ti,emif-am3352";
reg = <0x4c000000 0x1000000>;
@@ -987,60 +606,116 @@
status = "disabled";
};
sham: sham@53100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x200>;
interrupts = <109>;
dmas = <&edma 36 0>;
dma-names = "rx";
sham_target: target-module@53100000 {
compatible = "ti,sysc-omap3-sham", "ti,sysc";
reg = <0x53100100 0x4>,
<0x53100110 0x4>,
<0x53100114 0x4>;
reg-names = "rev", "sysc", "syss";
ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
SYSC_OMAP2_AUTOIDLE)>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,syss-mask = <1>;
/* Domains (P, C): per_pwrdm, l3_clkdm */
clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x53100000 0x1000>;
sham: sham@0 {
compatible = "ti,omap4-sham";
reg = <0 0x200>;
interrupts = <109>;
dmas = <&edma 36 0>;
dma-names = "rx";
};
};
aes: aes@53500000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53500000 0xa0>;
interrupts = <103>;
dmas = <&edma 6 0>,
<&edma 5 0>;
dma-names = "tx", "rx";
aes_target: target-module@53500000 {
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x53500080 0x4>,
<0x53500084 0x4>,
<0x53500088 0x4>;
reg-names = "rev", "sysc", "syss";
ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
SYSC_OMAP2_AUTOIDLE)>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,syss-mask = <1>;
/* Domains (P, C): per_pwrdm, l3_clkdm */
clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x53500000 0x1000>;
aes: aes@0 {
compatible = "ti,omap4-aes";
reg = <0 0xa0>;
interrupts = <103>;
dmas = <&edma 6 0>,
<&edma 5 0>;
dma-names = "tx", "rx";
};
};
mcasp0: mcasp@48038000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp0";
reg = <0x48038000 0x2000>,
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <80>, <81>;
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 8 2>,
<&edma 9 2>;
dma-names = "tx", "rx";
};
target-module@56000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x5600fe00 0x4>,
<0x5600fe10 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
clock-names = "fck";
resets = <&prm_gfx 0>;
reset-names = "rstctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x56000000 0x1000000>;
mcasp1: mcasp@4803c000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp1";
reg = <0x4803C000 0x2000>,
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <82>, <83>;
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 10 2>,
<&edma 11 2>;
dma-names = "tx", "rx";
};
rng: rng@48310000 {
compatible = "ti,omap4-rng";
ti,hwmods = "rng";
reg = <0x48310000 0x2000>;
interrupts = <111>;
/*
* Closed source PowerVR driver, no child device
* binding or driver in mainline
*/
};
};
};
#include "am33xx-l4.dtsi"
#include "am33xx-clocks.dtsi"
&prcm {
prm_per: prm@c00 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0xc00 0x100>;
#reset-cells = <1>;
};
prm_wkup: prm@d00 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0xd00 0x100>;
#reset-cells = <1>;
};
prm_device: prm@f00 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0xf00 0x100>;
#reset-cells = <1>;
};
prm_gfx: prm@1100 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0x1100 0x100>;
#reset-cells = <1>;
};
};

View File

@@ -1,44 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Globalscale Marvell ESPRESSOBin Board with eMMC
* Copyright (C) 2018 Marvell
*
* Romain Perier <romain.perier@free-electrons.com>
* Konstantin Porotchkin <kostap@marvell.com>
*
*/
/*
* Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
*/
/dts-v1/;
#include "armada-3720-espressobin.dtsi"
/ {
model = "Globalscale Marvell ESPRESSOBin Board (eMMC)";
compatible = "globalscale,espressobin-emmc", "globalscale,espressobin",
"marvell,armada3720", "marvell,armada3710";
};
/* U11 */
&sdhci1 {
non-removable;
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs400-1_8v;
marvell,xenon-emmc;
marvell,xenon-tun-count = <9>;
marvell,pad-type = "fixed-1-8v";
pinctrl-names = "default";
pinctrl-0 = <&mmc_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
mmccard: mmccard@0 {
compatible = "mmc-card";
reg = <0>;
};
};

View File

@@ -1,20 +1,192 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Globalscale Marvell ESPRESSOBin Board
* Device Tree file for Marvell Armada 3720 community board
* (ESPRESSOBin)
* Copyright (C) 2016 Marvell
*
* Romain Perier <romain.perier@free-electrons.com>
* Gregory CLEMENT <gregory.clement@free-electrons.com>
* Konstantin Porotchkin <kostap@marvell.com>
*
*/
/*
* Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "armada-3720-espressobin.dtsi"
#include "armada-372x.dtsi"
/ {
model = "Globalscale Marvell ESPRESSOBin Board";
compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &eth0;
i2c0 = &i2c0;
spi0 = &spi0;
};
memory {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
vcc_sd_reg0: regulator@0 {
compatible = "regulator-gpio";
regulator-name = "vcc_sd0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
states = <1800000 0x1
3300000 0x0>;
gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
};
};
&comphy {
max-lanes = <3>;
phy0 {
phy-type = <PHY_TYPE_USB3_HOST0>;
phy-speed = <PHY_SPEED_5G>;
};
phy1 {
phy-type = <PHY_TYPE_PEX0>;
phy-speed = <PHY_SPEED_2_5G>;
};
phy2 {
phy-type = <PHY_TYPE_SATA0>;
phy-speed = <PHY_SPEED_5G>;
};
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
phy-mode = "rgmii";
phy_addr = <0x1>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
/* CON3 */
&sata {
status = "okay";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio_pins>;
bus-width = <4>;
cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
vqmmc-supply = <&vcc_sd_reg0>;
status = "okay";
};
/* U11 */
&sdhci1 {
non-removable;
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs400-1_8v;
marvell,xenon-emmc;
marvell,xenon-tun-count = <9>;
marvell,pad-type = "fixed-1-8v";
pinctrl-names = "default";
pinctrl-0 = <&mmc_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
mmccard: mmccard@0 {
compatible = "mmc-card";
reg = <0>;
};
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
m25p,fast-read;
};
};
/* Exported on the micro USB connector CON32 through an FTDI */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
/* CON29 */
&usb2 {
status = "okay";
};
/* CON31 */
&usb3 {
status = "okay";
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -1,167 +0,0 @@
/*
* Device Tree file for Marvell Armada 3720 community board
* (ESPRESSOBin)
* Copyright (C) 2016 Marvell
*
* Gregory CLEMENT <gregory.clement@free-electrons.com>
* Konstantin Porotchkin <kostap@marvell.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "armada-372x.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &eth0;
i2c0 = &i2c0;
spi0 = &spi0;
};
memory {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
vcc_sd_reg0: regulator@0 {
compatible = "regulator-gpio";
regulator-name = "vcc_sd0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
states = <1800000 0x1
3300000 0x0>;
gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
};
};
&comphy {
max-lanes = <3>;
phy0 {
phy-type = <PHY_TYPE_USB3_HOST0>;
phy-speed = <PHY_SPEED_5G>;
};
phy1 {
phy-type = <PHY_TYPE_PEX0>;
phy-speed = <PHY_SPEED_2_5G>;
};
phy2 {
phy-type = <PHY_TYPE_SATA0>;
phy-speed = <PHY_SPEED_5G>;
};
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
phy-mode = "rgmii";
phy_addr = <0x1>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
/* CON3 */
&sata {
status = "okay";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio_pins>;
bus-width = <4>;
cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
vqmmc-supply = <&vcc_sd_reg0>;
status = "okay";
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
m25p,fast-read;
};
};
/* Exported on the micro USB connector CON32 through an FTDI */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
/* CON29 */
&usb2 {
status = "okay";
};
/* CON31 */
&usb3 {
status = "okay";
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -1,13 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
/ {
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
spi1 = &spi1;
};
};
&eth0 {
phy-reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
};
@@ -20,7 +12,6 @@
};
&w25q32 {
status = "okay";
u-boot,dm-spl;
};
@@ -37,5 +28,17 @@
};
&sdhci {
u-boot,dm-spl;
u-boot,dm-spl;
};
&i2c0 {
u-boot,dm-spl;
eeprom@52 {
u-boot,dm-spl;
};
eeprom@53 {
u-boot,dm-spl;
};
};

View File

@@ -22,10 +22,14 @@
};
aliases {
/* So that mvebu u-boot can update the MAC addresses */
/* So that mvebu u-boot can update the MAC address */
ethernet1 = &eth0;
spi1 = &spi1;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
chosen {
stdout-path = "serial0:115200n8";
};
@@ -306,3 +310,11 @@
};
};
};
&w25q32 {
status = "okay";
};
&spi1 {
status = "okay";
};

View File

@@ -0,0 +1,19 @@
// SPDX-License-Identifier: GPL-2.0+
/ {
soc {
internal-regs {
serial@12000 {
u-boot,dm-pre-reloc;
};
};
};
};
&spi0 {
u-boot,dm-pre-reloc;
spi-flash@0 {
u-boot,dm-pre-reloc;
};
};

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