be1d5e0388
rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
14 lines
229 B
Makefile
14 lines
229 B
Makefile
#
|
|
# (C) Copyright 2015 Rockchip Electronics Co., Ltd
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
ifndef CONFIG_SPL_BUILD
|
|
obj-y += reset_rk3036.o
|
|
obj-y += syscon_rk3036.o
|
|
endif
|
|
|
|
obj-y += sdram_rk3036.o
|
|
obj-y += save_boot_param.o
|