SPL needs to detect FPGA device which will be used for loading bitstream. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7.0 KiB
7.0 KiB
SPL needs to detect FPGA device which will be used for loading bitstream. Signed-off-by: Michal Simek <michal.simek@xilinx.com>