u-boot/arch/riscv
Niklas Cassel 530f29cba5 k210: dts: align plic node with Linux
The Linux PLIC interrupt-controller driver actually initializes the hart
context registers in the PLIC driver exactly in the same order as
specified in the interrupts-extended device tree property. See the device
tree binding [1].

The ordering of the interrupts is therefore essential in order to
configure the PLIC correctly.

Fix the order so that we will have sane IRQ behavior when booting Linux
with the u-boot device tree.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-03-15 17:43:11 +08:00
..
cpu riscv: Enable SPI flash env for SiFive Unmatched. 2021-12-02 16:43:56 +08:00
dts k210: dts: align plic node with Linux 2022-03-15 17:43:11 +08:00
include/asm doc: replace @return by Return: 2022-01-19 18:11:34 +01:00
lib efi_loader: fix SectionAlignment, FileAlignment 2022-01-15 10:57:22 +01:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig Prepare v2021.10-rc4 2021-09-16 10:29:40 -04:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00