4b09719c38
stride value from sdram timings can be computed dynamically based on the determined capacity for the given channel. Right now these stride values are taken as part of sdram timings via dtsi, but it possible to use same timings dtsi for given frequency even though the configured board sdram do support single channel with different size by dynamically detect the stride value. Example, NanoPi NEO4 do have DDR3-1866, but with single channel and 1GB size with dynamic stride detection it is possible to use existing rk3399-sdram-ddr3-1866.dtsi whose stride, number of channels and capacity it support is d efferent. So, add initial support to calculate the stride value for 2 channels sdram, which is available by default on existing boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com> |
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| .. | ||
| mediatek | ||
| rockchip | ||
| stm32mp1 | ||
| bmips_ram.c | ||
| k3-am654-ddrss.c | ||
| k3-am654-ddrss.h | ||
| Kconfig | ||
| Makefile | ||
| mpc83xx_sdram.c | ||
| ram-uclass.c | ||
| sandbox_ram.c | ||
| stm32_sdram.c | ||