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ram: stm32_sdram: Adds stm32f429-disco fixes for HardFault at booting

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- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000

Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Radoslaw Pietrzyk 2018-05-16 17:27:11 +02:00 committed by Tom Rini
parent b460b889e2
commit 246a5e5fc2
3 changed files with 29 additions and 16 deletions
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2
arch/arm/dts/stm32f429-disco-u-boot.dtsi
View File

@ -37,6 +37,8 @@
clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>;
pinctrl-0 = <&fmc_pins>;
pinctrl-names = "default";
st,syscfg = <&syscfg>;
st,swp_fmc = <1>;
u-boot,dm-pre-reloc;
/*

37
drivers/ram/stm32_sdram.c
View File

@ -11,6 +11,8 @@
#include <asm/io.h>
#define MEM_MODE_MASK GENMASK(2, 0)
#define SWP_FMC_OFFSET 10
#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET)
#define NOT_FOUND 0xff
struct stm32_fmc_regs {
@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
struct ofnode_phandle_args args;
u32 *syscfg_base;
u32 mem_remap;
u32 swp_fmc;
ofnode bank_node;
char *bank_name;
u8 bank = 0;
int ret;
mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
if (mem_remap != NOT_FOUND) {
ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
&args);
if (ret) {
debug("%s: can't find syscon device (%d)\n", __func__,
ret);
return ret;
}
if (ret) {
dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__, ret);
} else {
syscfg_base = (u32 *)ofnode_get_addr(args.node);
/* set memory mapping selection */
clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
} else {
debug("%s: cannot find st,mem_remap property\n", __func__);
mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
if (mem_remap != NOT_FOUND) {
/* set memory mapping selection */
clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
} else {
dev_dbg(dev, "%s: cannot find st,mem_remap property\n", __func__);
}
swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);
if (swp_fmc != NOT_FOUND) {
/* set fmc swapping selection */
clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET);
} else {
dev_dbg(dev, "%s: cannot find st,swp_fmc property\n", __func__);
}
dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base);
}
dev_for_each_subnode(bank_node, dev) {

6
include/configs/stm32f429-discovery.h
View File

@ -22,10 +22,10 @@
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_RAM_CS 1
#define CONFIG_SYS_RAM_FREQ_DIV 2
#define CONFIG_SYS_RAM_BASE 0xD0000000
#define CONFIG_SYS_RAM_BASE 0x90000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
#define CONFIG_SYS_LOAD_ADDR 0xD0400000
#define CONFIG_LOADADDR 0xD0400000
#define CONFIG_SYS_LOAD_ADDR 0x90400000
#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12
#define CONFIG_SYS_MAX_FLASH_BANKS 2