29caf9305b
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
163 lines
4.7 KiB
C
163 lines
4.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2017 Google, Inc
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*/
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#include <common.h>
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#include <cyclic.h>
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#include <dm.h>
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#include <wdt.h>
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#include <asm/gpio.h>
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#include <asm/state.h>
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#include <asm/test.h>
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#include <dm/test.h>
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#include <test/test.h>
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#include <test/ut.h>
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#include <linux/delay.h>
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#include <watchdog.h>
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/* Test that watchdog driver functions are called */
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static int dm_test_wdt_base(struct unit_test_state *uts)
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{
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struct sandbox_state *state = state_get_current();
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struct udevice *dev;
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const u64 timeout = 42;
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ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
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DM_DRIVER_GET(wdt_sandbox), &dev));
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ut_assertnonnull(dev);
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ut_asserteq(0, state->wdt.counter);
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ut_asserteq(false, state->wdt.running);
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ut_assertok(wdt_start(dev, timeout, 0));
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ut_asserteq(timeout, state->wdt.counter);
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ut_asserteq(true, state->wdt.running);
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uint reset_count = state->wdt.reset_count;
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ut_assertok(wdt_reset(dev));
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ut_asserteq(reset_count + 1, state->wdt.reset_count);
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ut_asserteq(true, state->wdt.running);
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ut_assertok(wdt_stop(dev));
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ut_asserteq(false, state->wdt.running);
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return 0;
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}
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DM_TEST(dm_test_wdt_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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static int dm_test_wdt_gpio_toggle(struct unit_test_state *uts)
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{
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/*
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* The sandbox wdt gpio is "connected" to gpio bank a, offset
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* 7. Use the sandbox back door to verify that the gpio-wdt
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* driver behaves as expected when using the 'toggle' algorithm.
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*/
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struct udevice *wdt, *gpio;
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const u64 timeout = 42;
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const int offset = 7;
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int val;
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ut_assertok(uclass_get_device_by_name(UCLASS_WDT,
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"wdt-gpio-toggle", &wdt));
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ut_assertnonnull(wdt);
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ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
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ut_assertnonnull(gpio);
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ut_assertok(wdt_start(wdt, timeout, 0));
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val = sandbox_gpio_get_value(gpio, offset);
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ut_assertok(wdt_reset(wdt));
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ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset));
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ut_assertok(wdt_reset(wdt));
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ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
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ut_asserteq(-ENOSYS, wdt_stop(wdt));
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return 0;
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}
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DM_TEST(dm_test_wdt_gpio_toggle, UT_TESTF_SCAN_FDT);
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static int dm_test_wdt_gpio_level(struct unit_test_state *uts)
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{
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/*
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* The sandbox wdt gpio is "connected" to gpio bank a, offset
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* 7. Use the sandbox back door to verify that the gpio-wdt
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* driver behaves as expected when using the 'level' algorithm.
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*/
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struct udevice *wdt, *gpio;
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const u64 timeout = 42;
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const int offset = 7;
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int val;
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ut_assertok(uclass_get_device_by_name(UCLASS_WDT,
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"wdt-gpio-level", &wdt));
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ut_assertnonnull(wdt);
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ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
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ut_assertnonnull(gpio);
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ut_assertok(wdt_start(wdt, timeout, 0));
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val = sandbox_gpio_get_value(gpio, offset);
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ut_assertok(wdt_reset(wdt));
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ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
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ut_assertok(wdt_reset(wdt));
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ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
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ut_asserteq(-ENOSYS, wdt_stop(wdt));
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return 0;
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}
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DM_TEST(dm_test_wdt_gpio_level, UT_TESTF_SCAN_FDT);
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static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts)
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{
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struct sandbox_state *state = state_get_current();
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struct udevice *gpio_wdt, *sandbox_wdt;
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struct udevice *gpio;
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const u64 timeout = 42;
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const int offset = 7;
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uint reset_count;
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int val;
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ut_assertok(uclass_get_device_by_name(UCLASS_WDT,
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"wdt-gpio-toggle", &gpio_wdt));
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ut_assertnonnull(gpio_wdt);
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ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
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DM_DRIVER_GET(wdt_sandbox), &sandbox_wdt));
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ut_assertnonnull(sandbox_wdt);
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ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
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ut_assertnonnull(gpio);
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/* Neither device should be "started", so watchdog_reset() should be a no-op. */
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reset_count = state->wdt.reset_count;
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val = sandbox_gpio_get_value(gpio, offset);
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cyclic_run();
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ut_asserteq(reset_count, state->wdt.reset_count);
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ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
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/* Start both devices. */
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ut_assertok(wdt_start(gpio_wdt, timeout, 0));
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ut_assertok(wdt_start(sandbox_wdt, timeout, 0));
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/* Make sure both devices have just been pinged. */
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timer_test_add_offset(100);
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cyclic_run();
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reset_count = state->wdt.reset_count;
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val = sandbox_gpio_get_value(gpio, offset);
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/* The gpio watchdog should be pinged, the sandbox one not. */
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timer_test_add_offset(30);
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cyclic_run();
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ut_asserteq(reset_count, state->wdt.reset_count);
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ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset));
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/* After another ~30ms, both devices should get pinged. */
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timer_test_add_offset(30);
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cyclic_run();
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ut_asserteq(reset_count + 1, state->wdt.reset_count);
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ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
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return 0;
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}
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DM_TEST(dm_test_wdt_watchdog_reset, UT_TESTF_SCAN_FDT);
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