b861574bd9
Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS Signed-off-by: Tom Rini <trini@konsulko.com>
90 lines
2.5 KiB
C
90 lines
2.5 KiB
C
/*
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* Copyright (C) 2013 Marek Vasut <marex@denx.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIGS_MXS_H__
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#define __CONFIGS_MXS_H__
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/*
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* Includes
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*/
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#if defined(CONFIG_MX23) && defined(CONFIG_MX28)
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#error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
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#elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
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#error Select one of CONFIG_MX23 or CONFIG_MX28 !
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#endif
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#include <asm/arch/regs-base.h>
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#if defined(CONFIG_MX23)
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#include <asm/arch/iomux-mx23.h>
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#elif defined(CONFIG_MX28)
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#include <asm/arch/iomux-mx28.h>
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#endif
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/*
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* CPU specifics
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*/
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/* Startup hooks */
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/* Memory sizes */
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/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
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#define CFG_SYS_INIT_RAM_ADDR 0x00000000
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#if defined(CONFIG_MX23)
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#define CFG_SYS_INIT_RAM_SIZE (32 * 1024)
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#elif defined(CONFIG_MX28)
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#define CFG_SYS_INIT_RAM_SIZE (128 * 1024)
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#endif
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/* Point initial SP in SRAM so SPL can use it too. */
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/*
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* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
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* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
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* binary. In case there was more of this mess, 0x100 bytes are skipped.
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*
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* In case of a HAB boot, we cannot for some weird reason use the first 4KiB
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* of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
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* blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
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*
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* As for the SPL, we must avoid the first 4 KiB as well, but we load the
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* IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
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*/
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/* U-Boot general configuration */
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/*
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* Drivers
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*/
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/*
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* DUART Serial Driver.
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* Conflicts with AUART driver which can be set by board.
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*/
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#define CFG_PL011_CLOCK 24000000
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#define CFG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
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/* Default baudrate can be overridden by board! */
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/* NAND */
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#ifdef CONFIG_CMD_NAND
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#define CFG_SYS_NAND_BASE 0x60000000
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#endif
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#endif /* __CONFIGS_MXS_H__ */
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