960debbe3c
Introduce the code in mach-stm32mp and the configuration file stm32mp13_defconfig for the new STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
134 lines
3.3 KiB
Plaintext
134 lines
3.3 KiB
Plaintext
if ARCH_STM32MP
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config SPL
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select SPL_BOARD_INIT
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select SPL_CLK
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select SPL_DM
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select SPL_DM_SEQ_ALIAS
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select SPL_DRIVERS_MISC
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select SPL_FRAMEWORK
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select SPL_GPIO
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select SPL_LIBCOMMON_SUPPORT
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select SPL_LIBGENERIC_SUPPORT
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select SPL_OF_CONTROL
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select SPL_OF_TRANSLATE
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select SPL_PINCTRL
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select SPL_REGMAP
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select SPL_DM_RESET
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select SPL_SERIAL
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select SPL_SYSCON
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select SPL_WATCHDOG if WATCHDOG
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imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
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imply SPL_BOOTSTAGE if BOOTSTAGE
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imply SPL_DISPLAY_PRINT
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imply SPL_LIBDISK_SUPPORT
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imply SPL_SPI_LOAD if SPL_SPI
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config SYS_SOC
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default "stm32mp"
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config SYS_MALLOC_LEN
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default 0x2000000
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config ENV_SIZE
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default 0x2000
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choice
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prompt "Select STMicroelectronics STM32MPxxx Soc"
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default STM32MP15x
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config STM32MP13x
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bool "Support STMicroelectronics STM32MP13x Soc"
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select ARM_SMCCC
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select OF_BOARD
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select OF_BOARD_SETUP
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select PINCTRL_STM32
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select STM32_RCC
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select STM32_RESET
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select STM32_SERIAL
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select SYS_ARCH_TIMER
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imply CMD_NVEDIT_INFO
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help
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support of STMicroelectronics SOC STM32MP13x family
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STMicroelectronics MPU with core ARMv7
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config STM32MP15x
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bool "Support STMicroelectronics STM32MP15x Soc"
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select ARCH_SUPPORT_PSCI
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select BINMAN
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select OF_BOARD if TFABOOT
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select OF_BOARD_SETUP
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select PINCTRL_STM32
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select STM32_RCC
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select STM32_RESET
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select STM32_SERIAL
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select SUPPORT_SPL
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select SYS_ARCH_TIMER
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imply CMD_NVEDIT_INFO
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help
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support of STMicroelectronics SOC STM32MP15x family
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STM32MP157, STM32MP153 or STM32MP151
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STMicroelectronics MPU with core ARMv7
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dual core A7 for STM32MP157/3, monocore for STM32MP151
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endchoice
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config NR_DRAM_BANKS
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default 1
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config DDR_CACHEABLE_SIZE
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hex "Size of the DDR marked cacheable in pre-reloc stage"
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default 0x40000000
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help
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Define the size of the DDR marked as cacheable in U-Boot
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pre-reloc stage.
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This option can be useful to avoid speculatif access
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to secured area of DDR used by TF-A or OP-TEE before U-Boot
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initialization.
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The areas marked "no-map" in device tree should be located
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before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
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config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
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hex "Partition on MMC2 to use to load U-Boot from"
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depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
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default 1
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help
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Partition on the second MMC to load U-Boot from when the MMC is being
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used in raw mode
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config STM32_ETZPC
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bool "STM32 Extended TrustZone Protection"
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depends on STM32MP15x || STM32MP13x
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default y
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imply BOOTP_SERVERIP
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help
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Say y to enable STM32 Extended TrustZone Protection
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config STM32_ECDSA_VERIFY
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bool "STM32 ECDSA verification via the ROM API"
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depends on SPL_ECDSA_VERIFY
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default y
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help
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Say y to enable the uclass driver for ECDSA verification using the
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ROM API provided on STM32MP.
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The ROM API is only available during SPL for now.
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config CMD_STM32KEY
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bool "command stm32key to fuse public key hash"
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help
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fuse public key hash in corresponding fuse used to authenticate
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binary.
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This command is used to evaluate the secure boot on stm32mp SOC,
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it is deactivated by default in real products.
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source "arch/arm/mach-stm32mp/Kconfig.13x"
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source "arch/arm/mach-stm32mp/Kconfig.15x"
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source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
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endif
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