arm: stm32mp: add support of STM32MP13x
Introduce the code in mach-stm32mp and the configuration file stm32mp13_defconfig for the new STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
parent
741090c510
commit
960debbe3c
@ -37,6 +37,24 @@ choice
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prompt "Select STMicroelectronics STM32MPxxx Soc"
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default STM32MP15x
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config STM32MP13x
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bool "Support STMicroelectronics STM32MP13x Soc"
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select ARM_SMCCC
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select OF_BOARD
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select OF_BOARD_SETUP
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select PINCTRL_STM32
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select STM32_RCC
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select STM32_RESET
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select STM32_SERIAL
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select SYS_ARCH_TIMER
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imply CMD_NVEDIT_INFO
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help
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support of STMicroelectronics SOC STM32MP13x family
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STMicroelectronics MPU with core ARMv7
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config STM32MP15x
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bool "Support STMicroelectronics STM32MP15x Soc"
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select ARCH_SUPPORT_PSCI
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@ -85,7 +103,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
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config STM32_ETZPC
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bool "STM32 Extended TrustZone Protection"
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depends on STM32MP15x
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depends on STM32MP15x || STM32MP13x
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default y
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imply BOOTP_SERVERIP
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help
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@ -108,6 +126,7 @@ config CMD_STM32KEY
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This command is used to evaluate the secure boot on stm32mp SOC,
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it is deactivated by default in real products.
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source "arch/arm/mach-stm32mp/Kconfig.13x"
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source "arch/arm/mach-stm32mp/Kconfig.15x"
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source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
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57
arch/arm/mach-stm32mp/Kconfig.13x
Normal file
57
arch/arm/mach-stm32mp/Kconfig.13x
Normal file
@ -0,0 +1,57 @@
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if STM32MP13x
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choice
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prompt "STM32MP13x board select"
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optional
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config TARGET_ST_STM32MP13x
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bool "STMicroelectronics STM32MP13x boards"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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target the STMicroelectronics board with SOC STM32MP13x
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managed by board/st/stm32mp1.
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The difference between board are managed with devicetree
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endchoice
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config SYS_TEXT_BASE
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default 0xC0000000
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config PRE_CON_BUF_ADDR
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default 0xC0800000
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config PRE_CON_BUF_SZ
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default 4096
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config BOOTSTAGE_STASH_ADDR
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default 0xC3000000
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if BOOTCOUNT_GENERIC
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config SYS_BOOTCOUNT_SINGLEWORD
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default y
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# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(31)
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config SYS_BOOTCOUNT_ADDR
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default 0x5C00A17C
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endif
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if DEBUG_UART
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# debug on UART4 by default
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config DEBUG_UART_BASE
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default 0x40010000
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# clock source is HSI on reset
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config DEBUG_UART_CLOCK
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default 48000000 if STM32_FPGA
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default 64000000
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endif
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source "board/st/stm32mp1/Kconfig"
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endif
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@ -8,6 +8,7 @@ obj-y += dram_init.o
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obj-y += syscon.o
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obj-y += bsec.o
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obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
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obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
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ifdef CONFIG_SPL_BUILD
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@ -52,8 +52,11 @@ void dram_bank_mmu_setup(int bank)
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enum dcache_option option;
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if (IS_ENABLED(CONFIG_SPL_BUILD)) {
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/* STM32_SYSRAM_BASE exist only when SPL is supported */
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#ifdef CONFIG_SPL
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start = ALIGN_DOWN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE);
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size = ALIGN(STM32_SYSRAM_SIZE, MMU_SECTION_SIZE);
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#endif
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} else if (gd->flags & GD_FLG_RELOC) {
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/* bd->bi_dram is available only after relocation */
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start = bd->bi_dram[bank].start;
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@ -259,6 +259,9 @@ int ft_system_setup(void *blob, struct bd_info *bd)
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u32 pkg, cpu;
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char name[SOC_NAME_SIZE];
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if (IS_ENABLED(CONFIG_STM32MP13x))
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return 0;
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soc = fdt_path_offset(blob, "/soc");
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/* when absent, nothing to do */
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if (soc == -FDT_ERR_NOTFOUND)
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@ -17,7 +17,9 @@
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#define STM32_RCC_BASE 0x50000000
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#define STM32_PWR_BASE 0x50001000
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#define STM32_SYSCFG_BASE 0x50020000
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#ifdef CONFIG_STM32MP15x
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#define STM32_DBGMCU_BASE 0x50081000
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#endif
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#define STM32_FMC2_BASE 0x58002000
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#define STM32_DDRCTRL_BASE 0x5A003000
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#define STM32_DDRPHYC_BASE 0x5A004000
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@ -26,8 +28,14 @@
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#define STM32_STGEN_BASE 0x5C008000
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#define STM32_TAMP_BASE 0x5C00A000
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#ifdef CONFIG_STM32MP15x
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#define STM32_USART1_BASE 0x5C000000
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#define STM32_USART2_BASE 0x4000E000
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#endif
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#ifdef CONFIG_STM32MP13x
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#define STM32_USART1_BASE 0x4c000000
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#define STM32_USART2_BASE 0x4c001000
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#endif
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#define STM32_USART3_BASE 0x4000F000
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#define STM32_UART4_BASE 0x40010000
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#define STM32_UART5_BASE 0x40011000
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@ -39,8 +47,10 @@
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#define STM32_SDMMC2_BASE 0x58007000
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#define STM32_SDMMC3_BASE 0x48004000
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#ifdef CONFIG_STM32MP15x
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#define STM32_SYSRAM_BASE 0x2FFC0000
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#define STM32_SYSRAM_SIZE SZ_256K
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#endif
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#define STM32_DDR_BASE 0xC0000000
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#define STM32_DDR_SIZE SZ_1G
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@ -98,6 +108,8 @@ enum boot_device {
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/* TAMP registers */
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#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
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#ifdef CONFIG_STM32MP15x
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#define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4)
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#define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5)
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#define TAMP_COPRO_RSC_TBL_ADDRESS TAMP_BACKUP_REGISTER(17)
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@ -111,6 +123,12 @@ enum boot_device {
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#define TAMP_COPRO_STATE_CSTOP 3
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#define TAMP_COPRO_STATE_STANDBY 4
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#define TAMP_COPRO_STATE_CRASH 5
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#endif
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#ifdef CONFIG_STM32MP13x
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#define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(31)
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#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30)
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#endif
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#define TAMP_BOOT_MODE_MASK GENMASK(15, 8)
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#define TAMP_BOOT_MODE_SHIFT 8
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@ -138,11 +156,19 @@ enum forced_boot_mode {
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#define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4)
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/* BSEC OTP index */
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#ifdef CONFIG_STM32MP15x
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#define BSEC_OTP_RPN 1
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#define BSEC_OTP_SERIAL 13
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#define BSEC_OTP_PKG 16
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#define BSEC_OTP_MAC 57
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#define BSEC_OTP_BOARD 59
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#endif
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#ifdef CONFIG_STM32MP13x
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#define BSEC_OTP_RPN 1
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#define BSEC_OTP_SERIAL 13
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#define BSEC_OTP_MAC 57
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#define BSEC_OTP_BOARD 60
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* _MACH_STM32_H_ */
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@ -3,7 +3,7 @@
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* Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
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*/
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/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */
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/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0) */
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#define CPU_STM32MP157Cxx 0x05000000
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#define CPU_STM32MP157Axx 0x05000001
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#define CPU_STM32MP153Cxx 0x05000024
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@ -17,10 +17,24 @@
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#define CPU_STM32MP151Fxx 0x050000AE
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#define CPU_STM32MP151Dxx 0x050000AF
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#define CPU_STM32MP135Cxx 0x05010000
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#define CPU_STM32MP135Axx 0x05010001
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#define CPU_STM32MP133Cxx 0x050100C0
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#define CPU_STM32MP133Axx 0x050100C1
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#define CPU_STM32MP131Cxx 0x050106C8
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#define CPU_STM32MP131Axx 0x050106C9
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#define CPU_STM32MP135Fxx 0x05010800
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#define CPU_STM32MP135Dxx 0x05010801
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#define CPU_STM32MP133Fxx 0x050108C0
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#define CPU_STM32MP133Dxx 0x050108C1
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#define CPU_STM32MP131Fxx 0x05010EC8
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#define CPU_STM32MP131Dxx 0x05010EC9
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/* return CPU_STMP32MP...Xxx constants */
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u32 get_cpu_type(void);
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#define CPU_DEV_STM32MP15 0x500
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#define CPU_DEV_STM32MP13 0x501
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/* return CPU_DEV constants */
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u32 get_cpu_dev(void);
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115
arch/arm/mach-stm32mp/stm32mp13x.c
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115
arch/arm/mach-stm32mp/stm32mp13x.c
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@ -0,0 +1,115 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
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/*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*/
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#define LOG_CATEGORY LOGC_ARCH
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#include <common.h>
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#include <log.h>
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#include <syscon.h>
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#include <asm/io.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/sys_proto.h>
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/* SYSCFG register */
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#define SYSCFG_IDC_OFFSET 0x380
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#define SYSCFG_IDC_DEV_ID_MASK GENMASK(11, 0)
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#define SYSCFG_IDC_DEV_ID_SHIFT 0
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#define SYSCFG_IDC_REV_ID_MASK GENMASK(31, 16)
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#define SYSCFG_IDC_REV_ID_SHIFT 16
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/* Device Part Number (RPN) = OTP_DATA1 lower 11 bits */
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#define RPN_SHIFT 0
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#define RPN_MASK GENMASK(11, 0)
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static u32 read_idc(void)
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{
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void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
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return readl(syscfg + SYSCFG_IDC_OFFSET);
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}
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u32 get_cpu_dev(void)
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{
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return (read_idc() & SYSCFG_IDC_DEV_ID_MASK) >> SYSCFG_IDC_DEV_ID_SHIFT;
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}
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u32 get_cpu_rev(void)
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{
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return (read_idc() & SYSCFG_IDC_REV_ID_MASK) >> SYSCFG_IDC_REV_ID_SHIFT;
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}
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/* Get Device Part Number (RPN) from OTP */
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static u32 get_cpu_rpn(void)
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{
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return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
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}
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u32 get_cpu_type(void)
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{
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return (get_cpu_dev() << 16) | get_cpu_rpn();
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}
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void get_soc_name(char name[SOC_NAME_SIZE])
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{
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char *cpu_s, *cpu_r;
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/* MPUs Part Numbers */
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switch (get_cpu_type()) {
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case CPU_STM32MP135Fxx:
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cpu_s = "135F";
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break;
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case CPU_STM32MP135Dxx:
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cpu_s = "135D";
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break;
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case CPU_STM32MP135Cxx:
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cpu_s = "135C";
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break;
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case CPU_STM32MP135Axx:
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cpu_s = "135A";
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break;
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case CPU_STM32MP133Fxx:
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cpu_s = "133F";
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break;
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case CPU_STM32MP133Dxx:
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cpu_s = "133D";
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break;
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case CPU_STM32MP133Cxx:
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cpu_s = "133C";
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break;
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case CPU_STM32MP133Axx:
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cpu_s = "133A";
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break;
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case CPU_STM32MP131Fxx:
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cpu_s = "131F";
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break;
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case CPU_STM32MP131Dxx:
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cpu_s = "131D";
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break;
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case CPU_STM32MP131Cxx:
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cpu_s = "131C";
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break;
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case CPU_STM32MP131Axx:
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cpu_s = "131A";
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break;
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default:
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cpu_s = "????";
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break;
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}
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/* REVISION */
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switch (get_cpu_rev()) {
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case CPU_REV1:
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cpu_r = "A";
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break;
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case CPU_REV1_1:
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cpu_r = "Z";
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break;
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default:
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cpu_r = "?";
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break;
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}
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snprintf(name, SOC_NAME_SIZE, "STM32MP%s Rev.%s", cpu_s, cpu_r);
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}
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@ -11,3 +11,18 @@ config SYS_CONFIG_NAME
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source "board/st/common/Kconfig"
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endif
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if TARGET_ST_STM32MP13x
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config SYS_BOARD
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default "stm32mp1"
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config SYS_VENDOR
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default "st"
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config SYS_CONFIG_NAME
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default "stm32mp13_st_common"
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source "board/st/common/Kconfig"
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endif
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@ -9,5 +9,7 @@ F: board/st/stm32mp1/
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F: configs/stm32mp15_defconfig
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F: configs/stm32mp15_basic_defconfig
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F: configs/stm32mp15_trusted_defconfig
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F: include/configs/stm32mp13_common.h
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F: include/configs/stm32mp13_st_common.h
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F: include/configs/stm32mp15_common.h
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F: include/configs/stm32mp15_st_common.h
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@ -9,8 +9,8 @@ CONFIG_SPL_TEXT_BASE=0x2FFC2500
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CONFIG_SPL_MMC=y
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CONFIG_SPL=y
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CONFIG_CMD_STM32KEY=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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CONFIG_CMD_STM32PROG=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_ENV_OFFSET_REDUND=0x4C0000
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CONFIG_CMD_STM32PROG=y
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# CONFIG_ARMV7_NONSEC is not set
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@ -7,9 +7,9 @@ CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_STM32MP15x_STM32IMAGE=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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CONFIG_CMD_STM32PROG=y
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# CONFIG_ARMV7_NONSEC is not set
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100
include/configs/stm32mp13_common.h
Normal file
100
include/configs/stm32mp13_common.h
Normal file
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/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */
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/*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*
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* Configuration settings for the STM32MP13x CPU
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*/
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#ifndef __CONFIG_STM32MP13_COMMMON_H
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#define __CONFIG_STM32MP13_COMMMON_H
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#include <linux/sizes.h>
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#include <asm/arch/stm32.h>
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/*
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* Configuration of the external SRAM memory used by U-Boot
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*/
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#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE
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/*
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* For booting Linux, use the first 256 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ SZ_256M
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/* Extend size of kernel image for uncompression */
|
||||
#define CONFIG_SYS_BOOTM_LEN SZ_32M
|
||||
|
||||
/*MMC SD*/
|
||||
#define CONFIG_SYS_MMC_MAX_DEVICE 2
|
||||
|
||||
/* NAND support */
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
|
||||
/*****************************************************************************/
|
||||
#ifdef CONFIG_DISTRO_DEFAULTS
|
||||
/*****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_CMD_MMC
|
||||
#define BOOT_TARGET_MMC0(func) func(MMC, mmc, 0)
|
||||
#define BOOT_TARGET_MMC1(func) func(MMC, mmc, 1)
|
||||
#else
|
||||
#define BOOT_TARGET_MMC0(func)
|
||||
#define BOOT_TARGET_MMC1(func)
|
||||
#endif
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
BOOT_TARGET_MMC1(func) \
|
||||
BOOT_TARGET_MMC0(func)
|
||||
|
||||
/*
|
||||
* default bootcmd for stm32mp13:
|
||||
* for mmc boot (eMMC, SD card), distro boot on the same mmc device
|
||||
*/
|
||||
#define STM32MP_BOOTCMD "bootcmd_stm32mp=" \
|
||||
"echo \"Boot over ${boot_device}${boot_instance}!\";" \
|
||||
"run env_check;" \
|
||||
"if test ${boot_device} = mmc;" \
|
||||
"then env set boot_targets \"mmc${boot_instance}\"; fi;" \
|
||||
"run distro_bootcmd;" \
|
||||
"fi;\0"
|
||||
|
||||
#define STM32MP_EXTRA \
|
||||
"env_check=if env info -p -d -q; then env save; fi\0" \
|
||||
"boot_net_usb_start=true\0"
|
||||
|
||||
#ifndef STM32MP_BOARD_EXTRA_ENV
|
||||
#define STM32MP_BOARD_EXTRA_ENV
|
||||
#endif
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
/*
|
||||
* memory layout for 32M uncompressed/compressed kernel,
|
||||
* 1M fdt, 1M script, 1M pxe and 1M for overlay
|
||||
* and the ramdisk at the end.
|
||||
*/
|
||||
#define __KERNEL_ADDR_R __stringify(0xc2000000)
|
||||
#define __FDT_ADDR_R __stringify(0xc4000000)
|
||||
#define __SCRIPT_ADDR_R __stringify(0xc4100000)
|
||||
#define __PXEFILE_ADDR_R __stringify(0xc4200000)
|
||||
#define __FDTOVERLAY_ADDR_R __stringify(0xc4300000)
|
||||
#define __RAMDISK_ADDR_R __stringify(0xc4400000)
|
||||
|
||||
#define STM32MP_MEM_LAYOUT \
|
||||
"kernel_addr_r=" __KERNEL_ADDR_R "\0" \
|
||||
"fdt_addr_r=" __FDT_ADDR_R "\0" \
|
||||
"scriptaddr=" __SCRIPT_ADDR_R "\0" \
|
||||
"pxefile_addr_r=" __PXEFILE_ADDR_R "\0" \
|
||||
"fdtoverlay_addr_r=" __FDTOVERLAY_ADDR_R "\0" \
|
||||
"ramdisk_addr_r=" __RAMDISK_ADDR_R "\0"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
STM32MP_MEM_LAYOUT \
|
||||
STM32MP_BOOTCMD \
|
||||
BOOTENV \
|
||||
STM32MP_EXTRA \
|
||||
STM32MP_BOARD_EXTRA_ENV
|
||||
|
||||
#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/
|
||||
|
||||
#endif /* __CONFIG_STM32MP13_COMMMON_H */
|
17
include/configs/stm32mp13_st_common.h
Normal file
17
include/configs/stm32mp13_st_common.h
Normal file
@ -0,0 +1,17 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* Configuration settings for the STMicroelectronics STM32MP13x boards
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_STM32MP13_ST_COMMON_H__
|
||||
#define __CONFIG_STM32MP13_ST_COMMON_H__
|
||||
|
||||
#define STM32MP_BOARD_EXTRA_ENV \
|
||||
"usb_pgood_delay=1000\0" \
|
||||
"console=ttySTM0\0"
|
||||
|
||||
#include <configs/stm32mp13_common.h>
|
||||
|
||||
#endif
|
@ -90,7 +90,7 @@
|
||||
BOOT_TARGET_PXE(func)
|
||||
|
||||
/*
|
||||
* default bootcmd for stm32mp1:
|
||||
* default bootcmd for stm32mp15:
|
||||
* for serial/usb: execute the stm32prog command
|
||||
* for mmc boot (eMMC, SD card), distro boot on the same mmc device
|
||||
* for nand or spi-nand boot, distro boot with ubifs on UBI partition
|
||||
|
Loading…
Reference in New Issue
Block a user