Commit Graph

33048 Commits

Author SHA1 Message Date
Ludger Dreier
e3cc5bc582 env_eeprom.c: Correct using saved environment
The changes in ed6a5d4 unintentionally broke support for reading the
environment saved to eeprom back.  To correct this the crc-check and
decision on which environment to use is now moved to env_relocate_spec.
This is done for both the "redundant env" and the "single env" case.

Signed-off-by: Ludger Dreier <ludger.dreier@keymile.com>
2015-10-12 10:33:31 -04:00
Albert ARIBAUD (3ADEV)
040ef8f565 pcm052: fix MTD partitioning
MTD partitioning in current pcm052 configuration is inconsistent.
Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and
CONFIG_ENV_OFFSET[_REDUND].

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-10-11 17:21:45 -04:00
Tom Rini
e8de6d7b4a test/fs/fs-test.sh: Update expected results and TC10 logic
With the changes in 7a3e70c we now get read(2) behavior so trying to
read 2MB with 1MB left in the file results in 1MB read and a warning.
We update the test logic here to make sure we read back 1MB as expected.
This change however changes the overall summary as while EXT4 continues
to not have offset support the test now fails when expected to pass
rather than fails when expected to fail (and we report that as pass).

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-11 17:12:14 -04:00
Vladimir Zapolskiy
4c90234586 lpc32xx: fix calculation of HCLK PLL output clock
Execution branches on feedback mode are swapped, this has no effect
if default direct mode is on (then p_div is equal to 1 and Fout equals
to Fcco), that's why the problem remained unnoticed for a long time.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-10-11 17:12:13 -04:00
Vladimir Zapolskiy
f0aa26f006 lpc32xx: remove surplus clock cycle in PL175 WAIT_OEN config
According to ARM PrimeCell PL175 documentation WAIT_OEN config value
is defined without any additional clocks added to the value set by a
client, the change fixes the wrong interface to WAIT_OEN config.

The change also touches a single user of LPC32xx EMC and corrects
configured "output enable delay" value on its side according to the
changed interface.

No functional change intended.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-10-11 17:12:13 -04:00
Ezequiel García
d1d0167663 nand: omap_gpmc: Change correctable bit-flips messages to debug()
Messages on corrected bit-flips are not really useful,
as bit-flips are perfectly normal. Let's avoid cluttering
the console and make them debug.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2015-10-11 17:12:13 -04:00
Vagrant Cascadian
0219e4bfb4 Fix variation in timestamps caused by timezone differences.
When building with SOURCE_DATE_EPOCH set, avoid use of mktime in
default_image.c, which converts the timestamp into localtime. This
causes variation based on timezone when building u-boot.img and
u-boot-sunxi-with-spl.bin targets.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Paul Kocialkowski <contact@paulk.fr>
2015-10-11 17:12:12 -04:00
Tom Rini
1fec3c5d83 common/image.c: Make boot_get_ramdisk() perform a check for Android images
In 2dd4632 the check for where a ramdisk is found on an Android image
was got moved into the "normal" loop here, causing people to have to
pass the kernel address in the ramdisk address location in order to have
Android boot still.  This changed previous behavior so perform a check
early in the function to see if we have an Android image and if so use
that as where to look for the ramdisk (which is what the rest of the
code here expects).  We allow for this to still be overridden with an
explicit ramdisk address to be passed as normal.

Cc: Rob Herring <robh@kernel.org>
Reported-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-11 17:12:12 -04:00
Tom Rini
354973076a tools/mkimage.c: Clarify help text for -D slightly
Try and make it clear that -D will replace all arguments passed to dtc
and is not appending them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-11 17:12:11 -04:00
Ian Campbell
e392b923ed arndale: Apply Cortex-A15 errata #773022 and #774769
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
2015-10-11 17:12:11 -04:00
Rob Herring
9950098e31 image: fix support for Android boot images with no ramdisk
If an Android boot image does not contain a ramdisk, make sure rd_len
and rd_data are returned to indicate no ramdisk rather than just relying
on returning an error.

Signed-off-by: Rob Herring <robh@kernel.org>
2015-10-11 17:12:10 -04:00
Julius Werner
027b728d4a Add support for LZ4 decompression algorithm
This patch adds support for LZ4-compressed FIT image contents. This
algorithm has a slightly worse compression ration than LZO while being
nearly twice as fast to decompress. When loading images from a fast
storage medium this usually results in a boot time win.

Sandbox-tested only since I don't have a U-Boot development system set
up right now. The code was imported unchanged from coreboot where it's
proven to work, though. I'm mostly interested in getting this recognized
by mkImage for use in a downstream project.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-11 17:12:10 -04:00
Stefan Roese
b6b5e394db ppc4xx: Remove lcd4_lwmon5 support
This platform has not gone into production. So lets remove it.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-11 17:12:10 -04:00
Stefan Roese
c0c7a55428 ppc4xx: Convert lwmon5 board to generic board
Add CONFIG_SYS_GENERIC_BOARD to lwmon5.h and CONFIG_DISPLAY_BOARDINFO
to Kconfig file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-11 17:12:09 -04:00
Stefan Roese
04386f656b Revert "powerpc: ppc4xx: remove lwmon5 support"
This reverts commit 8fe11b8901.

I'll add support to lwmon5 in the next patch and will remove
support for the broken lcd4_lwmon5 as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-11 17:12:09 -04:00
Benoît Thébaudeau
1254b44a9f fs/fat/fat_write: Fix management of empty files
Overwriting an empty file not created by U-Boot did not work, and it
could even corrupt the FAT. Moreover, creating empty files or emptying
existing files allocated a cluster, which is not standard.

Fix this by always keeping empty files clusterless as specified by
Microsoft (the start cluster must be set to 0 in the directory entry in
that case), and by supporting overwriting such files.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
2015-10-11 17:12:08 -04:00
Benoît Thébaudeau
e876be4b5c fs/fat/fat_write: Factor out duplicate code
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
2015-10-11 17:12:08 -04:00
Benoît Thébaudeau
5e1a860e6c fs/fat/fat_write: Fix curclust/newclust mix-up
curclust was used instead of newclust in the debug() calls and in one
CHECK_CLUST() call, which could skip a failure case.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
2015-10-11 17:12:07 -04:00
Benoît Thébaudeau
1d7f2ece69 fs/fat/fat_write: Merge calls to set_cluster()
set_contents() had uselessly split calls to set_cluster(). Merge these
calls, which removes some cases of set_cluster() being called with a
size of zero.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
2015-10-11 17:12:07 -04:00
Benoît Thébaudeau
8133f43d1c fs/fat/fat_write: Fix buffer alignments
set_cluster() was using a temporary buffer without enforcing its
alignment for DMA and cache. Moreover, it did not check the alignment of
the passed buffer, which can come directly from applicative code or from
the user.

This could cause random data corruption, which has been observed on
i.MX25 writing to an SD card.

Fix this by only passing ARCH_DMA_MINALIGN-aligned buffers to
disk_write(), which requires the introduction of a buffer bouncing
mechanism for the misaligned buffers passed to set_cluster().

By the way, improve the handling of the corresponding return values from
disk_write():
 - print them with debug() in case of error,
 - consider that there is an error is disk_write() returns a smaller
   block count than the requested one, not only if its return value is
   negative.

After this change, set_cluster() and get_cluster() are almost
symmetrical.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
2015-10-11 17:12:07 -04:00
Igor Grinberg
689821fd76 ti: omap3: config: remove 1 from boolean define
CONFIG_TWL4030_POWER is a boolean define variable. It is either defined
or not defined and should not have a value assigned to it.
Remove the value.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2015-10-11 17:12:06 -04:00
Ryan Harkin
492f24e886 vexpress64: juno: use /dev/sda2
This patch changes the default "root=" parameter to "/dev/sda2".

Many linux based distros use /dev/sda1 for their boot partition; this is
often not a rootfs that can be used by the "root=" parameter.

Linaro images use /dev/sda1 as a boot partition, although this of a
different nature to a distro image.  Linaro uses /dev/sda2 for the rootfs
partition.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 17:12:06 -04:00
Ryan Harkin
ecbed5d6f4 vexpress64: juno: add alternate kernel and device tree filenames
The latest Juno firmware stores the files in NOR flash as "norkern" for
kernel binary, "board.dtb" for the device tree binary.

The "old" firmware used the name "Image" for the kernel binary and
"juno" for the device tree binary.

Rather than just change the default U-Boot configuration to use the new
names, breaking users with the old firmware, attempt to load the default
filename first.  If that fails, attempt to load the alternate filename.

I've echo'd that we are loading the alternate file to counter the
output from "afs load" shown if the first load attempt fails.  For
example, I see output like this on my Juno board when it's configured
the with the "old" firmware:

    image "norkern" not found in flash
    Loading Image instead of norkern
    loaded region 0 from 08500000 to 80000000, 00AB6318 bytes
    image "board.dtb" not found in flash
    Loading juno instead of board.dtb
    loaded region 0 from 0A000000 to 83000000, 00003188 bytes

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 17:12:05 -04:00
Ryan Harkin
4a6bdb59e1 vexpress64: juno: add optional initrd
Some OS images require an initrd on Juno.

If the file ramdisk.img exists in NOR flash, then we load it and pass
the address to the kernel.  Otherwise, we pass the "-" parameter as
before.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 17:12:05 -04:00
Ryan Harkin
6607d397c2 common/armflash: load_image returns success or failure
Change the load_image so that it returns success or failure of the
command (using CMD_RET_SUCCESS or CMD_RET_FAILURE).

This way, hush scripts can optionally load different files depending
upon the system configuration.

A simple example:

if afs load ${kernel_name} ${kernel_addr}; then echo loaded; else echo \
not loaded; fi

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 17:12:04 -04:00
Ryan Harkin
1a9717fb30 common/armflash: add command to check if image exists
Add a command to the ARM flash support to check if an image exists or
not.

If the image is found, it will return CMD_RET_SUCCESS, else
CMD_RET_FAILURE.  This allows hush scripts to conditionally load images.

A simple example:

if afs exists ${kernel_name}; then echo found; else echo \
not found; fi

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 17:12:04 -04:00
Ryan Harkin
74e264b49f vexpress64: juno: add androidboot.hardware=juno
Linaro's Juno Android builds requires the androidboot.hardware parameter
be set to a know board name.

Non-Android kernels ignore this extra parameter because they don't
contain code to parse it.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 17:12:04 -04:00
Ryan Harkin
fc04b92354 vexpress64: fvp dram: add DRAM configuration
Create an additional FVP configuration to boot images pre-loaded into
DRAM.

Sometimes it's preferential to boot the model by loading the files
directly into DRAM via model parameters, rather than using
SemiHosting.

An example of model parmaters that are used to pre-load the files
into DRAM:
    --data cluster0.cpu0=Image@0x80080000 \
    --data cluster0.cpu0=fvp-base-gicv2-psci.dtb@0x83000000 \
    --data cluster0.cpu0=uInitrd@0x84000000

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[trini: Update board/armltd/vexpress64/Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-11 17:11:47 -04:00
Ryan Harkin
0d3012af5a vexpress64: increase max gunzip size
vexpress64 kernels are usually over 8 MBytes in length, so setting the
max uImage length to 64 Mbytes should give us plenty of scope for
expansion.

I mostly chose this length to match other board configs that use
"(64 << 20)".

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 09:17:33 -04:00
Ryan Harkin
b483cb5a94 vexpress64: Kconfig: tidy up
The FVP and Juno settings were identical, but duplicated, so I removed
the duplication with this patch.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[trini: Adjust logic to keep if/endif in the file]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-11 09:17:03 -04:00
Ryan Harkin
c0ae9703b4 vexpress64: fix checkpatch warnings
This patch fixes a couple of checkpatch warnings on the vexpress64 config.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-11 08:52:39 -04:00
Yao Yuan
03d1d568a0 configs: ls1021atwr: Enable DSPI for LS1021ATWR
DSPI2 can be verified when boot from QSPI now.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-11 16:43:06 +05:30
Yao Yuan
f2b76c6037 mtd: sf: Add support AT26DF081A chip
AT26DF081A is the spi flash type of TWR-MEM(SCH-26248) card.
We can access the flash through DSPI2 on LS1021ATWR board.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-11 16:43:06 +05:30
Yuan Yao
a8ee68df49 dm: dts: ls1021a-twr: Enable DSPI2 on LS1021ATWR
Erratum A-008022 has been fixed on LS1021A Rev2.0.
So we can use DSPI2 now, this patch enable DSPI2
in dts for LS1021ATWR.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-11 16:43:06 +05:30
Mirza Krak
5cb1b7b395 spi: tegra20: Add support for mode selection
Respect the mode passed in set_mode ops.

Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-11 16:43:06 +05:30
Jagan Teki
a22bba81e4 spi: zynq_spi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.

This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-11 16:43:06 +05:30
Jagan Teki
d5f60737db spi: xilinx_spi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.

This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-11 16:43:06 +05:30
Siarhei Siamashka
9a4c6e9abf sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig
The pcDuino1 board unconditionally provides 5V to USB host
receptacles. The pcDuino2 board has a voltage regulator,
controlled by the PD2 pin which is pulled-up by default
(so that the USB power is also enabled by default).

Not specifying pins for enabling USB power in the defconfig
means that the PH3 and PH6 pins are driven high by default.
The PH6 pin is available on the Arduino-compatible expansion
header and touching it is not nice (this may be even dangerous,
depending on what kind of role is assigned to this particular
pin by various Arduino shields).

This patch explicitly configures the USB VBUS pins to "",
which means that no pins should be touched. The patch has
been tested on a pcDuino2 board and USB still works.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-10-10 11:54:16 +02:00
Siarhei Siamashka
974936a80f sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz
Linksprite_pcDuino_defconfig is a generic config for pcDuino1 and
pcDuino2 boards. The pcDuino2 board exists at least in two variants
(with DDR3 chips from HYNIX or NANYA). At least one pcDuino2 board
with HYNIX DDR3 fails the lima-memtester reliability test unless
the DRAM clock speed is reduced to 360MHz.

A detailed analysis report, generated by the a10-tpr3-scan tool with
the explanations why the DRAM is failing at 408MHz, is available at:
    http://linux-sunxi.org/index.php?title=User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test&oldid=15152
    http://web.archive.org/web/20151008190210/http://linux-sunxi.org/User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-10-10 11:54:06 +02:00
Tom Rini
38ab75a2aa Merge git://git.denx.de/u-boot-x86 2015-10-09 09:55:33 -04:00
Bin Meng
7445435fb3 pci: Fix expansion ROM programming for multi-function devices
PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
for multi-function devices. We should mask it off before using
it as the header type.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-08 20:09:09 +02:00
Tom Rini
e928fbf9c6 Merge git://git.denx.de/u-boot-arc 2015-10-08 03:04:36 -04:00
Tom Rini
739c5e0833 Merge git://git.denx.de/u-boot-dm 2015-10-08 03:03:41 -04:00
Alexey Brodkin
f6e27ba5b4 board: axs10x - cap max SDIO clock value to bus/2
It turned out with some boards (FPGA firmwares?) and cards combos
current clock settings doesn't work as expected leading to strange
card freezes or corrupted data being read from the card.

Especially this was seen with Transcend 2Gb cards shipped as a part of
ARC SDP:
----------------->8---------------
AXS# mmcinfo
Device: Synopsys Mobile storage
Manufacturer ID: 74
OEM: 4a60
Name: SDC
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: No
Capacity: 1.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
AXS# fatload mmc 0
** Unrecognized filesystem type **
----------------->8---------------

With this change that problem is fixed.
Note "Tran Speed" above doesn't match clock value set in DW MMC.
It is max value for card's speed class.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-10-07 18:16:13 +03:00
Simon Glass
7bb91dd109 sandbox: Correct operaion of 'reset' command
Currently 'reset' only works with the test device tree. When run without a
device tree, or with the normal device tree, the following error is
displayed:

   Reset not supported on this platform

Fix the driver and the standard device tree to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2015-10-05 15:47:49 +01:00
Simon Glass
cbfc2ff9da dm: test: Show the amount of leaked memory on error
Adjust the memory leak tests to show the amount of memory leaked. This can
be a useful signal as to what is wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-05 15:47:49 +01:00
Simon Glass
84d26e296a dm: core: Don't use pinctrl for the root device
Currently when driver model starts up it finds the root uclass and the
pinctrl uclass. This is because even the root node handles pinctrl
processing.

But this is not useful. The root node is not a real hardware device so
cannot require any particular pinmux settings. Also it means that the
memory leak tests fails, since they end up freeing more memory than
they allocate: the marker it set after the root device and pinctrl
uclass are allocated, and later once the pinctrl uclass is freed the memory
used by driver model is less than when the marker was set.

If a platform needs 'core' pin mulitplex settings it can do this with
a driver that is probed on start-up. It would be an abuse of the root node
to use this for pinctrl.

To avoid this problem, only process pinctrl settings for non-root nodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-05 15:47:49 +01:00
Sjoerd Simons
b1f492ca9e rockchip: Reconfigure the malloc based to point to system memory
When malloc_base initially gets setup in the SPL it is based on the
current (early) stack pointer, which for rockchip is pointing into SRAM.
This means simple memory allocations happen in SRAM space, which is
somewhat unfortunate. Specifically a bounce buffer for the mmc allocated
in SRAM space seems to cause the mmc engine to stall/fail causing
timeouts and a failure to load the main u-boot image.

To resolve this, reconfigure the malloc_base to start at the relocated
stack pointer after DRAM  has been setup.

For reference, things did work fine on rockchip before 596380db was
merged to fix memalign_simple due to a combination of rockchip SDRAM
starting at address 0 and the dw_mmc driver not checking errors from
bounce_buffer_start. As a result, when a bounce buffer needed to be
allocated mem_align simple would fail and return NULL. The mmc driver
ignored the error and happily continued with the bounce buffer address
being set to 0, which just happened to work fine..

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-03 10:24:33 -06:00
Masahiro Yamada
d18f37c72b serial: rockchip: make ROCKCHIP_SERIAL depend on ARCH_ROCKCHIP
It looks like this line was copy-pasted, but not modified.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-03 10:24:33 -06:00
Tom Rini
996ec1dcc5 Merge branch 'master' of git://git.denx.de/u-boot-fdt 2015-10-03 10:48:06 -04:00