Commit Graph

53440 Commits

Author SHA1 Message Date
Stefan Roese
b4a6a1bb3f mips: mt76xx: Kconfig: Add ethernet and GPIO support
Imply DM_ETH and DM_GPIO for ARCH_MT7620, as this platform now supports
ethernet and GPIO as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Stefan Roese
9a89b2b9b2 mips: mt76xx: Add watchdog DT node to mt7628a.dtsi
Add the watchdog DT node to the DTS file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Stefan Roese
60f6be1241 mips: mt76xx: Add GPIO DT nodes to mt7628a.dtsi
Add the GPIO DT nodes to the DTS file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Stefan Roese
82dbe6483c mips: mt76xx: Add ethernet DT node to mt7628a.dtsi
Add the ethernet DT node to the DTS file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Stefan Roese
a8b0bf6313 mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init
This fixes an issue which has been noticed on the Gardena board, with
the watchdog enabled, where the watdchdog reset (after a system hang)
did result in reporting of 2.9 GiB and a hang after this. With this
patch applied the memory controller is correctly reset and initialized
again even after a watchdog reset.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Stefan Roese
4751e5595e gpio: Add MT7621 GPIO support
This patch adds GPIO support for the Mediatek MT7621 SoC, tested on
MT7688 (Gardena smart-gateway). The driver is loosly based on the
Linux kernel version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned']
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Stefan Roese
053fce84c1 wdt: Add MT7621 watchdog driver
This patch adds watchdog support for the Mediatek MT7621 SoC. The driver
is loosly based on the Linux kernel version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed merge conflict in drivers/watchdog/Kconfig]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Tom Rini
0c4b382f90 Merge branch '2018-11-16-master-imports'
- Initial bcm968580xref, am65x_evm_r5 support
- lpc32xx, omap3_logic/am3517_evm updates
- pinctrl command
- fs_loader available for SPL
2018-11-17 08:19:40 -05:00
Tom Rini
ad890cace3 sunxi: Update MAINTAINERS file for recent boards
Add entries for the pine64-lts and pinebook configs.

Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16 16:52:01 -05:00
Konrad Beckmann
21ebf2adde fdt_region: Ensure that depth never goes below -1
A specially crafted FIT image makes it possible to overflow the stack
with controlled values when using the verified boot feature. Depending
on the memory layout, this could be used to overwrite configuration
variables on the heap and setting them to 0, e.g. disable signature
verification, thus bypassing it.

This change fixes a bug in fdt_find_regions where the fdt structure is
parsed. A lower value than -1 of depth can lead to a buffer underflow
write on the stack.

Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:01 -05:00
Konrad Beckmann
f1c85688ab image-sig: Ensure that hashed-nodes is null-terminated
A specially crafted FIT image leads to memory corruption in the stack
when using the verified boot feature. The function fit_config_check_sig
has a logic error that makes it possible to write past the end of the
stack allocated array node_inc. This could potentially be used to bypass
the signature check when using verified boot.

This change ensures that the number of strings is correct when counted.

Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:01 -05:00
Martyn Welch
ad5fbc6e88 Ability to modify distro boot filename
Add in the ability to modify the distro boot filename. Whilst not
immediately useful in normal usage, it allows an alternative
configuration to be provided when other u-boot functionality is used, such
as bootcount limit, to fallback to an alternative boot configuration. In
this case we can follow the same boot path as for normal boot, just
using an alternatively named configuration file.

For example, by providing the following `altbootcmd` when bootcount is in
use:

altbootcmd=setenv boot_extlinx_conf extlinux-rollback.conf; \
	run distro_bootcmd

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-11-16 16:52:01 -05:00
Keerthy
907837d659 misc: fs_loader: Fix compiler warning
Fix compiler warning

drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects
argument of type ‘int’, but argument 5 has type ‘size_t
{aka long unsigned int}’ [-Wformat=]

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:01 -05:00
Keerthy
7c096ea4ee misc: fs_loader: Use device_get_global_by_ofnode to get to node
Instead of two staged ofnode_to_offset followed by
device_get_global_by_of_offset approach, direcly use the
device_get_global_by_ofnode to fetch the device.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:00 -05:00
Keerthy
48e2f0c966 fs: Makefile: Add fs.c under SPL for fs_loader
Add fs.c under SPL as well as it is needed for fs_loader

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add as obj-$(CONFIG_FS_LOADER) for non-SPL_FRAMEWORK builds]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16 16:52:00 -05:00
Simon Goldschmidt
9ad3b049ed serial: ns16550: add setconfig support
Add possibility to update the serial parity used.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-11-16 16:52:00 -05:00
Simon Goldschmidt
0a16868757 dm: serial: fix comment on dm_serial_ops setconfig
The comment on this function prototype describes nonexistent
parameters. It seems to be copied from 'setparity'.

Update it to match its the parameter list.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:00 -05:00
Lokesh Vutla
6418000311 board: ti: am65x: Update README to add R5 build support
Update the README file to add r5 build support and system
firmware support.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16 16:52:00 -05:00
Lokesh Vutla
6e2a7780d1 configs: am65x_evm_r5: Add initial support
Add initial defconfig support for AM65x
that runs on R5.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-11-16 16:51:59 -05:00
Lokesh Vutla
00b34e9937 armv7r: dts: am654: Add initial support
Add R5 specific dts for am654-evm.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: James Doublesin <doublesin@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-16 16:51:59 -05:00
Lokesh Vutla
2d0eba3a45 arm: dts: k3: Sync dts from Linux
Sync the k3-am654 specific dts files from Linux next with tag
20181019. This changes are in queue for Linux v4.20-rc1

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16 16:51:59 -05:00
Lokesh Vutla
9dba883a45 board: ti: am654: r5: Add initial support for am654
Add initial support for AM654 based EVM running on R5.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16 16:51:59 -05:00
Lokesh Vutla
59ebf4afa6 armv7R: K3: am654: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support
for triggering DDR initialization from board_init_f().

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16 16:51:59 -05:00
Lokesh Vutla
a3501a4a44 armv7R: K3: am654: Add support to start ATF from R5 SPL
Considering the boot time requirements, Cortex-A core
should be able to start immediately after SPL on R5.
Add support for the same.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16 16:51:58 -05:00
Lokesh Vutla
890b2e750d armv7R: K3: am654: Add support for generating build targets
Update Makefiles to generate:
- tiboot3.bin: Image format that can be processed by ROM.

Below is the tiboot3.bin image format that is required by ROM:

		 _______________________
		|	 X509		|
		|     Certificate	|
		| ____________________	|
		| |		      |	|
		| | u-boot-spl.bin    |	|
		| |		      |	|
		| |___________________|	|
		|_______________________|

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16 16:51:58 -05:00
Lokesh Vutla
23f7b1a776 armv7R: K3: am654: Enable MPU regions
Enable MPU regions for AM654 evm:
- Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable
- Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc
- Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc
- region3-15: Disabled

With this dcache can be enabled either in SPL or U-Boot.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16 16:51:58 -05:00
Lokesh Vutla
06bda1259f ram: Introduce K3 AM654 DDR Sub System driver
K3 based AM654 devices has DDR memory subsystem that comprises
Synopys DDR controller, Synopsis DDR phy and wrapper logic to
intergrate these blocks into the device. This DDR subsystem
provides an interface to external SDRAM devices. Adding support
for the initialization of the external SDRAM devices by
configuring the DDRSS registers and using the buitin PHY
routines.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-16 16:51:58 -05:00
Patrick Delaunay
c235b087b3 i2c: stm32f7: change setup struct to const
Change static array to const when it is useful to save memory
(move stm32f7_setup=0x18 from .data to .rodata section)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-16 16:51:58 -05:00
Patrick Delaunay
c0765f47d8 i2c: stm32f7: cosmetic: clean the driver
Solve alignments issues in the driver to avoid
checkpatch error.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-16 16:51:58 -05:00
Adam Ford
763c9c83bb ARM: am3517_evm: Remove SPL_OF_CONTROL and OF_PLATDATA
After the recomendation, some testing shows like these are unnecessary.

Suggested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16 16:51:57 -05:00
Adam Ford
9607a04140 ARM: omap3_logic: Remove SPL_OF_CONTROL and OF_PLATDATA
After the recomendation, some testing shows like these are unnecessary.

Suggested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16 16:51:57 -05:00
Klaus Goger
ba08afe837 arm: Make arch specific memcpy thumb-safe.
The current arch implementation of memcpy cannot be called
from thumb code, because it does not use bx instructions on return.
This patch addresses that. Note, that this patch does not touch
the hot loop of memcpy, so performance is not affected.

Tested on MXS (arm926ejs) with and without thumb-mode enabled.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2018-11-16 16:51:57 -05:00
Patrice Chotard
f41a824b23 test/py: test pinmux command
Add pinmux test which test the following commands:
  - pinmux list
  - pinmux dev
  - pinmux status

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Mark some tests as sandbox-centric]
Signed-off-by: Tom Rini <trini@konsulko.com>

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-16 16:51:57 -05:00
Patrice Chotard
21e23aaff6 pinctrl: sandbox: Add get_pin_muxing ops support
Add get_pin_mux ops support to display the pin muxing
description of the sandbox_pins[]

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:57 -05:00
Patrice Chotard
cad732499b gpio: stm32f7: Add ops get_function
This patch adds gpio get_function ops support.
This function reports the state of a gpio.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-16 16:51:56 -05:00
Patrice Chotard
b42d938c24 pinctrl: stm32: Add get_pin_muxing() ops
Add get_pin_muxing() ops to obtain the pin muxing description
a given pin index.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:56 -05:00
Patrice Chotard
4ff1c20b92 pinctrl: stm32: Add get_pin_name() ops
Add get_pin_name ops to obtain a pin name given a
pin index of a specified pin-controller.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:56 -05:00
Patrice Chotard
8f651ca60b pinctrl: stm32: Add get_pins_count() ops
Add get_pins_count ops to obtain the number of pins
owns by a pin-controller.
On STM32 SoCs bindings, each pin-controller owns
several gpio banks. Each GPIO bank can own up to 16 pins.

To obtain the total pins count, walk through each sub-nodes
(ie GPIO banks) and sum each GPIO banks pins number. For that
in probe() we build a list with each GPIO device reference found.
This list will also be used with future get_pin_muxing and get_pin_name
ops to speed up and optimize walk through all GPIO banks.

As this code is common to all STM32 SoCs, this code is put
under SPL_BUILD compilation flag to avoid to increase SPL code size
for STM32F7 which is limited to 32Ko.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:56 -05:00
Patrice Chotard
d5a8313905 cmd: pinmux: Add pinmux command
pinmux command allows to :
 - list all pin-controllers available on platforms
 - select a pin-controller
 - display the muxing of all pins of the current pin-controller
   or all pin-controllers depending of given options

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
cmd: pinmux: Fix pinmux command

if "pinmux status" command is used without having
set dev using "pinmux dev", print pinmux usage
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:56 -05:00
Patrice Chotard
37b596ac5c dm: uclass: Add uclass_foreach_dev_probe
Add uclass_foreach_dev_probe() which iterates through
devices of a given uclass. Devices are probed if necessary
and are ready to use.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:55 -05:00
Patrice Chotard
f6abd5389c dm: uclass: Add uclass_next_device_err() to return a valid device
Similarly to uclass_first_device_err(), add uclass_next_device_err()
which returns an error if there are no next devices in that uclass.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:55 -05:00
Patrice Chotard
8bbb5b2085 dm: pinctrl: Add pinctrl_get_pin_name and pinctrl_get_pins_count
Add pinctrl_get_pin_name() and pinctrl_get_pins_count() methods
to obtain pin's name and pin's muxing given a pin reference.

This will be used by the new pinmux command.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:55 -05:00
Patrice Chotard
f55a0c0a20 dm: pinctrl: Add get_pin_muxing() ops
Add get_pin_muxing() which allows to display the muxing
of a given pin belonging to a pin-controller.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:51:55 -05:00
Martin Fuzzey
f9c87adc47 w1-eeprom: Add support for Maxim DS2502 add only memory
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-11-16 16:51:55 -05:00
Adam Ford
8cd3f51b44 ARM: omap3_logic: Make CONFIG_SYS_TEXT_BASE match README.omap3
README.omap3 has two options.  For option 1, CONFIG_SYS_TEXT_BASE
is set to 0x80100000.  Option 2 lists 0x80008000.  The existing
value is neither of these, so this patch makes it equivalent to
Option 1.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16 13:34:38 -05:00
Adam Ford
52ccb2e6d3 ARM: am3517_evm: Build for Thumb
In an effort to free up more resources in SPL and U-Boot, building
for Thumb shrinks the code side.

Before:

  text	   data	    bss	    dec	    hex	filename
  685588  25808	 275724	 987120	  f0ff0	u-boot

  text	   data	    bss	    dec	    hex	filename
  55324	    417	  67460	 123201	  1e141	spl/u-boot-spl

After:

   text	   data	    bss	    dec	    hex	filename
 515502	  25808	 275708	 817018	  c777a	u-boot

   text	   data	    bss	    dec	    hex	filename
  42910	    417	  67460	 110787	  1b0c3	spl/u-boot-spl

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16 13:34:37 -05:00
Adam Ford
9a2cff744b configs: am3517_evm: Use default OMAP3 memory settings
The AM3517 is mostly am omap3, so this partch removes the custom
memory configurations and just uses the default common entries
for omap3 and armv7.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16 13:34:37 -05:00
Adam Ford
c3b89468fc ARM: DTS: Resync am3517-evm.dts with Linux 4.19
Some minor changes have been made to the AM3517-evm and the underlying
am3517.dtsi files.  This patch re-sync's the DTS and DTSI files with
Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16 13:34:37 -05:00
Vladimir Zapolskiy
44cdfc0ece mtd: nand: lpc32xx slc: disable DMA support in SPL builds
Testing and analysis shows that at the moment LPC32xx NAND SLC driver
can not get PL080 DMA backbone support in SPL build, because SPL NAND
loaders operate with subpage (ECC step to be precisely) reads, and
this is not supported in the NAND SLC + DMA + hardware ECC calculation
bundle.

The change removes a cautious build time warning and explicitly
disables DMA flavour of the driver for SPL builds, to reduce the
amound of #ifdef sections the code blocks are minimally reorganized.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-11-16 13:34:37 -05:00
Vladimir Zapolskiy
a098ce2142 mtd: nand: lpc32xx mlc: predefine number of NAND chips to support
Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC
driver only, as a preparation for potential removal or replacement of
the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same
value is used by the single user Work Microwave Work 92105 board, thus
it will be safe now to remove the option as a board specific one.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-11-16 13:34:36 -05:00