Add utility functions to compress and decompress using lz4 and lzma
algorithms. In the latter case these use the legacy lzma support favoured
by coreboot's CBFS.
No tests are provided as these functions will be tested by the CBFS
tests in a separate patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present text entries use an indirect method to specify the text to use,
with a label pointing to the text itself.
Allow the text to be directly written into the node. This is more
convenient in cases where the text is constant.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function always sets both the offset and the size of
entries. But in some cases we want to set only one or the other, for
example with the forthcoming ifwi entry, where we only set the offset.
Update the function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present having a descriptor means that there is an ME (Intel
Management Engine) entry as well. The descriptor provides the ME location
and assumes that it is present.
For some SoCs this is not true. Before providing the location of a
potentially non-existent entry, check if it is present.
Update the comment in the ME entry also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman requires that the Intel descriptor has an explicit
offset. Generally this is 0 since the descriptor is at the start of the
image. Add a default to handle this, so users don't need to specify the
offset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Code coverage tests fail on binman due to dist-packages being dropped from
the python path on Ubuntu 16.04. Add them in so that we can find the
elffile module, which is required by binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which decodes an ELF file, working out where in memory each
part of the data should be written.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to create an ELF file for testing purposes, with just the
right attributes used by the test. Add a function to handle this, along
with a test that it works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
If tests are skipped we should ideally exit with an error, since there may
be a missing dependency. However at present this is not desirable since it
breaks travis tests. For now, just report the skips.
Signed-off-by: Simon Glass <sjg@chromium.org>
FD is a bit confusing so write this out in full. Also avoid splitting the
string so that people can grep for the error message more easily.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes tools used by binman may not be in the normal PATH search path,
such as when the tool is built by the U-Boot build itself (e.g. mkimage).
Provide a way to specify an additional search path for tools. The flag
can be used multiple times.
Update the help to describe this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
If kwargs contains raise_on_error then this function generates an error
due to a duplicate argument. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some Intel SoCs from about 2016 boot using an internal microcontroller via
an 'IFWI' image. This is a special format which can hold firmware images.
In U-Boot's case it holds u-boot-tpl.bin.
Add this tool, taken from coreboot, so that we can build bootable images
on apollolake SoCs.
This tool itself has no tests. Some amount of coverage will be provided by
the binman tests that use it, so enable building the tool on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for v2019.10-rc1 (2)
* Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
* Address errors of type -Werror=address-of-packed-member when building
with GCC9.1
* Fix an error when adding memory add addres 0x00000000.
* Rework some code comments for Sphinx compliance.
The generic code in common/spl/spl.c allows TPL/SPL banners to be
silenced by unsetting CONFIG_TPL_BANNER_PRINT or CONFIG_SPL_BANNER_PRINT
respectively. However, arch/arm/mach-rockchip/tpl.c prints this banner
unconditionally.
Fix the rockchip-specific tpl.c so that the TPL banner depends on
CONFIG_TPL_BANNER_PRINT in the same way as the generic code.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
If CONFIG_DEBUG_UART is set but CONFIG_TPL_SERIAL_SUPPORT is not, the
serial output should be available in SPL and full U-Boot, but not built
in TPL. However, the rockchip tpl.c instead fails to compile with
undefined references to the debug UART.
Instead, initialise the debug UART and print the TPL banner only if both
CONFIG_DEBUG_UART and CONFIG_TPL_SERIAL_SUPPORT are set.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.
These flashes are tested on LX2160ARDB and LS1028ARDB respectively
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch introduces support of Cortex-M4 remote processor for STM32
MCU and MPU families.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
The current implementation supports only binary file load.
Add helpers to support ELF32 format (sanity check, and load).
Note that since an ELF32 image is built for the remote processor, the
load function uses the device_to_virt ops to translate the addresses.
Implement a basic translation for sandbox_testproc.
Add related tests. Test result:
=> ut dm remoteproc_elf
Test: dm_test_remoteproc_elf: remoteproc.c
Test: dm_test_remoteproc_elf: remoteproc.c (flat tree)
Failures: 0
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add the following functions to translate DMA address to CPU address:
- dev_translate_dma_address()
- ofnode_translate_dma_address()
- of_translate_dma_address()
- fdt_translate_dma_address()
These functions work the same way as xxx_translate_address(), with the
difference that the translation relies on the "dma-ranges" property
instead of the "ranges" property.
Add related test. Test report:
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
Failures: 0
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
- rk3399 lpddr4 support
- rk3399-rock960 board support improvement
- Eliminate pyelftools dependency by make_fit_atf.py
- clean up rockchip dts to use -u-boot.dtsi
- use ARM arch/generic timer instead of rk_timer
- clean up Kconfig options for board support
Pin configuration of the FPGA devicetree block should be done
after core configuration in the arria10 fpga driver. This fix
corrects the check of status, and ensures that the fpga pin mux
is configured on correct configuration of the core fpga image.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
This adds separate kconfig options for drivers/sysreset and
drivers/firmware.
Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL
build but also added drivers/firmware and drivers/sysreset at the same
time.
Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for
drivers/sysreset and adds CONFIG_SPL_FIRMWARE for
drivers/firmware (and accordingly for the TPL options).
CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into
the SPL build (and accordingly for TPL) since there are boards using
non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't
have CONFIG_SPL_MISC enabled, so cannot use this to include
drivers/misc into the SPL build.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This moves sysreset support for socfgpa from ad-hoc code in mach-socfpga
to a UCLASS_SYSRESET based dm driver.
A side effect is that gen5 and a10 can now select between cold and warm
reset.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This adds a define for the bit in rstmgr's ctrl regiser that issues
a cold reset (we had a define for the warm reset bit only) in preparation
for a proper sysrese driver.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series changes: 2
- separate this patch to the register descriptions from the actual
sysreset driver patch
This driver uses bss from SPL board_init_f(). Change it to move all the
data from bss to a common struct allocated on the stack (64 byte).
In addition to saving 28 bytes of bss, the code even gets 264 bytes
smaller.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This fixes 3 boards that don't use CONFIG_EXTRA_ENV_SETTINGS from
socfpga_common.h. They need to enable reset manager compatibility
mode unless all peripheral drivers in Linux support reset handling.
Fixes: commit 4b2e32efa4 ("arm: socfpga: gen5: deassert peripheral reset by default")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reported-by: Wolfgang Grandegger <wg@aries-embedded.de>
