Commit Graph

22887 Commits

Author SHA1 Message Date
Chris Packham
8fd3cf2940 arm64: mvebu: handle non-zero base address for RAM
board_get_usable_ram_top() conflated the RAM size with the top address
of RAM. On systems where RAM starts at address 0 these numbers are the
same so it went unnoticed. Update board_get_usable_ram_top() to take
CONFIG_SYS_SDRAM_BASE into account when determining the top address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 07:46:10 +02:00
Samuel Holland
a35628ec33 sunxi: Move INITIAL_USB_SCAN_DELAY to driver Kconfig
This option is used only by the phy-sun4i-usb driver, which does not
inherently depend on the ARM architecture.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 23:48:09 +01:00
Michal Suchanek
e038c7a201 sunxi: lcd: Move range from kconfig description to definition.
KConfig has range option, use it instead of notice in the option
descrition.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:26 +01:00
Tom Rini
54f683dbfb Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-07-14 11:10:49 -04:00
Weijie Gao
0eaee027f7 mips: mtmips: add two reference boards for mt7621
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.

The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
4bc0104c97 mips: mtmips: add support for MediaTek MT7621 SoC
This patch adds support for MediaTek MT7621 SoC.
All files are dedicated for u-boot.

The default build target is u-boot-mt7621.bin.

The specification of this chip:
https://www.mediatek.com/products/homenetworking/mt7621

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
2948d9cf86 mips: add support for noncached_alloc()
This patch adds support for noncached_alloc() which was only supported by
ARM platform.

Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG
is provided to access uncached memory. So most code of this patch is copied
from cache.c of ARM platform, with only two differences:
1. MMU is untouched in noncached_set_region()
2. Address returned by noncached_alloc() is converted using KSEG1ADDR()

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
9a3bbb0eba mips: add __image_copy_len for SPL linker script
This patch adds __image_copy_len needed by TPL of MT7621 SoC.
The __image_copy_len represents the binary blob size of both SPL/TPL
binaries. To achieve this, __text_start/end are added for calculation.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
3a6cf2ded7 mips: add more definitions for asm/cm.h
This patch add more definitions needed for MT7621 initialization.
MT7621 needs to initialize GIC/CPC and other related parts.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
1cca8ba9ec mips: add asm/mipsmtregs.h for MIPS multi-threading
To be compatible with old u-boot used by lots of MT7621 devices, the u-boot
needs to boot-up MT7621's all cores, and all VPES of each core.

This patch adds asm/mipsmtregs.h from linux kernel which is need for
boot-up VPEs.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Tom Rini
357fa8bb4d - Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
 - Introduce of_to_plat ops in stm32_sdmmc2 driver
 - Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
 - Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE56Yx6b9SnloYCWtD4rK92eCqk3UFAmLNj88ACgkQ4rK92eCq
 k3Wukwf+PZnmQuyzwwFDOpZO1lUPfUN0WkoEBV8M5IxLehHdfHJT3YsAtm6DS8dd
 4+n0+WmR7Uk4B8ODRPrGNBJftFoOVfEAvWmpfCC/VcHgEDEzdJzJe6yxa9wAWeQR
 djRZLM8qx6OIEUW+sfYbFkD2BCv+cLiT0YH9qqx8WCRlf6JTuLquSBJQXIJAqYiE
 LdO/pp0rv4oC0s08BSL4bHL/Mh7FHeUPiEjn2uRP/vISgmH1qyCql3gbr/wCaTYR
 jfqr9pjmWTxEOppZIdE832QMy1MTSA/6Q3Jr4LKRko6ArBGjbGlj3EbeeEdKPDRy
 BtQ6OLnxWKdcPr2qp301nnERRi4L4w==
 =WgbW
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20220712' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
- Introduce of_to_plat ops in stm32_sdmmc2 driver
- Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
- Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
2022-07-13 08:09:20 -04:00
Michal Simek
f36479e302 ti: keystone: Don't select GPIO_EXTRA_HEADER
keystone doesn't have custom gpio.h that's why don't select
GPIO_EXTRA_HEADER which points to it.

Logic in arch/arm/include/asm/gpio.h is very clear

 #ifdef CONFIG_GPIO_EXTRA_HEADER
 #include <asm/arch/gpio.h>
 #endif
 #include <asm-generic/gpio.h>

Where it is visible that there is no gpio.h in platform headers:
$ ls arch/arm/mach-keystone/include/mach/
clock_defs.h  clock-k2e.h  clock-k2hk.h  ddr3.h      hardware-k2e.h
hardware-k2hk.h  i2c_defs.h      mon.h   mux-k2g.h   xhci-keystone.h
clock.h       clock-k2g.h  clock-k2l.h   hardware.h  hardware-k2g.h
hardware-k2l.h   mmc_host_def.h  msmc.h  psc_defs.h

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-12 21:59:54 +02:00
Johann Neuhauser
48d9eaf682 arm: dts: stm32mp1: Drop fastboot and stm32prog trigger gpios on DHCOM
PA13 and PA14 are used for USB power control and can't be used
to enforce fastboot or stm32prog mode by pressing a button.

Defining CONFIG_FASTBOOT/CONFIG_CMD_STM32PROG without this patch applied
results in fastboot/stm32prog always starting, because PA13/PA14 are always
low during boot. So drop the wrong trigger gpios definitions.

Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
6d647676ea ARM: dts: stm32mp13: activate led on STM32MP13F-DK
Activate the led managed in stm32mp1 board for U-Boot indication
in STM32MP13F-DK device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
12d5a0626c ARM: dts: stm32mp13: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1 with:
- ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
- ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
- ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
- ARM: dts: stm32: enable RTC support on stm32mp135f-dk
- ARM: dts: stm32: add RTC node on stm32mp131
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:09 +02:00
Patrick Delaunay
50b371fd68 stm32mp: add support of STM32MP13x Rev.Y
Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1003.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:47:34 +02:00
Patrick Delaunay
6cccc8d396 ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
Add a "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1.

Only boards provided by STMicroelectronics are concerned:
-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1

The resources secured by RCC_TZCR.TZEN=1 are managed by OP-TEE
and the associated SCMI services, reset and clock.

These device trees are only supported with stm32mp15_defconfig,
with OP-TEE, SCMI and without SPL support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:32 +02:00
Patrick Delaunay
69ef98b209 ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1

- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
  on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15

+ patch from stm32-dt-for-v5.19-fixes-2

- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Patrick Delaunay
44db098ae1 ARM: dts: stm32mp13: add SCMI nodes
Add the node for SCMI firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:30 +02:00
Patrick Delaunay
0b69ce6a81 ARM: dts: stm32mp13: add OP-TEE nodes
Add the node for OP-TEE firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:18 +02:00
Tom Rini
36b661dc91 Merge branch 'next' 2022-07-11 14:58:57 -04:00
Tom Rini
cb42c1f9b1 i2c: Remove non-DM_I2C support from davinci_i2c.c
As the migration deadline has passed, and all platforms have been
migrated, remove the non-DM code here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
edcbd6e388 omap3: emif4: More clearly hard-code cs0 size
We have a single platform that is both in the OMAP3 family of parts, but
has an EMIF4 memory controller.  Currently we hard-code the size of
chip select 0.  Make this more clear by putting the value in the
function rather than a CONFIG option.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
95cc3efcc1 arm: Remove strongarm support
There are no platforms using this architecture anymore, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:33 -04:00
Tom Rini
38d091ac1d Convert CONFIG_SYS_CACHE_STASHING to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_CACHE_STASHING

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:33 -04:00
Tom Rini
9ff4ce8abc nman external-symbol improvements
Driver model memory-usage reporting
 patman test-reporting improvements
 Add bloblist design goals
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAmK7BHwRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIrealpwgAlCLCdEiSncV0t+Q9zvdtAQStvZdjD6CW
 VhpCS38pWUA0ckKYq/gmmlE2nW6i7pb4RdiOkpOhKdwFQI7SwbF2GdcU2yv08PMm
 qWHTRDaTm0SiGXUU462+A1Bj/aXPH86uEE9bCYu1FYtRrEtNf6aAeWF3pqNJv4fy
 CFB9OYyAfMEdywCtW2dCjS4y1FiI95Y2Jvg7lPGLVayHDyuavLSMKC8QEsVS4mR0
 91nNLhs6agko/H2i0QXle1lLjkvTIH3VR6dn/CMVjD+goJdDCk7rltHRXHejGun4
 n+a1W3EVv2sSQLwQJ0Kw5e2eBKdlM6Lpzhc0b0iJ2jKzBZeLXS+qBg==
 =2LZO
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-28jun22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
2022-07-08 14:39:07 -04:00
Tom Rini
bb20a105e9 Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOT_RAMDISK_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
f6c1f91761 Convert CONFIG_SYS_FSL_CPC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CPC
   CONFIG_SYS_CPC_REINIT_F

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
5a4461867c Convert CONFIG_SYS_RAMBOOT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_RAMBOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:08 -04:00
Tom Rini
3dab405b45 Convert CONFIG_SYS_BOOK3E_HV to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOK3E_HV

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:56 -04:00
Tom Rini
a457ebd786 arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-07 09:29:08 -04:00
Tom Rini
fcf4fa71ab Convert CONFIG_SYS_83XX_DDR_USES_CS0 to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_83XX_DDR_USES_CS0

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
d9d4978143 thunerx_88xx: Clean up config slightly.
We don't use CONFIG_SYS_64BIT anywhere and can use
CONFIG_TARGET_THUNDERX_88XX to build the device trees.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
2bb9d7c65a Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
   CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
   CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
f1c6dfa426 layerscape: Remove some unused CONFIG symbols
All of these symbols are not referenced anywhere else in the code, so
remove them.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
cd6a45a41f Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
    CONFIG_SYS_OHCI_SWAP_REG_ACCESS
    CONFIG_SYS_USB_OHCI_CPU_INIT
    CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
    CONFIG_SYS_USB_OHCI_SLOT_NAME
    CONFIG_USB_ATMEL
    CONFIG_USB_ATMEL_CLK_SEL_PLLB
    CONFIG_USB_ATMEL_CLK_SEL_UPLL
    CONFIG_USB_OHCI_LPC32XX
    CONFIG_USB_OHCI_NEW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
b340199f82 spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a SPL
specific option has at least a direct dependency on SPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.  This means in a very small number of places we can
drop redundant dependencies.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Joel Stanley
3045d61c1c aspeed/spl: Remove OVERLAY from linker script
The generic arm linker script contains this section:

   .bss __rel_dyn_start (OVERLAY) : {
       ...
   }

The (OVERLAY) syntax in the description causes the .bss section to be
included in the NOR area of the image:

 $ objdump -t -j .bss spl/u-boot-spl
  SYMBOL TABLE:
  0000c61c l    d  .bss	00000000 .bss
  0000c640 l     O .bss	00000040 __value.0
  0000c68c g     O .bss	00000000 __bss_end
  0000c61c g     O .bss	00000000 __bss_start
  0000c680 g     O .bss	0000000c stdio_devices

This is what the custom linker script tries to avoid, as the NOR area is
read-only.

Remove the OVERLAY syntax to fix the BSS location:

 $ objdump -t -j .bss spl/u-boot-spl
  SYMBOL TABLE:
  83000000 l    d  .bss	00000000 .bss
  83000000 l     O .bss	00000040 __value.0
  0000c61c g     O .bss	00000000 __image_copy_end
  8300004c g     O .bss	00000000 __bss_end
  83000000 g     O .bss	00000000 __bss_start
  83000040 g     O .bss	0000000c stdio_devices

This restores the state of the linker script before the patch that fixed
the linker lists issue.

Fixes: f6810b749f ("aspeed/ast2600: Fix SPL linker script")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
0b2a749bc6 ARM: dts: ast2500: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
dedf8e3186 ARM: dts: ast2600: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
b45768ebfe ARM: dts: ast2600-evb: Add I2C devices
The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7,
and a LM75 temp sensor on bus 8.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Joel Stanley
5ff466fade ARM: dts: ast2500-evb: Add I2C devices
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
3ad1d85d3c ARM: dts: ast2600-evb: Remove redundant pinctrl
Now that these are in the dtsi we don't need them in the EVB device
tree.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Joel Stanley
fc28e02404 ARM: dts: ast2600: Disable I2C nodes by default
Allow boards to enable the buses they use.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
a87273bc40 ARM: dts: ast2600: Add I2C reset properties
The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Eddie James
8c3019216e ARM: dts: ast2600: Add I2C pinctrl
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Georgi Vlaev
362b0d2e6e arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl
Mark the memory node with u-boot,dm-spl so we can use it
from early SPL on both R5 and A53.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
a04bbb83b4 arm: mach-k3: common: Use ddr_init in spl_enable_dcache
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Vaishnav Achath
c16b4f14a3 arm: k3: j721e: add dynamic sf bus override support for j721e
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2022-07-06 14:30:08 -04:00
Tom Rini
432243cee1 Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KIRKWOOD_EGIGA_INIT
   CONFIG_KIRKWOOD_PCIE_INIT
   CONFIG_KIRKWOOD_RGMII_PAD_1V8
   CONFIG_KM_DISABLE_PCIE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00