QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix
driver does sanity check to see whether legacy ports decode is turned on.
To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
By default the legacy segments C/D/E/F do not decode to system RAM.
Turn on the decode via Programmable Attribute Map (PAM) registers
so that we can write configuration tables in the F segment.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The default weak version of pci_skip_dev() in drivers/pci/pci_common.c
skips the host bridge (b.d.f = 0.0.0) which is actually the i440fx/q35
chipset for QEMU targets. Define CONFIG_PCI_CONFIG_HOST_BRIDGE to make
it visible in the PCI configuration space.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
High mem starts at 4 GiB.
Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
If pirq_routing_table points to NULL, that means U-Boot fails to
generate the table before in create_pirq_routing_table(), so we
test it against NULL before actually writing it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Describe all required properties needed by the irq router device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
by cmd_ide.c which is not common for modern x86 targets, hence remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Eliminate the following build warning in atapi_inquiry():
"warning: assignment from incompatible pointer type [enabled by default]"
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
needs to be configured.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Remove the '#undef DEBUG' in pci_auto.c so that we can enable debug
message output via '-DDEBUG'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
It turns out that QEMU x86 emulated graphic card has a built-in
option ROM which can be run perfectly with native mode by U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
CONFIG_FRAMEBUFFER_SET_VESA_MODE and CONFIG_FRAMEBUFFER_VESA_MODE
are not x86-specific, so move them to drivers/video/Kconfig and
make them depend on VIDEO_VESA driver. Some cosmetic fixes are
applied to the Kconfig help text as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
There is no reason to prevent CONFIG_VIDEO_VESA driver working on
non-x86 boards, so remove such limitation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
gd is not referenced in those board files so DECLARE_GLOBAL_DATA_PTR
should be removed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
QEMU is much easier for us test booting U-Boot as a coreboot payload
than having a real board like chromebook_link.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
DRAM size printed when booting from coreboot, like this:
CPU: x86, vendor Intel, device 663h
DRAM: 636 KiB
Using default environment
Change it to 8 which should be enough for both coreboot and bare
cases, and move it to x86-common.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Now that we have QEMU support, make it the default vendor in the
'make menuconfig' screen.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This commit introduces the initial U-Boot support for QEMU x86 targets.
U-Boot can boot from coreboot as a payload, or directly without coreboot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Merged in patch 'x86: qemu: Add CMD_NET to qemu-x86_defconfig
https://patchwork.ozlabs.org/patch/479745/
pci_hose_phys_to_bus() is needed by several drivers. Move it to
pci_common.c to avoid a broken build when CONFIG_DM_PCI is on.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
netconsole had become defective over time and cleanups.
Because the feature is used very rarely nobody did take notice about this
defect.
With this patch the resulting syntax error on call will be fixed.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
CONFIG_NET_MULTI is not used anywhere and thus can safely be removed
from the configs.
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
The config for pcm051 still undef'd CONFIG_USE_IRQ. This is not
needed any more since it is not defined in the whole include path
before.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
NET_RANDOM_ETHADDR depends on lib/rand.c. This patch adds dependency to
Kconfig to ensure that library is also compiled.
Remove the definitions from Blackfin boards' include/configs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This also selects CONFIG_NET for any CONFIG_CMD_NET board.
Remove the imx default for CONFIG_NET.
This moves the config that was defined by 60296a8 (commands: add more
command entries in Kconfig).
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Another shell scripting command that has not been moved.
Moved using tools/moveconfig.py using these settings:
CMD_SETEXPR bool n y
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 76ec988b06 (net: Remove all calls to net_random_ethaddr())
accidentally deleted CONFIG_TARGET_BCT_BRETTL2=y, and since then
bct-brettl2 would not build.
Since commit a26cd04920 (arch: Make board selection choices
optional), Kconfig actually allows such a .config file in which no
board is selected, but the build never succeeds.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Commit 92ac520821 (net: Remove all references to CONFIG_ETHADDR
and friends) accidentally dropped #endif. Since then, gr_ep2s60
could not build.
scripts/kconfig/conf --silentoldconfig Kconfig
CHK include/config.h
GEN include/autoconf.mk
In file included from include/config.h:5:0,
from ./include/common.h:18:
include/configs/gr_ep2s60.h:15:0: error: unterminated #ifndef
#ifndef __CONFIG_H__
^
make[1]: *** [include/autoconf.mk] Error 1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
this removes a config entry and uses the default value
defined in config_fallbacks.h. This implements the same
behaviour as a patch series for other i.MX6 boards from
Freescale
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
If the EEPROM could not be read or is corrupt we always want to hang.
Note that an error message will have been displayed by read_eeprom in this
case.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The fdt_file1 and fdt_file2 vars provide fallbacks for the fdt file loading
script. There is no need to allow the user to override these as if they
want to specify the fdt, they should do so in the first attempt which is
the fdt_file var.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
We want to model env var to always reflect what was in the EEPROM. There
is no point in allowing a user to override this.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
- Added iomux for CAN_STBY and RS484_TEN (GW52xx/GW53xx/GW54xx/GW551x)
- Moved iomux of USBHUB_RST# out of board_ehci_hcd_init so that it is
done regardless of USB being initialized in bootloader
- Added usb_sel iomux/hwconfig for GW552x
- Fixed mezzanine DIO for GW54xx
- Fixed PANLEDR# for GW54xx
- Fixed dio iomux/hwconfig for GW552x
- Fixed dio iomux for GW551x
- removed redundant #define
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
In case the DC-DC is already enabled mxs_enable_4p2_dcdc_input() returns
without reenabling brown out detection. So fix this issue by
moving the return before brown out deactivation.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This updates r8a7790 QoS to revision 0.973.
This commit can changed from KConfig to fit contents of the QoS.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Ethernet function of Alt board can select normal and B by DIP switch
on board. But user need to set not only DIP switch but also pin function.
This adds pin function of Ethernet function B. This can select from Kconfig.
Signed-off-by: Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The chip select 1 of the NAND controller is available if you want to
use, although the pins are shared with UART port 2.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
