Commit Graph

7868 Commits

Author SHA1 Message Date
Tom Rini
dd2986ac11 powerpc: Fix incorrect SYS_IMMR migration values
When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here.  This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT.  Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.

Fixes: be7dbb60c5 ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>
2022-03-31 08:27:52 -04:00
Tim Harvey
cad5da551d imx: ventana: enable ONFI detection to fix NAND chip configuration
Enable ONFI detection to fix NAND chip configuration. Without this
the NAND oobsize will be wrong which leads to invalid ECC strength and
incompatibility with the previous configuration.

Fixes: 777f333c37 ("imx: ventana: enable dm for MTD and NAND")

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-03-28 14:25:43 -04:00
Tom Rini
8d2b7aefe1 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-28 14:01:11 +00:00
Leonidas-Panagiotis Papadakos
5f4cc27473 rockchip: rk3328: enable USB mass storage on Renegade
This is very useful to access the LibreComputer eMMC as removable
storage from a PC (e.g. like so `ums 0 mmc 0`). It has been tested as
working on my Renegade board.

Signed-off-by: Leonidas P. Papadakos <papadakospan at gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-18 18:12:03 +08:00
Marty E. Plummer
6d36e92d28 rockchip: rk3399: Add support for chromebook_kevin
Add support for Kevin, an RK3399-based convertible chromebook that is
very similar to Bob. This patch is mostly based on existing support for
Bob, with only minor changes for Kevin-specific things.

Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV,
so adjust it here in the dts as well. The rk3399-gru-kevin devicetree
has an unknown event code reference which has to be defined, set it
to the Linux counterpart. The new defconfig is copied from Bob with the
diffconfig:

     DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin"
     DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb"
     VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400
     VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600
    +TARGET_CHROMEBOOK_KEVIN y

With this Kevin can boot from SPI flash to a usable U-Boot prompt on the
display with the keyboard working, but cannot boot into Linux for
unknown reasons.

eMMC starts in a working state but fails to re-init, microSD card works
but at a lower-than-expected speed, USB works but causes a hang on
de-init. There are known workarounds to solve eMMC and USB issues.

Cc: Marty E. Plummer <hanetzer@startmail.com>
Cc: Simon Glass <sjg@chromium.org>
[Alper: commit message, resync config with Bob, update MAINTAINERS,
        add to Rockchip doc, add Kconfig help message, set regulator]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-03-18 18:12:03 +08:00
Alper Nebi Yasak
e4015661c3 rockchip: bob: Enable more configs
This patch enables some configs that should be working on the Bob board,
based on what is observed to work on the Kevin board.

The Bob board uses an Embedded DisplayPort panel compatible with the
simple panel and Rockchip eDP drivers. Its backlight is controlled by
the Chromium OS Embedded Controller Pulse Width Modulator. Enable these
for the board.

Also set VIDEO_ROCKCHIP_MAX_{XRES,YRES} to 1280x800, the resolution of
its panel. This had to be done for the Kevin board, but it's untested if
this is actually necessary for Bob.

The Rockchip video driver needs to assert/deassert some resets, so also
enable the reset controller. RESET_ROCKCHIP defaults to y for this board
when DM_RESET=y, so it's enough to set that.

The Bob board has two USB 3.0 Type-C ports and one USB 2.0 Type-A port
on its right side. Enable the configs relevant to USB devices so these
can be used. This is despite a known issue with RK3399 boards where USB
de-init causes a hang, as there is a known workaround.

Some other rk3399-based devices enable support for the SoC's random
number generator in commit a475bef534 ("configs: rk3399: enable rng on
firefly/rock960/rockpro64"), as it can provide a KASLR seed when booting
using UEFI. Enable it for Bob as well.

The default misc_init_r() for Rockchip boards sets cpuid and ethernet
MAC address based on e-fuse block. A previous patch extends this on Gru
boards to set registers related to SoC IO domains as is necessary on
these boards. Enable this function and configs for it on Bob.

The microSD card slot on this board (and others based on Gru) is
connected to a GPIO controlled regulator (ppvar-sd-card-io), which must
be operable by U-Boot. Enable the relevant config option to allow this.

Bob boards also use the Winbond W25Q64DW SPI flash chip, enable support
for Winbond SPI flash chips in the board config so U-Boot can boot with
this chip.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-03-18 18:12:03 +08:00
Tom Rini
91e9f20768 Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- Config tweaks to enable the right I2C driver
2022-03-16 08:11:14 -04:00
Tom Rini
ababaa4a27 mtd: add NAND write protect support to stm32_fmc2_nand
stm32mp1 bsec: Add permanent lock write support
 stm32mp1 bsec: Add dev in function description
 cmd_stboard: Update test on misc_read() result
 video: fix the check of return value of clk_set_rate in stm32_ltdc
 DT: Alignment with kernel v5.17 for stm32mp15
 DT: Add USB OTG pinctrl and regulator in SPL for DHCOR
 DT: Move vdd_io extras into Avenger96 extras
 DT: Add DFU support for DHCOM recovery
 ram: stm32mp1: Unconditionally enable ASR
 psci: Implement PSCI system suspend and DRAM SSR for stm32mp
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Merge tag 'u-boot-stm32-20220315' of https://source.denx.de/u-boot/custodians/u-boot-stm

mtd: add NAND write protect support to stm32_fmc2_nand
stm32mp1 bsec: Add permanent lock write support
stm32mp1 bsec: Add dev in function description
cmd_stboard: Update test on misc_read() result
video: fix the check of return value of clk_set_rate in stm32_ltdc
DT: Alignment with kernel v5.17 for stm32mp15
DT: Add USB OTG pinctrl and regulator in SPL for DHCOR
DT: Move vdd_io extras into Avenger96 extras
DT: Add DFU support for DHCOM recovery
ram: stm32mp1: Unconditionally enable ASR
psci: Implement PSCI system suspend and DRAM SSR for stm32mp
2022-03-15 08:42:36 -04:00
Marek Vasut
19fbe102b2 ARM: dts: stm32: Add DFU support for DHCOM recovery
This patch configures U-Boot SPL for DHCOM SoM to permit DFU upload of
SPL and subsequent u-boot.itb for recovery or commissioning purposes.

The DFU usage procedure is identical to STM32MP1 DHCOR SoM, see commit
3919aa1722 ("ARM: dts: stm32: Add DFU support for DHCOR recovery") ,
except for switching the SoM into DFU mode. By default, the DHCOM SoM
has no dedicated mechanism for setting BOOTn straps into UART/USB mode,
therefore to enter DFU mode, the SoC must fail to boot from boot media
which can be selected by the BOOTn strap override mechanism first and
then fall back to DFU mode.

In case of a SoM with pre-populated BOOTn strap override button, power
the system off, remove microSD card (if applicable), hold down the BOOTn
strap override button located between eMMC and SoM edge connector, power
on the SoM. The SoC will fail to boot from SD card and fall back into
DFU mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-03-15 09:20:32 +01:00
Tom Rini
f43e892f51 - fix display of the u-boot logo on Apple devices
- convert Nokia RX-51 to CONFIG_DM_VIDEO
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Merge tag 'video-20220314' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix display of the u-boot logo on Apple devices
 - convert Nokia RX-51 to CONFIG_DM_VIDEO
2022-03-14 18:39:26 -04:00
Soeren Moch
3ec38c907c board: tbs2910: Enable Link Time Optimizations in defconfig
This saves about 12 kBytes image size and helps to stay within the
size limit.

Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Soeren Moch <smoch@web.de>
2022-03-14 12:44:51 -04:00
Andre Przywara
a95f05a6ed vexpress64: fvp: Fix automatic boot
Commit 90f262a695 ("vexpress64: Clean up BASE_FVP boot configuration")
cleaned up the usage of default address variables, but missed to update
the address for the kernel in the FVP's bootcmd definition.

Change ${kernel_addr} to read ${kernel_addr_r} to bring back the
automated boot for the fastmodel.
Also use "setenv" instead of the potentially ambiguous "set" on the way.

Fixes: 90f262a695 ("vexpress64: Clean up BASE_FVP boot configuration")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-14 12:44:51 -04:00
Nam Nguyen
23fd0bb987 configs: condor: Enabled I2C support for R-Car V3H
Enable I2C support for R-Car V3H (R8A77980) on Condor board.

Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2022-03-14 11:49:17 +01:00
Nam Nguyen
098579a4a5 configs: eagle: Enabled I2C support for R-Car V3M
Enable I2C support for R-Car V3M (R8A77970) on Eagle board.

Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2022-03-14 11:49:17 +01:00
Nam Nguyen
9baff975bf configs: falcon: Enabled I2C support for R-Car V3U
Enable I2C support for R-Car V3U (R8A779A0) on Falcon board.

Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2022-03-14 11:49:17 +01:00
Tom Rini
6d35c24892 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
- sunXi SPI fixups (Andre)
- bcm iproc qspi (Rayagonda)
2022-03-12 07:20:29 -05:00
Andre Przywara
280294c5df sunxi: boards: Enable SPI flash support in U-Boot proper
Some sunxi boards ship with SPI flash, which allows booting through the
BootROM. We cover this functionality by a separate SPL "mini" driver.
Separately we have a proper DM_SPI driver for U-Boot proper, which
provides access to the SPI flash through the "sf" command. That allows
to update the firmware on the SPI flash, also to store the environment
there.

However only very few boards actually enable support for U-Boot proper,
even though that would work and the SPL part is configured.

Use the cleaned up configuration scheme to enable SPI flash on those
boards which mention a SPI flash in their .dts, or which use the SPL SPI
support.

Out of the box this would enable storing the environment on the SPI
flash, and allows people to read or write the flash from U-Boot, for
instance to update the SPI flash when booted via an SD card.

For this to actually work there must be a "spi0" alias in the DT, which
most boards are missing. But this should be addressed separately.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-10 17:34:44 +05:30
Andre Przywara
81a46c152a sunxi: Kconfig: Fix up SPI configuration
Commit 7945caf22c ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
selected CONFIG_SPI by default on all Allwinner A64 boards, even though
only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs
had to manually select DM_SPI and friends, even though they are a
platform property (the sunxi SPI driver is DM_SPI only).

Clean this up to allow easy selection of SPI flash support in U-Boot
proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is
selected, for *all* Allwinner SoCs. This simplifies the defconfig for
two Libretech boards already.

Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the
four boards which allow SPI booting select this explicitly.

Any board wishing to support SPI flash in U-Boot proper now just defines
CONFIG_SPI and CONFIG_SPI_FLASH_<vendor> in its defconfig, Kconfig takes
care of the rest.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-10 17:32:13 +05:30
Pali Rohár
d6213e206c Nokia RX-51: Convert to CONFIG_DM_VIDEO
Mechanically convert video_hw_init() function to UCLASS_VIDEO probe
callback and replace CONFIG_CFB_CONSOLE by CONFIG_DM_VIDEO.

As framebuffer base address is setup by the bootloader which loads U-Boot,
set plat->base to that fixed framebuffer address.

This change was tested in qemu n900 machine and is working fine.

What does not work is CONFIG_VIDEO_LOGO, seems to be buggy.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-03-09 21:28:53 +01:00
Tom Rini
6d3c46ed0e Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Fix ARMv5/F1C100 FEL booting
- Fix F1C100 reset
- Introduce proper F1C100 boot method detection
- Enable SPI booting for F1C100

Boot tested from FEL, SPI, SD card and eMMC (where applicable) on
Pine64-LTS, Pine-H64, BananaPi M1, OrangePi Zero, LicheePi Nano(F1C100).
2022-03-05 20:46:55 -05:00
Aswath Govindraju
4403e1a31c configs: j721e_*_evm_a72_defconfig: Enable config for setting mmc speed mode
Enable config for setting mmc speed mode from U-Boot command line.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-03-04 15:20:06 -05:00
Marek Behún
7f59ed6872 arm: mvebu: turris_omnia: Enable ext4 write support in defconfig
Enable ext4 write support in Turris Omnia's defconfig. Some users find
it useful.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Tom Rini
705b5840cd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Update and fixes for sl28, lx2, pblimage generation for some powerpc
products
2022-03-03 08:24:13 -05:00
Andre Przywara
cfcf1952c1 sunxi: f1c100s: Drop SYSRESET to enable reset functionality
The F1C100s DT contains the wrong compatible string for the watchdog,
which breaks reset functionality.
Updating the DT goes via the Linux tree, but to allow reset
functionality meanwhile (useful for development!), disable SYSRESET for
now, to let the old-fashioned watchdog driver kick in and provide the
reset_cpu() implementation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-03 01:24:06 +00:00
Jesse Taube
640f2f3bf1 mach-sunxi: Enable SPI boot for SUNIV and licheepi nano
Enable SPI boot in SPL on SUNIV architecture and use
it in the licheepi nano that uses the F1C100s.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-03 01:24:06 +00:00
Linus Walleij
c2aed9cfb9 board: stemmy: Detect board variants and patch DTB
This patch scans the cmdline from the Samsung SBL (second stage
bootloader) and stores the parameters board_id=N and lcdtype=N
in order to augment the DTB for different board and LCD types.

We then add a custom ft_board_setup() callback that will inspect
the DTB and patch it using the stored LCD type. At this point
we know which product we are dealing with, so using the passed
board_id we can also print the board variant for diagnostics.

We patch the Codina, Skomer and Kyle DTBs to use the right
LCD type as passed in lcdtype from the SBL.

This also creates an infrastructure for handling any other
Samsung U8500 board variants that may need a slightly augmented
DTB.

Cc: Markuss Broks <markuss.broks@gmail.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-28 10:33:45 -05:00
Janne Grunau
6fb4f7387e arm: apple: Switch to fully dynamic mem layout
Support for Apple M1 Pro and Max will allow using a single binary for
all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM
start address is 0x100_0000_0000 instead of 0x8_0000_0000.
Replace the hardcoded memory layout with dynamic initialized
environment variables in board_late_init().

Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021).

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-28 10:33:45 -05:00
Michael Walle
554a85313b board: sl28: use fit image generator
Simplify the binman config and fdt nodes by using the "@..-SEQ"
substitutions and CONFIG_OF_LIST.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 12:01:02 +05:30
Michael Walle
62ba0e5df6 board: sl28: disable random MAC address generation
Nowadays, u-boot (when CONFIG_NET_RANDOM_ETHADDR is set) will set
enetaddr to a random value if not set and then pass the randomly
generated MAC address to linux.

This is bad for the following reasons:
 (1) it makes it impossible for linux to detect this error
 (2) linux won't trigger any fallback mechanism for the case where
     it didn't find any valid MAC address
 (3) a saveenv will store this randomly generated MAC address in the
     environment

Probably, the user will also be unaware that something is wrong. He will
just get different MAC addresses on each reboot, asking himself why this
is the case.

As this board usually have a serial port, the user can just fix this by
setting the MAC address manually in the environment. Also disable the
netconsole just in case, because it cannot be guaranteed that it will
work in any case. After all, this was just a convenience option, because
the bootloader - right now - doesn't have the ability to read the MAC
address, which is stored in the OTP. But it is far more important to
have a clear view of whats wrong with a board and that means we can no
longer use this Kconfig option.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 12:01:02 +05:30
Michael Walle
2ba8a446ce board: sl28: enable SoC watchdog support
The SoC provides two additional watchdogs integrated in the SoC. Enable
support for these.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 11:59:35 +05:30
Michael Walle
34502f7aa3 board: sl28: enable sl28cpld support
Enable the GPIO and watchdog driver. Don't start the watchdog
automatically, though.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 11:59:35 +05:30
Adam Ford
4ce849f535 arm: rmobile: rzg2_beacon: Enable proper Ethernet PHY
The wrong phy was being enabled, because it worked and the proper
PHY did not.  After the Renesas maintainer made some adjustments
to the device tree, Linux was able to use the proper driver, and
when that device tree was ported to Linux, the ethernet stopped
working due to the lack of rgmii-rxid support.  Now that
rgmii-rxid is supported, enable the proper driver to restore
ethernet function.

Fixes: 1eaf61c84d ("arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3")
Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-25 21:42:07 +01:00
Sean Anderson
052bebe54f clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01
This driver was missing a clock prefix. Add one.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20211215163620.2770126-4-seanga2@gmail.com
2022-02-24 23:58:13 -05:00
Adam Ford
4cea6ed92d configs: omap various: Remove OMAP_EHCI_PHY from defconfigs
With the Kconfig options being deleted, the references to
OMAP_EHCI_PHY are useless.  Remove them from the various
defconfigs.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23 05:25:17 +01:00
Tom Rini
17a0dc6abf Merge branch '2022-02-21-platform-updates'
- Assorted updates / fixes for Apple, TI and Aspeed platforms
2022-02-21 08:53:24 -05:00
Mark Kettenis
5a0973f013 arm: apple: Disable debug UART
The address of the debug UART varies differs between the M1 and
the M1 Pro/Max SoCs.  So we have to disable it to make a single
U-Boot binary that works on all SoC generations.  Leave the
settings for the base address and clock rate of the M1 in place
to make it easier to re-enable the debug UART when needed.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-21 08:35:40 -05:00
Tom Rini
24b628a8f8 Xilinx changes for v2022.04-rc3
microblaze:
 - Fix exception handler
 
 zynqmp:
 - Show information about secure images
 - DT changes (som u-boot file removal)
 - Fix zynqmp_pm_cfg_obj_convert.py
 - Fix platform boot
 
 xilinx:
 - Fix bootm_size calculation
 - Remove GPIO_EXTRA_HEADER selection
 
 power:
 - Add zynqmp power management driver
 
 scsi:
 - Add phy support to ceva driver
 
 zynq qspi:
 - Fix unaligned accesses and check baudrate setup
 - Add support for spi memory operations
 
 net:
 - Fix 64bit calculation in axi_emac
 
 video:
 - Add missing gpio dependency for seps driver
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Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
2022-02-21 08:32:02 -05:00
Michal Simek
83d2941fe9 arm64: zynqmp: Fix dependencies around ZYNQMP_PSU_INIT_ENABLED
ZYNQMP_PSU_INIT_ENABLED is called only when BOARD_EARLY_INIT_F is defined
that's why cover this dependency in Kconfig.
 board_early_init_f() is only part related to
CONFIG_ZYNQMP_PSU_INIT_ENABLED which is disabled now that's why disable
BOARD_EARLY_INIT_F and also build board_early_init_f() only when
CONFIG_BOARD_EARLY_INIT_F is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d89253ec1590cd513dcd4bfbedebae618bd6d605.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:19 +01:00
Michal Simek
27703ba06d arm64: zynqmp: Build psu_spl_init for SPL all the time
ZYNQMP_PSU_INIT_ENABLED specifically saying that has connection to full
U-Boot not SPL that's why build psu_spl_init for SPL all the time.

Also disable ZYNQMP_PSU_INIT_ENABLED because it ends up in situation that
psu_init() is called twice which is wrong. By default only SPL should call
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bf1e5d9a163f8853c7d951ad42965114ab0b1f50.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:06 +01:00
Michal Simek
f063100593 xilinx: Enable OF_BOARD for zynq and zynqmp boards
The commit 9855034397 ("fdt: Don't call board_fdt_blob_setup() without
OF_BOARD") forced to enable OF_BOARD for platforms which provide DT
externally. Zynq/ZynqMP boards are using this feature for a long time
that's why there is a need to enable it by default.

Also code expects to return error in case of error that's why also fill it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:14:02 +01:00
Marek Vasut
fea6607317 ARM: imx: imx8mn-ddr4-evk: Add ethernet support
Add support for ethernet on the imx8mn-ddr4-evk.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-19 23:32:23 +01:00
Heiko Thiery
891a32465d kontron-sl-mx8mm: change environment address variables
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.

The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".

The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-19 23:32:23 +01:00
Lukasz Majewski
c4c3fa98ac xea: defconfig: Update defconfig to support mtd partitions r/w by name
After this change it would be possible to use 'mtd' command to get access
to XEA's SPI-NOR partitions by name (e.g. SPL), not by offsets.

To enable this feature the CONFIG_SPI_FLASH_MTD needs to be defined in the
Kconfig, not in xea.h.

=> mtd list
=> mtd read spl-boot-data1 ${loadaddr} 0x0 4
=> md.l ${loadaddr} 1

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-02-19 14:46:54 +01:00
Marek Vasut
6e3cef06da ARM: imx: imx8mn-ddr4-evk: Fix boot from SD card
Enable missing config options to make the board boot from SD card.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-19 14:46:54 +01:00
Tim Harvey
2cb156e126 board: gateworks: venice: add imx8mn-gw7902 support
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller
 - LTE CAT M1 modem
 - USB 2.0 HUB
 - M.2 Socket with USB2.0, PCIe, and dual-SIM
 - IMX8M FEC
 - PCIe based GbE
 - RS232/RS485/RS422 serial transceiver
 - GPS
 - CAN bus
 - WiFi / Bluetooth
 - MIPI header (DSI/CSI/GPIO/PWM/I2S)
 - PMIC

To add support for the i.MX8M Nano GW7902:
 - Add imx8mn-venice dts/defconfig/include
 - Add imx8mn-gw7902 dts
 - Add imx8mn-2gb lpddr4 dram configs
 - Add misc support for IMX8M Nano SoC
 - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
 - update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Ying-Chun Liu (PaulLiu)
ddb56f371a arm: imx8m: add support for Advantech RSB-3720
Add initial support for Advantech RSB-3720 board.
The initial support includes:
 - MMC
 - eMMC
 - I2C
 - FEC
 - Serial console

Signed-off-by: Darren Huang <darren.huang@advantech.com.tw>
Signed-off-by: Kevin12.Chen <Kevin12.Chen@advantech.com.tw>
Signed-off-by: Phill.Liu <Phill.Liu@advantech.com.tw>
Signed-off-by: Tim Liang <tim.liang@advantech.com.tw>
Signed-off-by: wei.zeng <wei.zeng@advantech.com.cn>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
Cc: Peng Fan (OSS) <peng.fan@oss.nxp.com>
2022-02-19 14:46:54 +01:00
Heiko Thiery
b345f177b9 configs/*imx8mn*: remove [SPL_]CLK_COMPOSITE_CCF
This option is selected implicitly when [SPL_]CLK_IMX8MN is selected.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-02-19 14:46:54 +01:00
Oleh Kravchenko
310d6655a1 Enable Fastboot(UUU) for O4-iMX6ULL-NANO boards
Make O4-iMX6ULL-NANO-based board compatible with Yocto layer meta-out4 and
fix device flashing by UUU (aka MFG Tools).

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
2022-02-18 18:12:23 +01:00
Tom Rini
8ad1c9c26f Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- a37xx: pci: Cleanup and minor fix for root port check (Pali)
- pci: mvebu: Ensure that root port is always on root zero bus (Pali)
- kwbimage: Fix dumping DATA registers for v0 images (Pali)
- kwbimage: Support for parsing extended v0 format (Pali)
- a37xx: Fix code and update DTS files to upstream version (Pali)
- a37xx: Fix and extend building memory map (Pali)
- ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision (Marek)
- mvebu: Optionally reset board on DDR training failure (Marek)
2022-02-17 11:03:50 -05:00
Marek Behún
4b7db75616 arm: mvebu: turris_omnia: Reset the board immediately on DDR training failure
The state of the current DDR training code for Armada 38x is such that
we cannot be sure it will always train successfully - although after the
last change we were yet unable to find a board that failed DDR training,
from experience in the last 2 years we know that it is possible.

The experience also tells us that in many cases the board fails training
only sometimes, and after a reset the training is successful.

Enable the new option that makes the board reset itself on DDR training
failure immediately. Until now we called hang() in such a case, which
meant that the board was reset by the MCU after 120 seconds.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-02-17 14:17:07 +01:00