Commit Graph

2031 Commits

Author SHA1 Message Date
Pali Rohár
b4d3b338df mtd: mtdpart: Change size type from fdt_addr_t to fdt_size_t
Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans()
function. It expects fdt_size_t * and not fdt_addr_t *.

When these two types do not have same size then U-Boot throw compile
warning:

    drivers/mtd/mtdpart.c: In function ‘add_mtd_partitions_of’:
    drivers/mtd/mtdpart.c:906:57: warning: passing argument 3 of ‘ofnode_get_addr_size_index_notrans’ from incompatible pointer type [-Wincompatible-pointer-types]
       offset = ofnode_get_addr_size_index_notrans(child, 0, &size);
                                                             ^~~~~
    In file included from include/dm/device.h:13,
                     from include/linux/mtd/mtd.h:26,
                     from include/ubi_uboot.h:28,
                     from drivers/mtd/mtdpart.c:27:
    include/dm/ofnode.h:530:25: note: expected ‘fdt_size_t *’ {aka ‘long long unsigned int *’} but argument is of type ‘fdt_addr_t *’ {aka ‘long unsigned int *’}
                 fdt_size_t *size);
                 ~~~~~~~~~~~~^~~~

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-06-06 17:47:17 -04:00
Tom Rini
90e1fd0910 Convert CONFIG_TPL_NAND_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_TPL_NAND_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
e2475141bd Convert CONFIG_SYS_CFI_FLASH_STATUS_POLL to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_CFI_FLASH_STATUS_POLL

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
2f57139c21 Convert CONFIG_SYS_FLASH_CFI_WIDTH to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FLASH_CFI_WIDTH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Patrice Chotard
3feea0ba19 spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode
and logically calls spi_get_bus_and_cs(). In case spi mode and speed are
not read from DT, make usage of spi_flash_probe() instead.

To sum-up:
 - Previous call tree was:
    spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()

 - Current call tree is:
    spi_flash_probe() -> _spi_get_bus_and_cs()
    spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()

This patch impacts the following :
  - cmd/sf.c: if spi mode and/or speed is passed in argument of
    do_spi_flash_probe(), call spi_flash_probe() otherwise call
    spi_flash_probe_bus_cs().

  - drivers/net/fm/fm.c: as by default spi speed and mode was set to
    0 and a comment indicates that speed and mode are read from DT,
    use spi_flash_probe_bus_cs().

  - drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read
    from DT by all platforms using this driver, so keep legacy and replace
    spi_flash_probe_bus_cs() by spi_flash_probe();

  - drivers/net/sni_netsec.c : spi speed and mode are not read from DT,
    so replace spi_flash_probe_bus_cs() by spi_flash_probe().

  - drivers/usb/gadget/max3420_udc.c: Can't find any platform which make
    usage of this driver, nevertheless, keep legacy and replace
    spi_get_bus_and_cs() by _spi_get_bus_and_cs().

  - env/sf.c: a comment indicates that speed and mode are read
    from DT. So use spi_flash_probe_bus_cs().

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23 09:33:10 -04:00
Patrice Chotard
61708bb0a2 spi: spi-uclass: Add new spi_get_bus_and_cs() implementation
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().

Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.

Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23 09:33:10 -04:00
Michael Trimarchi
a222c14792 mtd: nand: mxs_nand_spl: Fix bad block skipping
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.

The problematic part of old code was in this part:

while (is_badblock(mtd, offs, 1)) {
           page = page + nand_page_per_block;
          /* Check i we've reached the end of flash. */
          if (page >= mtd->size >> chip->page_shift) {
                      free(page_buf);
                      return -ENOMEM;
         }
}

Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm

Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:47 +02:00
Michael Trimarchi
78bf8e802c nand: raw: mxs_nand: Fix specific hook registration
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.

With this fix markbad is working again. Before this change:

nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0

Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:47 +02:00
Ye Li
9fd406de52 mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
2022-05-19 21:39:36 +02:00
Chris Packham
54a54a6313 Convert CONFIG_MTD_CONCAT to Kconfig
This converts the following to Kconfig:
  CONFIG_MTD_CONCAT

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-11 09:22:24 -04:00
Tom Rini
4209f74445 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
- NPCM7xx FIU SPI driver (Jim Liu)
- AT45DB641E dataflash (Luca Ellero)
2022-05-04 09:04:43 -04:00
Andrew Scull
2635e3b50f pci: Add mask parameter to dm_pci_map_bar()
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
12507a2d22 pci: Map bars with offset and length
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.

Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:46 -04:00
Luca Ellero
c62f93a620 sf: dataflash: add support for AT45DB641E
NOTE: this chip uses "extened device information"

Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:57:19 +05:30
Luca Ellero
1c1c581d56 sf: dataflash: add support for "extended ID"
Take as reference Linux kernel code:
	drivers/mtd/devices/mtd_dataflash.c
	commit 1da8869a428317a6d3cd8d47184cf87feb34a98b
	Author: Andrey Smirnov <andrew.smirnov@gmail.com>

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:56:16 +05:30
Tien Fong Chee
f9b9641348 mtd: spi-nor-ids: add Macronix mx25u51245g flash entry
Add Macronix mx25u51245g flash entry, so this can be used on
SoCFPGA devices.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
[Jagan: updated commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:37:39 +05:30
Marek Vasut
1aa60f0cea mtd: spi-nor-ids: Add Winbond W25Q128JW ID
Add ID for Winbond W25Q128JW device. This is a 128 Mbit QSPI NOR.
Tested on W25Q128JWPIM part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:35:17 +05:30
Pali Rohár
06ef911447 mtd: nand: raw: Add support for DT property nand-ecc-algo=bch
According to Linux kernel DT schema nand-controller.yaml, using DT property
nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
c9ea9019c5 mtd: rawnand: fsl_elbc: Use ECC configuration from device tree
Initialize ECC configuration after nand_scan_ident() call and only in case
nand_scan_ident() have not done it. nand_scan_ident() fills ECC
configuration from device tree.

Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
da98ddaf73 mtd: rawnand: fsl_elbc: Add device tree support
This allows boards to specify NAND settings via standard DT properties.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
974f66a470 mtd: rawnand: fsl_elbc: Implement RNDOUT command
This is needed for SW ECC.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Tom Rini
2ddf84679d u-boot-imx-20220413
i.MX patches for 2022.07
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
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Merge tag 'u-boot-imx-20220413' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220413

i.MX patches for 2022.07

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
2022-04-13 08:00:11 -04:00
Ye Li
34793598c8 mtd: nand: mxs_nand_spl: Remove the page aligned access
The mxs_nand_spl driver can support to read from page unaligned offset,
so don't need to set bl_len to ask spl_load_simple_fit to handle
the page unaligned access.

Actually spl_load_simple_fit has two parts of reading:
spl_simple_fit_read and spl_load_fit_image.
The spl_load_fit_image can handle the page unaligned offset,
but the spl_simple_fit_read can't do it. spl_simple_fit_read requires
the FIT location at page aligned offset.

Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl
to use page unaligned read by driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
2022-04-12 17:33:55 +02:00
Patrice Chotard
7ab3364c6d mtd: Update the way partitions are parsed
In case mtd_info's dev field is not populated (raw nand's case),
use the flash_node new field which reference the DT flash node where
can be found "partitions" node with "fixed-partitions" compatible.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
2022-04-11 11:39:19 -04:00
Patrice Chotard
c86a4de8df mtd: Add flash_node in struct mtd_info
Currently, add_mtd_partitions_of() can be used only if dev field of
mtd_info struct is populated. It's the case, for example, for a spi nor
flash, which has a DT compatible "jedec,spi-nor" and an associated
device. mtd->dev is populated in spi_nor_scan().

But in case of a raw nand node, mtd_info's dev field can't be populated
as flash node has no compatible, so no associated device.
add_mtd_partitions_of() can't be used to parse "partitions" subnode.

To remove this constraint, add an ofnode field in mtd_info struct
which reference the DT flash node. This new field is populated by
nand_scan_tail(). This new field will be used by add_mtd_partitions_of()
to parse the flash node for "partitions" defined in DT.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
2022-04-11 11:39:19 -04:00
Simon Glass
564e532eea spi: Avoid checking console in SPL
When SPI flash is used in SPL there is no console, so ctrlc() cannot be
called. Add a condition to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Tom Rini
34d2b7f203 Prepare v2022.04-rc5
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Merge tag 'v2022.04-rc5' into next

Prepare v2022.04-rc5
2022-03-28 12:36:49 -04:00
Han Xu
ed48490f8d mtd: gpmi: fix the bch setting backward compatible issue
Previous u-boot code changed the default bch setting behavior and caused
backward compatible issue. This fix choose the legacy bch geometry back
again as the default option. If the minimum ecc strength that NAND chips
required need to be chosen, it can be enabled by either adding DT flag
"fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The
unused flag "fsl,legacy-bch-geometry" get removed.

Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry)
Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND)
Tested-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-03-28 08:22:17 -04:00
Tom Rini
297e6eb8dc Xilinx changes for v2022.07-rc1
microblaze:
 - Add support for reserved memory
 
 xilinx:
 - Update FRU code with MAC reading
 
 zynqmp:
 - Remove double AMS setting
 - DT updates (mostly for SOMs)
 - Add support for zcu106 rev 1.0
 
 zynq:
 - Update nand binding
 
 nand:
 - Aligned zynq_nand to upstream DT binding
 
 net:
 - Add support for ethernet-phy-id
 
 mmc:
 - Workaround CD in zynq_sdhci driver also for ZynqMP
 - Add support for dynamic/run-time SD config for SOMs
 
 gpio:
 - Add driver for slg7xl45106
 
 firmware:
 - Add support for dynamic SD config
 
 power-domain:
 - Update zynqmp driver with the latest firmware
 
 video:
 - Add skeleton driver for DP and DPDMA
 
 i2c:
 - Fix i2c to work with QEMU
 
 pinctrl:
 - Add driver for zynqmp pinctrl driver
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Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.07-rc1

microblaze:
- Add support for reserved memory

xilinx:
- Update FRU code with MAC reading

zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0

zynq:
- Update nand binding

nand:
- Aligned zynq_nand to upstream DT binding

net:
- Add support for ethernet-phy-id

mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs

gpio:
- Add driver for slg7xl45106

firmware:
- Add support for dynamic SD config

power-domain:
- Update zynqmp driver with the latest firmware

video:
- Add skeleton driver for DP and DPDMA

i2c:
- Fix i2c to work with QEMU

pinctrl:
- Add driver for zynqmp pinctrl driver
2022-03-16 12:52:02 -04:00
Christophe Kerello
7ce4f1fad2 mtd: rawnand: stm32_fmc2: add NAND Write Protect support
This patch adds the support of the WP# signal. WP will be disabled
before the first access to the NAND flash.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-03-15 09:10:52 +01:00
Tom Rini
2abf048ab7 Prepare v2022.04-rc4
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Merge tag 'v2022.04-rc4' into next

Prepare v2022.04-rc4
2022-03-14 17:40:36 -04:00
Niklas Cassel
228173d855 mtd: spi-nor-ids: Enable quad read for Gigadevice gd25lq128
The Gigadevice gd25lq128 serial flash exists in different versions,
all which identify themselves using the same JEDEC id.

gd25lq128c:
https://www.gigadevice.com/datasheet/gd25lq128

gd25lq128d:
https://www.gigadevice.com/datasheet/gd25lq128d

However, all versions support quad read, so enable it.
Tested and verified on the Sipeed MAix BiT board.

Fixes: 30b9a28a3f ("mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-12 01:10:01 +05:30
Philippe Reynes
0d32ebfcfa nand: brcmnand: add bcm6753 support
This adds the nand support for chipset bcm6753.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Michal Simek
c2b74edf15 mtd: nand: Update driver to match new DT binding
New binding changed node name from flash@e1000000 to nand-controller@0,0
which should be reflected in the driver. Both names are supported for
backward compatibility.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
2022-03-07 08:52:20 +01:00
Tom Rini
819b4778d6 Convert CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to Kconfig
This converts the following to Kconfig:
   CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:20 -05:00
Patrice Chotard
016e82d322 mtd: cfi_mtd: populate mtd->dev with flash_info->dev
Populate mtd->dev with flash_info->dev which allows to get
full mtd information using the "mtd list" command.
Before, "mtd list" command returns :

List of MTD devices:
* nor0
  - type: NOR flash
  - block size: 0x40000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "nor0"

After this patch we get for example:

List of MTD devices:
* nor0
  - device: flash@0
  - parent: spi@40430000
  - driver: cfi_flash
  - path: /soc/spi@40430000/flash@0
  - type: NOR flash
  - block size: 0x40000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "nor0"

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-01 10:56:25 +01:00
Patrick Delaunay
0f9595b9fa configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig
Use moveconfig.py script to convert define CONFIG_SYS_MAX_FLASH_BANKS
and CONFIG_SYS_MAX_FLASH_BANKS_DETECT to Kconfig and move these entries
to defconfigs.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Re-switch to IS_ENABLED check in spi-nor-core.c, re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-21 14:01:35 -05:00
Patrick Delaunay
144fef87df mtd: cfi: change CONFIG_SYS_MAX_FLASH_BANKS_DETECT as boolean
Prepare migration to Kconfig.

CONFIG_SYS_MAX_FLASH_BANKS_DETECT becomes boolean and
CONFIG_SYS_MAX_FLASH_BANKS define the MAX size, also used
for detection when CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
(CFI_MAX_FLASH_BANKS = CONFIG_SYS_MAX_FLASH_BANKS).

CONFIG_SYS_MAX_FLASH_BANKS become mandatory when
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-21 14:01:35 -05:00
Patrick Delaunay
98150e7e8c mtd: cfi: introduce CFI_FLASH_BANKS
Replace CONFIG_SYS_MAX_FLASH_BANKS by CFI_FLASH_BANKS to prepare
Kconfig migration and avoid to redefine CONFIG_SYS_MAX_FLASH_BANKS
in cfi_flash.h.

After this patch CONFIG_SYS_MAX_FLASH_BANKS should be never used in
the cfi code: use CFI_MAX_FLASH_BANKS for struct size or CFI_FLASH_BANKS
for number of CFI banks which can be dynamic.

This patch modify all the files which include mtd/cfi_flash.h.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-21 14:01:35 -05:00
Heinrich Schuchardt
185f812c41 doc: replace @return by Return:
Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-19 18:11:34 +01:00
Robert Marko
429866e845 mtd: nand: pxa3xx: set mtd->dev
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.

So simply set the mtd->dev to the driver udevice.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-17 14:45:24 -05:00
David Rivshin
f44bcb9f0d nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine
In the case of an erased (sub)page both the data and ECC are all 0xFF
bytes. This fails the normal ECC verification, as the computed ECC of
all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect
erased pages by checking that the ECC bytes are all-0xFF, but this had
two problems:
1) bitflips in the data were not corrected, so the data looked not-erased
2) bitflips in the ECC bytes were reported as uncorrectable ECC errors

The equivalent Linux driver [1] correctly handles this by counting the
number of 0-bits in the combination of data and ECC bytes. If the number
of 0-bits is less than the amount of bits correctable by the selected
ECC algorithm, then it is treated as an erased page with correctable
bitflips.

Implement similar, though simplified, logic in omap_correct_data_bch().

[1] see omap_elm_correct_data() in omap2.c

Signed-off-by: David Rivshin <drivshin@allworx.com>
2022-01-16 08:31:03 -05:00
Joel Peshkin
36a3b4ed56 BRCMNAND: Fix reporting of uncorrectable errors on subpages during page read
Previously, a subpage with an uncorrectable error followed by a subpage
with a correctable error would return an erroneous correctable status.

Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-14 13:16:11 -05:00
Pierre Bourdon
c03f4da187 mtd: nand: pxa3xx: use marvell, prefix for custom DT properties
The DT properties for the "enable-arbiter" and "keep-config" config
knobs were previously named inconsistently:

- The u-boot driver used "nand-enable-arbiter" and "nand-keep-config"
  names, without Marvell prefixes.

- The Linux driver uses "marvell,nand-keep-config" ("enable-arbiter"
  does not exist anymore in recent kernels, but it also used to be
  "marvell,nand-enable-arbiter").

- The device trees almost all use "marvell," prefixed names, except for
  one single instance of "nand-enable-arbiter" without vendor prefix.

This commit standardizes on the vendor prefixed version, making the
u-boot driver read from DT props "marvell,nand-enable-arbiter" and
"marvell,nand-keep-config". The one device tree using the unprefixed
version is also changed to use the new naming.

This has the side effect of making the previously no-op "marvell,"
config knobs already present in some DTs actually do something. This was
likely the original intention of the DT authors, but note that this
commit was not tested on every single impacted board.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
2022-01-14 07:47:57 +01:00
Vagrant Cascadian
70463798b2 drivers/mtd/ubispl/ubispl.c: Fix spelling of "mismatched". 2022-01-13 07:57:49 -05:00
Tom Rini
0dadad6d7c - disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
 - add changes to support VIM3/L android boot by using meson64_android.h config
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Merge tag 'u-boot-amlogic-20220107' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
- add changes to support VIM3/L android boot by using meson64_android.h config
2022-01-09 07:56:31 -05:00
Tom Rini
068c41f1cc Finish conversion CONFIG_SYS_NAND_SELF_INIT to Kconfig
In order to finish this conversion we need to add a symbols for
SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases
there where we need to, or need to not, use that framework as things
stand.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
bfb5387fe9 Convert CONFIG_TEGRA_NAND to Kconfig
This converts the following to Kconfig:
   CONFIG_TEGRA_NAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
4d69303299 Convert CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT

In order to do this conversion, expose this option to the user and
use "save" not "safe" in the text.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
98ab831da7 Convert CONFIG_FSL_IFC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_IFC

This is done via select statements to match previous logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00