Commit Graph

24372 Commits

Author SHA1 Message Date
Siva Durga Prasad Paladugu
47b35a516b ARM: zynq: Move USB/SD/MMC common FAT configs
Moved the USB/SD/MMC common FAT configs separately
to avoid redefinition warnings.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:35 +02:00
Siva Durga Prasad Paladugu
00cf6b4e22 ARM: zynq: Enable the FAT write capability
Enable the FAT write capability for SD/MMC write
functionality.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:35 +02:00
Siva Durga Prasad Paladugu
c6024c8edd ARM: zynq: Added USB host support for zynq boards
Added configs to support USB host for zynq boards.
Also added a command usbboot to boot from usb.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:35 +02:00
Michal Simek
eb8c54bfaa ARM: zynq: ehci: Added USB host driver support
Added USB host driver for zynq.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:35 +02:00
Michal Simek
3cc3fa8672 ARM: zynq: Add MIO detection code
Add run-time MIO pin detection to get actual
pin configuration for specific periphery.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:35 +02:00
Michal Simek
3d456eec43 ARM: zynq: Extend kernel image size to 60MB
Extend max kernel image size. Gunzip is checking
this value. If kernel is larger, message below is shown.

Uncompressing Kernel Image ... Error: inflate() returned -5
GUNZIP: uncompress, out-of-mem or overwrite error -
must RESET board to recover

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
0b680206cc ARM: zynq: Fix building SPL without FPGA support
When CONFIG_FPGA is defined but CONFIG_SPL_FPGA is not, the build fails:
board.c: In function 'board_init':
board.c:41:3: error: 'fpga' undeclared (first use in this function)
   fpga = fpga010;

Fix this by expanding the "#if.." around this block to match the other
FPGA checks and don't compile this block when buildign for SPL without
FPGA support.

Tested a bootloader that had CONFIG_FPGA defined without CONFIG_SPL_FPGA,
this now compiles without errors and loading FPGA from u-boot works.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Mike Looijmans
dc4a1a2729 ARM: zynq: Fix bootmode mask
Bootmode mask was defined as 0x0F, but documentation mentions 0x07.
Experiments show that bit "3" is the JTAG chain configuration.
Change the mask to "7" to allow systems with a different chain
configuration to boot correctly.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
2da7a745b6 ARM: zynq: Setup correct slcr_lock value
The driver should setup slcr state according
to slcr operations.

Reported-by: Andrey Filippov <andrey@elphel.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
6e04769caf ARM: zynq: slcr: Fix incorrect commentary
Fix c&p error in zynq_slcr_devcfg_enable() commentary
and extending it with description according
to Zynq TRM also in zynq_slcr_devcfg_disable().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
1540fb725b ARM: zynq: Call zynq board_init() in SPL
Call board_init() if SPL is configured with CONFIG_SPL_BOARD_INIT.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2014-05-14 07:43:34 +02:00
Michal Simek
10fa49f428 ARM: zynq: Do not use half memory size for ECC case
Memory size should be specified without ECC place.
If you need to have half memory size, please change
u-boot configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Siva Durga Prasad Paladugu
96a2859e54 ARM: zynq: Added efuse status register base address
Added efuse status register base address. This register
is used for determining whether efuse was blown or not.
Also, added the zynq_get_silicon_version() to get the
silicon version of the zynq board.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
5b73caffeb ARM: zynq: Remove sparse warnings
Warnings:
board/xilinx/zynq/board.c:17:13: warning: symbol 'fpga' was not declared. Should it be static?
board/xilinx/zynq/board.c:20:13: warning: symbol 'fpga010' was not declared. Should it be static?
board/xilinx/zynq/board.c:21:13: warning: symbol 'fpga015' was not declared. Should it be static?
board/xilinx/zynq/board.c:22:13: warning: symbol 'fpga020' was not declared. Should it be static?
board/xilinx/zynq/board.c:23:13: warning: symbol 'fpga030' was not declared. Should it be static?
board/xilinx/zynq/board.c:24:13: warning: symbol 'fpga045' was not declared. Should it be static?
board/xilinx/zynq/board.c:25:13: warning: symbol 'fpga100' was not declared. Should it be static?
board/xilinx/zynq/board.c:120:5: warning: symbol 'board_mmc_init' was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
ec9638659f ARM: zynq: Fix sparse warning in ddrc.c
Warning:
arch/arm/cpu/armv7/zynq/ddrc.c:43:24: warning: Using plain integer as NULL pointer

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:34 +02:00
Michal Simek
3b5b599f17 ARM: zynq: Fix sparse warnings in slcr.c
Warnings:
arch/arm/cpu/armv7/zynq/slcr.c:21:6: warning: symbol 'zynq_slcr_lock' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:27:6: warning: symbol 'zynq_slcr_unlock' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:34:6: warning: symbol 'zynq_slcr_cpu_reset' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:54:6: warning: symbol 'zynq_slcr_gem_clk_setup' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:81:6: warning: symbol 'zynq_slcr_devcfg_disable' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:94:6: warning: symbol 'zynq_slcr_devcfg_enable' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:107:5: warning: symbol 'zynq_slcr_get_boot_mode' was not declared. Should it be static?
arch/arm/cpu/armv7/zynq/slcr.c:113:5: warning: symbol 'zynq_slcr_get_idcode' was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:33 +02:00
Belisko Marek
97eeae1a07 mtd: nand: omap_gpmc: Fix update of read_ecc in oob
We need to flip only one bit not assign.

Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Acked-by: Pekon Gupta <pekon@ti.com>
2014-05-13 19:48:17 -04:00
Ash Charles
2d92ba8440 am335x: pepper: Add Gumstix Pepper AM335x-based machine
This adds the Gumstix Pepper[1] single-board computer based on the
TI AM335x processor. Schematics are available [2].

[1] https://store.gumstix.com/index.php/products/344/
[2] https://pubs.gumstix.com/boards/PEPPER/

Signed-off-by: Ash Charles <ash@gumstix.com>
[trini: Move 'cdev' in board.c down to under #ifdef's where it's used]
Signed-off-by: Tom Rini <trini@ti.com>
2014-05-13 19:47:51 -04:00
Christian Riesch
532d531828 arm, davinci: Use CONFIG_SPL_PAD_TO for padding the SPL in an ais image
The commits

commit b7b5f1a16c
Author: Albert ARIBAUD <albert.u.boot@aribaud.net>
da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINT

and

commit e7497891e3
Author: Albert ARIBAUD <albert.u.boot@aribaud.net>
cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINT

replaced CONFIG_SPL_MAX_SIZE by CONFIG_SPL_MAX_FOOTPRINT. However,
CONFIG_SPL_MAX_SIZE is used in the Makefile for padding the SPL
when preparing an u-boot.ais image. By removing CONFIG_SPL_MAX_SIZE
said commits broke the ais image of the da850evm and cam_enc_4xx
configurations.

This patch converts the u-boot.ais target to use CONFIG_SPL_PAD_TO
instead of CONFIG_SPL_MAX_SIZE for padding the SPL and adds
a #define CONFIG_SPL_PAD_TO where it is required.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Reported-by: Tom Taylor <ttaylor.tampa@gmail.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-05-13 19:43:01 -04:00
Egli, Samuel
f04776b6d8 siemens, draco: add new target
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:43:01 -04:00
Egli, Samuel
820969f370 siemens:cosmetic, dxr2: rename dxr2 to draco
The actual board name is draco and dxr2 is the target name.
In the future we'll have different targets based on draco board.
All changes are purely non-functional and basically rename dxr2
to draco.

One style fix in board.c that existed already before.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:43:00 -04:00
Robert Nelson
4fa2427c5d omap3_beagle: xM A/B validate new dtb exits in file system
Fall back to previous dtb used when omap3-beagle-xm-ab.dtb doesn't exist in file system

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Nishanth Menon <nm@ti.com>
Acked-by: Tom Rini <trini@ti.com>
2014-05-13 19:43:00 -04:00
Robert Nelson
3d47ffb993 omap3_beagle: use omap3-beagle-xm-ab.dtb for the xM AB revision
As of v3.15-rc3, omap3-beagle-xm-ab.dtb now exists with the usb hub (ehci) enabled.

For older kernels versions, cherry pick from mainline:
ef78f3869c37c480f1d58462a760a40dabc823f4

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Nishanth Menon <nm@ti.com>
2014-05-13 19:43:00 -04:00
Dmitry Lifshitz
d57b649e6c ARM: OMAP5: add CKO buffer control mask
Add CKOBUFFER_CLK_EN bit mask enabling FREF_XTAL_CLK clock.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
2014-05-13 19:43:00 -04:00
Dmitry Lifshitz
35fe1cb0c1 ARM: OMAP5: Power: add LDO2 support for Palmas driver
Add defines required to turn on LDO2 regulator.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
2014-05-13 19:43:00 -04:00
Dmitry Lifshitz
4b5d383924 ARM: OMAP5: add UART4 support
Add UART4 base address.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
2014-05-13 19:43:00 -04:00
Egli, Samuel
66c45faefb siemens: cosmetic: rename project_dir
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:43:00 -04:00
Egli, Samuel
84112b5171 siemens: change LED indication in DFU mode
In order to have the same LED indication like in another product
when ready for updating, enable only red led and disable status
LED when entering DFU mode.

The status LED is only switched off when defined in board file.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:43:00 -04:00
Egli, Samuel
111c8e4093 siemens: add led cmd for flexible LED control
* remove setting LED in user button function.
   We want to decouple reading user button and setting LED. This
   two things need to be done independently.

 * led cmd can be used to control LEDs that are defined in board file
   having a led cmd, one can easily set LEDs in u-boot shell. For
   example bootcmd can be extended to disable status LED before
   loading kernel.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:43:00 -04:00
Egli, Samuel
823b2c4ce4 siemens: update DDR3 parameters for dxr2
* add parameters for factory and print them at start up to
   facilitate control of right DDR3 settings in EEPROM.

 * cosmetic changes in a couple of printfs

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:42:59 -04:00
Egli, Samuel
9fc2ed40cd siemens: cosmetic: remove unused and rename defines
For dxr2 board DXR2_IOCTRL_VAL is set by data in EEPROM. In pxm2
board it does not make sense to have dxr2 as prefix. Replace it with
more meaningful DDR prefix.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Pascal Bach <pascal.bach@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-05-13 19:42:59 -04:00
Yegor Yefremov
4b97bcbe20 am33xx: add SSC enable macro
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2014-05-13 19:42:59 -04:00
Khoronzhuk, Ivan
0eaf416eea config: k2hk_evm: Add generic board support
We should use generic board in order the ARM maintainer
be able to remove arch/arm/lib/board.c

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-05-13 18:04:07 -04:00
Tom Rini
557a331908 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-05-13 17:09:28 -04:00
Stephen Warren
2364e151e4 ARM: tegra: use a CPU freq that all SKUs can support
U-Boot on Tegra30 currently selects a main CPU frequency that cannot be
supported at all on some SKUs, and needs higher VDD_CPU/VDD_CORE values
on some others. This can result in unreliable operation of the main CPUs.

Resolve this by switching to a CPU frequency that can be supported by any
SKU. According to the following link, the maximum supported CPU frequency
of the slowest Tegra30 SKU is 600MHz:

repo http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=summary
branch l4t/l4t-r16-r2
path arch/arm/mach-tegra/tegra3_dvfs.c
table cpu_dvfs_table[]

According to that same table, the minimum VDD_CPU required to operate at
that frequency across all SKUs is 1.007V. Given the adjustment resolution
of the TPS65911 PMIC that's used on all Tegra30-based boards we support,
we'll end up using 1.0125V instead.

At that VDD_CPU, tegra3_get_core_floor_mv() in that same file dictates
that VDD_CORE must be at least 1.2V on all SKUs. According to
tegra_core_speedo_mv() (in tegra3_speedo.c in the same source tree),
that voltage is safe for all SKUs.

An alternative would be to port much of the code from tegra3_dvfs.c and
tegra3_speedo.c in the kernel tree mentioned above. That's more work
than I want to take on right now.

While all the currently supported boards use the same regulator chip for
VDD_CPU, different types of regulators are used for VDD_CORE. Hence, we
add some small conditional code to select how VDD_CORE is programmed. If
this becomes more complex in the future as new boards are added, or we
end up adding code to detect the SoC SKU and dynamically determine the
allowed frequency and required voltages, we should probably make this a
runtime call into a function provided by the board file and/or relevant
PMIC driver.

Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Marcel Ziswiler <marcel@ziswiler.com>
Cc: Bard Liao <bardliao@realtek.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:32 -07:00
Stephen Warren
3365479ce7 ARM: tegra: Venice2 pinmux spreadsheet updates
The Venice2 pinmux spreadsheet was updated to fix a few issues. Import
those changes into the U-Boot pinmux initialization tables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:32 -07:00
Stephen Warren
2eba87a30a ARM: tegra: update Venice2 pinmux
This re-imports the entire Venice2 pinmux data from the board's master
spreadsheet, and makes use of the new IO clamping GPIO initialization
table features. This makes the board port fully compliant with the
required HW-defined pinmux initialization sequence.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:32 -07:00
Stephen Warren
4ff213b8e4 ARM: tegra: clamp inputs on Jetson TK1
The HW-defined procedure for booting Tegra requires that
CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux.
Modify the Jetson TK1 board to do this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:32 -07:00
Stephen Warren
9348532f51 ARM: tegra: make use of GPIO init table on Jetson TK1
The HW-defined procedure for booting Tegra requires that some pins be
set up as GPIOs immediately at boot in order to avoid glitches on those
pins, when the pinmux is programmed. This patch implements this
procedure for Jetson TK1. For pins which are to be used as GPIOs, the
pinmux mux function need not be programmed, so the pinmux table is also
adjusted.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:32 -07:00
Stephen Warren
bb14469ae0 ARM: tegra: add function to enable input clamping on tristate
The HW-defined procedure for booting Tegra requires that
CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux.
Add a function to the pinmux driver to allow boards to do this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Stephen Warren
eceb3f26f4 ARM: tegra: add GPIO initialization table function
The HW-defined procedure for booting Tegra requires that some pins be
set up as GPIOs immediately at boot in order to avoid glitches on those
pins, when the pinmux is programmed. Add a feature to the GPIO driver
which executes a GPIO configuration table. Board files will use this to
implement the correct HW initialization procedure.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Stephen Warren
4a68d3431a ARM: tegra: allow pinmux mux option not to be set by init tables
Define enum PMUX_FUNC_DEFAULT, which indicates that a table entry passed
to pinmux_config_pingrp()/pinmux_config_pingrp_table() shouldn't change
the mux option in HW.

For pins that will be used as GPIOs, the mux option is irrelevant, so we
simply don't want to define any mux option in the pinmux initialization
table.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Stephen Warren
48ec7a9468 ARM: tegra: fix CPU VDD comment in Tegra30 CPU init code
The register writes performed by arch/arm/cpu/arm720t/tegra30/cpu.c
enable_cpu_power_rail() set the voltage to 1.0V not 1.4V as the comment
implies. Fix the comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Stephen Warren
f175603f7c ARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICE
If CONFIG_API is ever to be enabled on Tegra, this define must be set,
since api/api_storage.c uses it.

A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE

1) It isn't documented in README. The same is true for a lot of similar
   defines used by api_storage.c.

2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the
   valid values are 0..n-1 not 0..n.

However, I this patch does not address those shortcomings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Masahiro Yamada
8ad5d45e00 boards.cfg: fix a configuration error of ep8248 board
"make ep8248_config" fails with an error like this:

    $ make ep8248_config
    make: *** [ep8248_config] Error 1

Its cause is that there are two entries for "ep8248".

The first is around line 652 of boards.cfg. (as Active)

The second appears around line 1230. (as Orphan)

This bug was accidentally introduced by commit e7e90901.
But it is not the author's fault. He just intended to change
IDS8247 board.

The commiter added ep8248 entry by mistake when he resolved a conflict.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kim Phillips <kim.phillips@linaro.org>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2014-05-13 11:00:01 -05:00
York Sun
15672c6dbd powerpc/freescale: Convert selected boards to generic board architecture
This patch converts the following boards to use generic board: MPC8536DS,
MPC8572DS, MPC8641HPCN, p1_p2_rdb_pc, corenet_ds, t4qds, B4860QDS. It has
been tested on NOR boot on MPC8536DS, MPC8572DS, P1021RDB, P4080DS,
P5020DS, P5040DS, P3041DS, T4240QDS, B4860QDS.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Ying Zhang <b40530@freescale.com>
CC: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Haijun.Zhang <Haijun.Zhang@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Shaohui Xie <Shaohui.Xie@freescale.com>
2014-05-13 08:31:22 -07:00
York Sun
8bae330f5c powerpc/mpc86xx: Fix boot_flag for calling board_init_f()
The argument boot_flag of board_inti_f() hasn't been used for powerpc until
recent changing to use generic board. Set it to 0 as a proper value.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-05-13 08:31:22 -07:00
York Sun
701e640145 powerpc/mpc85xx: Fix boot_flag for calling board_init_f()
baord_init_f takes one argument, boot_flag. It has not been used for
powerpc, until recently changing to use generic board architecture.
The boot flag is added as a return value from cpu_init_f().

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alexander Graf <agraf@suse.de>
2014-05-13 08:31:22 -07:00
York Sun
bffac7aef5 powerpc/freescale: Change the return value of mac_read_from_eeprom()
The return value has not been checked by its caller, until recent change
of using generic board architecture. The error of this function is not
critical enough to hang the system. Printing the warning message is enough
to catch user's attention. U-boot should continue to boot to give user
a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging
in the board_init_r().

Signed-off-by: York Sun <yorksun@freescale.com>
2014-05-13 08:31:22 -07:00
York Sun
73a56b6e9f powerpc/mpc85xx: Ignore FDT pointer for non-QEMU in cpu_init_early_f()
The pointer of device tree comes from r3 for QEMU. This is not the case
for normal SoCs out of reset. Having gd->fdt_blob as 0 is important for
other functions to detect the non-existence of device tree.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alexander Graf <agraf@suse.de>
2014-05-13 08:31:22 -07:00