ARM: zynq: Add MIO detection code
Add run-time MIO pin detection to get actual pin configuration for specific periphery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
parent
3d456eec43
commit
3cc3fa8672
@ -17,6 +17,26 @@
|
||||
#define SLCR_IDCODE_MASK 0x1F000
|
||||
#define SLCR_IDCODE_SHIFT 12
|
||||
|
||||
/*
|
||||
* zynq_slcr_mio_get_status - Get the status of MIO peripheral.
|
||||
*
|
||||
* @peri_name: Name of the peripheral for checking MIO status
|
||||
* @get_pins: Pointer to array of get pin for this peripheral
|
||||
* @num_pins: Number of pins for this peripheral
|
||||
* @mask: Mask value
|
||||
* @check_val: Required check value to get the status of periph
|
||||
*/
|
||||
struct zynq_slcr_mio_get_status {
|
||||
const char *peri_name;
|
||||
const int *get_pins;
|
||||
int num_pins;
|
||||
u32 mask;
|
||||
u32 check_val;
|
||||
};
|
||||
|
||||
static const struct zynq_slcr_mio_get_status mio_periphs[] = {
|
||||
};
|
||||
|
||||
static int slcr_lock = 1; /* 1 means locked, 0 means unlocked */
|
||||
|
||||
void zynq_slcr_lock(void)
|
||||
@ -120,3 +140,33 @@ u32 zynq_slcr_get_idcode(void)
|
||||
return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >>
|
||||
SLCR_IDCODE_SHIFT;
|
||||
}
|
||||
|
||||
/*
|
||||
* zynq_slcr_get_mio_pin_status - Get the MIO pin status of peripheral.
|
||||
*
|
||||
* @periph: Name of the peripheral
|
||||
*
|
||||
* Returns count to indicate the number of pins configured for the
|
||||
* given @periph.
|
||||
*/
|
||||
int zynq_slcr_get_mio_pin_status(const char *periph)
|
||||
{
|
||||
const struct zynq_slcr_mio_get_status *mio_ptr;
|
||||
int val, i, j;
|
||||
int mio = 0;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) {
|
||||
if (strcmp(periph, mio_periphs[i].peri_name) == 0) {
|
||||
mio_ptr = &mio_periphs[i];
|
||||
for (j = 0; j < mio_ptr->num_pins; j++) {
|
||||
val = readl(&slcr_base->mio_pin
|
||||
[mio_ptr->get_pins[j]]);
|
||||
if ((val & mio_ptr->mask) == mio_ptr->check_val)
|
||||
mio++;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return mio;
|
||||
}
|
||||
|
@ -15,6 +15,7 @@ extern void zynq_slcr_devcfg_disable(void);
|
||||
extern void zynq_slcr_devcfg_enable(void);
|
||||
extern u32 zynq_slcr_get_boot_mode(void);
|
||||
extern u32 zynq_slcr_get_idcode(void);
|
||||
extern int zynq_slcr_get_mio_pin_status(const char *periph);
|
||||
extern void zynq_ddrc_init(void);
|
||||
extern unsigned int zynq_get_silicon_version(void);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user