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clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags

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Add the implementation for the CLK_GATE_SETCLR_INV and
CLK_GATE_NO_SETCLR flags.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
This commit is contained in:
Fabien Parent 2019-03-24 16:46:35 +01:00 committed by Tom Rini
parent b5096f1b6d
commit fe913a8bb6
1 changed files with 12 additions and 0 deletions
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12
drivers/clk/mediatek/clk-mtk.c
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@ -390,6 +390,12 @@ static int mtk_clk_gate_enable(struct clk *clk)
case CLK_GATE_SETCLR:
writel(bit, priv->base + gate->regs->clr_ofs);
break;
case CLK_GATE_SETCLR_INV:
writel(bit, priv->base + gate->regs->set_ofs);
break;
case CLK_GATE_NO_SETCLR:
clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, 0);
break;
case CLK_GATE_NO_SETCLR_INV:
clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, bit);
break;
@ -411,6 +417,12 @@ static int mtk_clk_gate_disable(struct clk *clk)
case CLK_GATE_SETCLR:
writel(bit, priv->base + gate->regs->set_ofs);
break;
case CLK_GATE_SETCLR_INV:
writel(bit, priv->base + gate->regs->clr_ofs);
break;
case CLK_GATE_NO_SETCLR:
clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, bit);
break;
case CLK_GATE_NO_SETCLR_INV:
clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, 0);
break;