powerpc: Enable device tree support for T1042D4RDB
Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0+
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dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
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dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
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dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
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dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb
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dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb
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17
arch/powerpc/dts/t1042d4rdb.dts
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arch/powerpc/dts/t1042d4rdb.dts
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* T1042D4RDB Device Tree Source
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*
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* Copyright 2013 - 2015 Freescale Semiconductor Inc.
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* Copyright 2019 NXP
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*/
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/include/ "t104x.dtsi"
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/ {
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model = "fsl,T1042D4RDB";
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compatible = "fsl,T1042D4RDB";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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};
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62
arch/powerpc/dts/t104x.dtsi
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arch/powerpc/dts/t104x.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* T104X Silicon/SoC Device Tree Source (pre include)
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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* Copyright 2019 NXP
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*/
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/dts-v1/;
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/include/ "e5500_power_isa.dtsi"
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: PowerPC,e5500@0 {
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device_type = "cpu";
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reg = <0>;
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#cooling-cells = <2>;
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};
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cpu1: PowerPC,e5500@1 {
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device_type = "cpu";
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reg = <1>;
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#cooling-cells = <2>;
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};
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cpu2: PowerPC,e5500@2 {
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device_type = "cpu";
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reg = <2>;
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#cooling-cells = <2>;
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};
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cpu3: PowerPC,e5500@3 {
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device_type = "cpu";
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reg = <3>;
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#cooling-cells = <2>;
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};
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};
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soc: soc@ffe000000 {
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ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
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reg = <0xf 0xfe000000 0 0x00001000>;
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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mpic: pic@40000 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <4>;
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reg = <0x40000 0x40000>;
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compatible = "fsl,mpic", "chrp,open-pic";
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device_type = "open-pic";
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clock-frequency = <0x0>;
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};
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};
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};
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@ -365,3 +365,22 @@ to
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2. SPI does not support flush so remove flush from pbl, make changes in
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tools/pblimage.c file, Update value of pbl_end_cmd[0] = 0x09138000
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with 0x091380c0
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Device tree support and how to enable it for different configs
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--------------------------------------------------------------
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Device tree support is available for t1042d4rdb for below mentioned boot,
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1. NOR Boot
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2. NAND Boot
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3. SD Boot
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4. SPIFLASH Boot
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To enable device tree support for other boot, below configs need to be
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enabled in relative defconfig file,
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1. CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" (Change default device tree name if required)
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2. CONFIG_OF_CONTROL
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3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
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CONFIG_RESET_VECTOR_ADDRESS - 0xffc
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If device tree support is enabled in defconfig,
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1. use 'u-boot-with-dtb.bin' for NOR boot.
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2. use 'u-boot-with-spl-pbl.bin' for other boot.
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@ -44,6 +44,8 @@ CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_FSL_CAAM=y
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CONFIG_FSL_ESDHC=y
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@ -70,4 +72,3 @@ CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_VIDEO=y
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CONFIG_CFB_CONSOLE_ANSI=y
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CONFIG_OF_LIBFDT=y
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@ -42,6 +42,8 @@ CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_FSL_CAAM=y
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CONFIG_FSL_ESDHC=y
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@ -67,4 +69,3 @@ CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_VIDEO=y
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CONFIG_CFB_CONSOLE_ANSI=y
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CONFIG_OF_LIBFDT=y
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@ -43,6 +43,8 @@ CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_FSL_CAAM=y
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CONFIG_FSL_ESDHC=y
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@ -68,4 +70,3 @@ CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_VIDEO=y
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CONFIG_CFB_CONSOLE_ANSI=y
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CONFIG_OF_LIBFDT=y
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@ -2,6 +2,7 @@ CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xEFF40000
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CONFIG_MPC85xx=y
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CONFIG_TARGET_T1042D4RDB=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -28,6 +29,8 @@ CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_FSL_CAAM=y
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CONFIG_FSL_ESDHC=y
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@ -53,4 +56,3 @@ CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_VIDEO=y
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CONFIG_CFB_CONSOLE_ANSI=y
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CONFIG_OF_LIBFDT=y
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