armv8: ls1046ardb: Add RDIMM support
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM MTA18ASF2G72PDZ and MTA9ASF1G72PZ. Signed-off-by: York Sun <york.sun@nxp.com>
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@ -29,7 +29,10 @@ void fsl_ddr_board_options(memctl_options_t *popts,
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if (!pdimm->n_ranks)
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return;
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pbsp = udimms[0];
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if (popts->registered_dimm_en)
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pbsp = rdimms[0];
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else
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pbsp = udimms[0];
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/* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr
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* freqency and n_banks specified in board_specific_parameters table.
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@ -66,8 +69,6 @@ found:
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pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb);
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popts->data_bus_width = 0; /* 64-bit data bus */
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popts->otf_burst_chop_en = 0;
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popts->burst_length = DDR_BL8;
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popts->bstopre = 0; /* enable auto precharge */
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/*
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@ -94,7 +95,7 @@ found:
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DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x70;
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popts->cpo_sample = 0x61;
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}
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int fsl_initdram(void)
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@ -41,4 +41,23 @@ static const struct board_specific_parameters *udimms[] = {
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udimm0,
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};
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static const struct board_specific_parameters rdimm0[] = {
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/*
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* memory controller 0
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* num| hi| rank| clk| wrlvl | wrlvl | wrlvl
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* ranks| mhz| GB |adjst| start | ctl2 | ctl3
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*/
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{2, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,},
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{2, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,},
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{2, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,},
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{1, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,},
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{1, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,},
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{1, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,},
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{}
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};
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static const struct board_specific_parameters *rdimms[] = {
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rdimm0,
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};
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#endif
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