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rk3399: Add ROC-RK3399-PC Mezzanine board

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Add Firefly ROC-RK3399-PC Mezzanine board which is an
extension board on top of roc-rk3399-pc.

Will drop the separate defconfig file, once we support
the board detection at runtime.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Suniel Mahesh 2020-04-28 15:30:19 +05:30 committed by Kever Yang
parent fb3f5cdbf1
commit f417d71ea7
3 changed files with 75 additions and 0 deletions
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6
arch/arm/dts/rk3399-roc-pc-mezzanine-u-boot.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2020 Amarula Solutions(India)
*/
#include "rk3399-roc-pc-u-boot.dtsi"

2
board/firefly/roc-pc-rk3399/MAINTAINERS
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@ -1,6 +1,8 @@
ROC-RK3399-PC
M: Levin Du <djw@t-chip.com.cn>
M: Suniel Mahesh <sunil@amarulasolutions.com>
S: Maintained
F: board/firefly/roc-pc-rk3399
F: include/configs/roc-pc-rk3399.h
F: configs/roc-pc-rk3399_defconfig
F: configs/roc-pc-mezzanine-rk3399_defconfig

67
configs/roc-pc-mezzanine-rk3399_defconfig Normal file
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CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROC_PC_RK3399=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_TPL_GPIO_SUPPORT=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y