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arc: cache: Add required NOPs after invalidation of instruction cache

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As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
This commit is contained in:
Alexey Brodkin 2017-11-17 16:02:17 +03:00
parent d764a20f2b
commit f2a226780f
1 changed files with 7 additions and 0 deletions
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7
arch/arc/lib/cache.c
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@ -278,6 +278,13 @@ void invalidate_icache_all(void)
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
if (icache_status()) {
write_aux_reg(ARC_AUX_IC_IVIC, 1);
/*
* As per ARC HS databook (see chapter 5.3.3.2)
* it is required to add 3 NOPs after each write to IC_IVIC.
*/
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
}