watchdog: Add a driver for the Apple watchdog
This driver supports the watchdog timer found on Apple's M1 SoC. On systems that use these SoC, the watchdog timer is the primary way to reboot the system. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Sven Peter <sven@svenpeter.dev> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-on: Apple M1 Macbook Tested-by: Simon Glass <sjg@chromium.org>
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@ -116,6 +116,7 @@ F: arch/arm/mach-apple/
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F: configs/apple_m1_defconfig
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F: drivers/iommu/apple_dart.c
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F: drivers/pinctrl/pinctrl-apple.c
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F: drivers/watchdog/apple_wdt.c
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F: include/configs/apple.h
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ARM
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@ -81,6 +81,15 @@ config WDT
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What exactly happens when the timer expires is up to a particular
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device/driver.
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config WDT_APPLE
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bool "Apple watchdog timer support"
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depends on WDT
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default y if ARCH_APPLE
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help
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Enable support for the watchdog timer on Apple SoCs.
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The watchdog will perform a full SoC reset resulting in a
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reboot of the entire system.
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config WDT_ARMADA_37XX
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bool "Marvell Armada 37xx watchdog timer support"
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depends on WDT && ARMADA_3700
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@ -17,6 +17,7 @@ obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
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obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
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obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
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obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
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obj-$(CONFIG_WDT_APPLE) += apple_wdt.o
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obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
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obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
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obj-$(CONFIG_WDT_AST2600) += ast2600_wdt.o
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115
drivers/watchdog/apple_wdt.c
Normal file
115
drivers/watchdog/apple_wdt.c
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@ -0,0 +1,115 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
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*/
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#include <clk.h>
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#include <dm.h>
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#include <wdt.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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#define APPLE_WDT_CUR_TIME 0x10
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#define APPLE_WDT_BARK_TIME 0x14
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#define APPLE_WDT_CTRL 0x1c
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#define APPLE_WDT_CTRL_RESET_EN BIT(2)
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struct apple_wdt_priv {
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void *base;
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ulong clk_rate;
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};
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static int apple_wdt_reset(struct udevice *dev)
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{
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struct apple_wdt_priv *priv = dev_get_priv(dev);
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writel(0, priv->base + APPLE_WDT_CUR_TIME);
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return 0;
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}
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static int apple_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
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{
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struct apple_wdt_priv *priv = dev_get_priv(dev);
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u64 timeout;
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timeout = (timeout_ms * priv->clk_rate) / 1000;
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if (timeout > U32_MAX)
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return -EINVAL;
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writel(0, priv->base + APPLE_WDT_CUR_TIME);
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writel(timeout, priv->base + APPLE_WDT_BARK_TIME);
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writel(APPLE_WDT_CTRL_RESET_EN, priv->base + APPLE_WDT_CTRL);
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return 0;
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}
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static int apple_wdt_stop(struct udevice *dev)
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{
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struct apple_wdt_priv *priv = dev_get_priv(dev);
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writel(0, priv->base + APPLE_WDT_CTRL);
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return 0;
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}
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static int apple_wdt_expire_now(struct udevice *dev, ulong flags)
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{
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int ret;
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ret = apple_wdt_start(dev, 0, flags);
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if (ret)
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return ret;
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/*
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* It can take up to 25ms until the SoC actually resets, so
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* wait 50ms just to be sure.
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*/
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mdelay(50);
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return 0;
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}
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static const struct wdt_ops apple_wdt_ops = {
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.reset = apple_wdt_reset,
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.start = apple_wdt_start,
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.stop = apple_wdt_stop,
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.expire_now = apple_wdt_expire_now,
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};
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static const struct udevice_id apple_wdt_ids[] = {
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{ .compatible = "apple,wdt" },
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{ /* sentinel */ }
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};
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static int apple_wdt_probe(struct udevice *dev)
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{
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struct apple_wdt_priv *priv = dev_get_priv(dev);
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struct clk clk;
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int ret;
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priv->base = dev_read_addr_ptr(dev);
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if (!priv->base)
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return -EINVAL;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret)
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return ret;
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ret = clk_enable(&clk);
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if (ret)
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return ret;
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priv->clk_rate = clk_get_rate(&clk);
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return 0;
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}
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U_BOOT_DRIVER(apple_wdt) = {
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.name = "apple_wdt",
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.id = UCLASS_WDT,
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.of_match = apple_wdt_ids,
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.priv_auto = sizeof(struct apple_wdt_priv),
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.probe = apple_wdt_probe,
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.ops = &apple_wdt_ops,
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};
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