leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arm: mvebu: a38x: serdes: Remove duplicate macro SOC_CTRL_REG

Browse Source 
SoC Control 1 Register (offset 0x18204) is already defined by macro
SOC_CONTROL_REG1.

Use macro SOC_CONTROL_REG1 instead of macro SOC_CTRL_REG in ctrl_pex.c
code and remove the other definition.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Pali Rohár 2021-09-24 22:59:15 +02:00 committed by Stefan Roese
parent cfd4a8ad0f
commit eb5d31645e
2 changed files with 2 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
View File

@ -49,7 +49,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
reg_write(PEX_CAPABILITIES_REG(pex_idx), tmp);
}
tmp = reg_read(SOC_CTRL_REG);
tmp = reg_read(SOC_CONTROL_REG1);
tmp &= ~0x03;
for (idx = 0; idx < count; idx++) {
@ -79,7 +79,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
}
}
reg_write(SOC_CTRL_REG, tmp);
reg_write(SOC_CONTROL_REG1, tmp);
/* Support gen1/gen2 */
DEBUG_INIT_FULL_S("Support gen1/gen2\n");

4
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
View File

@ -14,10 +14,6 @@
/* PCI Express Control and Status Registers */
#define MAX_PEX_BUSSES 256
#define MISC_REGS_OFFSET 0x18200
#define MV_MISC_REGS_BASE MISC_REGS_OFFSET
#define SOC_CTRL_REG (MV_MISC_REGS_BASE + 0x4)
#define PEX_IF_REGS_OFFSET(if) ((if) > 0 ? \
(0x40000 + ((if) - 1) * 0x4000) : \
0x80000)