[MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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Shinya Kuribayashi
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1a3adac81c
commit
e2ad842662
@@ -66,10 +66,10 @@ void flush_cache(ulong start_addr, ulong size)
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void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
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{
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write_32bit_cp0_register(CP0_ENTRYLO0, low0);
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write_32bit_cp0_register(CP0_PAGEMASK, pagemask);
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write_32bit_cp0_register(CP0_ENTRYLO1, low1);
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write_32bit_cp0_register(CP0_ENTRYHI, hi);
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write_32bit_cp0_register(CP0_INDEX, index);
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write_c0_entrylo0(low0);
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write_c0_pagemask(pagemask);
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write_c0_entrylo1(low1);
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write_c0_entryhi(hi);
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write_c0_index(index);
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tlb_write_indexed();
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}
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