Merge git://git.denx.de/u-boot-mpc83xx
- Update MPC83xx platform support to current best practices, etc.
This commit is contained in:
Tom Rini
@@ -1,7 +1,80 @@
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CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xFE000000
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CONFIG_SYS_CLK_FREQ=33333333
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CONFIG_MPC83xx=y
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CONFIG_TARGET_MPC8308RDB=y
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CONFIG_SYSTEM_PLL_VCO_DIV_2=y
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CONFIG_SYSTEM_PLL_FACTOR_4_1=y
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CONFIG_CORE_PLL_RATIO_3_1=y
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CONFIG_BOOT_MEMORY_SPACE_LOW=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_TSEC1_MODE_RGMII=y
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CONFIG_TSEC2_MODE_RGMII=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="DDR"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_128_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="IMMRBAR"
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CONFIG_BAT1_BASE=0xE0000000
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CONFIG_BAT1_LENGTH_8_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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CONFIG_BAT1_ICACHE_INHIBITED=y
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CONFIG_BAT1_ICACHE_GUARDED=y
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CONFIG_BAT1_DCACHE_INHIBITED=y
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CONFIG_BAT1_DCACHE_GUARDED=y
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CONFIG_BAT1_USER_MODE_VALID=y
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CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT2=y
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CONFIG_BAT2_NAME="FLASH"
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CONFIG_BAT2_BASE=0xFE000000
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CONFIG_BAT2_LENGTH_8_MBYTES=y
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CONFIG_BAT2_ACCESS_RW=y
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CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT2_DCACHE_INHIBITED=y
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CONFIG_BAT2_DCACHE_GUARDED=y
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CONFIG_BAT2_USER_MODE_VALID=y
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CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT3=y
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CONFIG_BAT3_NAME="STACK_IN_DCACHE"
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CONFIG_BAT3_BASE=0xE6000000
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CONFIG_BAT3_ACCESS_RW=y
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CONFIG_BAT3_USER_MODE_VALID=y
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CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
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CONFIG_LBLAW0=y
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CONFIG_LBLAW0_BASE=0xFE000000
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CONFIG_LBLAW0_NAME="FLASH"
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CONFIG_LBLAW0_LENGTH_8_MBYTES=y
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CONFIG_LBLAW1=y
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CONFIG_LBLAW1_BASE=0xE0600000
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CONFIG_LBLAW1_NAME="NAND"
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CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_LBLAW2=y
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CONFIG_LBLAW2_BASE=0xF0000000
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CONFIG_LBLAW2_NAME="VSC7385"
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CONFIG_LBLAW2_LENGTH_128_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
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CONFIG_SICR_GPIO_A_TSEC2=y
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CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
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CONFIG_SICR_IEEE1588_A_GPIO=y
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CONFIG_SICR_GTM_GPIO=y
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CONFIG_SICR_GPIOSEL_IEEE1588=y
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CONFIG_SICR_TMSOBI1_2_5_V=y
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CONFIG_SICR_TMSOBI2_2_5_V=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_SPCR_TSECEP_3=y
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CONFIG_LCRR_DBYP_PLL_BYPASSED=y
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CONFIG_LCRR_CLKDIV_2=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@@ -30,3 +103,41 @@ CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_SYS_NS16550=y
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CONFIG_OF_LIBFDT=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xFE000000
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CONFIG_BR0_MACHINE_GPCM=y
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CONFIG_BR0_PORTSIZE_16BIT=y
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CONFIG_OR0_AM_8_MBYTES=y
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CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR0_CSNT_EARLIER=y
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CONFIG_OR0_SCY_15=y
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CONFIG_OR0_XACS_EXTENDED=y
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CONFIG_OR0_XAM_SET=y
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CONFIG_OR0_TRLX_RELAXED=y
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CONFIG_OR0_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR1_OR1=y
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CONFIG_BR1_OR1_NAME="NAND"
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CONFIG_BR1_OR1_BASE=0xE0600000
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CONFIG_BR1_ERRORCHECKING_BOTH=y
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CONFIG_BR1_MACHINE_FCM=y
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CONFIG_BR1_PORTSIZE_8BIT=y
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CONFIG_OR1_AM_32_KBYTES=y
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CONFIG_OR1_SCY_1=y
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CONFIG_OR1_TRLX_RELAXED=y
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CONFIG_OR1_CHT_TWO_CLOCK=y
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CONFIG_OR1_CSCT_8_CYCLE=y
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CONFIG_OR1_CST_ONE_CLOCK=y
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CONFIG_OR1_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR2_OR2=y
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CONFIG_BR2_OR2_NAME="VSC7385_BASE"
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CONFIG_BR2_OR2_BASE=0xF0000000
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CONFIG_BR2_MACHINE_GPCM=y
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CONFIG_BR2_PORTSIZE_8BIT=y
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CONFIG_OR2_AM_128_KBYTES=y
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CONFIG_OR2_CSNT_EARLIER=y
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CONFIG_OR2_SCY_15=y
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CONFIG_OR2_SETA_EXTERNAL=y
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CONFIG_OR2_XACS_EXTENDED=y
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CONFIG_OR2_TRLX_RELAXED=y
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CONFIG_OR2_EHTR_8_CYCLE=y
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@@ -1,7 +1,84 @@
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CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xFE000000
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CONFIG_SYS_CLK_FREQ=33333333
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CONFIG_MPC83xx=y
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CONFIG_TARGET_MPC8313ERDB=y
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CONFIG_HIGH_BATS=y
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CONFIG_TARGET_MPC8313ERDB_NOR=y
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CONFIG_SYSTEM_PLL_FACTOR_5_1=y
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CONFIG_CORE_PLL_RATIO_2_1=y
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CONFIG_PCI_HOST_MODE_ENABLE=y
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CONFIG_PCI_INT_ARBITER1_ENABLE=y
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CONFIG_BOOT_MEMORY_SPACE_LOW=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_TSEC1_MODE_RGMII=y
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CONFIG_TSEC2_MODE_RGMII=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="DDR"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_256_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="PCI1_MEM"
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CONFIG_BAT1_BASE=0x80000000
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CONFIG_BAT1_LENGTH_256_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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CONFIG_BAT1_USER_MODE_VALID=y
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CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT2=y
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CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
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CONFIG_BAT2_BASE=0x90000000
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CONFIG_BAT2_LENGTH_256_MBYTES=y
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CONFIG_BAT2_ACCESS_RW=y
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CONFIG_BAT2_ICACHE_INHIBITED=y
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CONFIG_BAT2_ICACHE_GUARDED=y
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CONFIG_BAT2_DCACHE_INHIBITED=y
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CONFIG_BAT2_DCACHE_GUARDED=y
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CONFIG_BAT2_USER_MODE_VALID=y
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CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT5=y
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CONFIG_BAT5_NAME="IMMR"
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CONFIG_BAT5_BASE=0xE0000000
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CONFIG_BAT5_LENGTH_256_MBYTES=y
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CONFIG_BAT5_ACCESS_RW=y
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CONFIG_BAT5_ICACHE_INHIBITED=y
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CONFIG_BAT5_ICACHE_GUARDED=y
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CONFIG_BAT5_DCACHE_INHIBITED=y
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CONFIG_BAT5_DCACHE_GUARDED=y
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CONFIG_BAT5_USER_MODE_VALID=y
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CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT6=y
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CONFIG_BAT6_NAME="STACK_IN_DCACHE"
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CONFIG_BAT6_BASE=0xF0000000
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CONFIG_BAT6_LENGTH_256_MBYTES=y
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CONFIG_BAT6_ACCESS_RW=y
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CONFIG_BAT6_ICACHE_GUARDED=y
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CONFIG_BAT6_DCACHE_GUARDED=y
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CONFIG_BAT6_USER_MODE_VALID=y
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CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
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CONFIG_LBLAW0=y
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CONFIG_LBLAW0_BASE=0xFE000000
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CONFIG_LBLAW0_NAME="FLASH"
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CONFIG_LBLAW0_LENGTH_16_MBYTES=y
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CONFIG_LBLAW1=y
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CONFIG_LBLAW1_BASE=0xE2800000
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CONFIG_LBLAW1_NAME="NAND"
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CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_LBLAW2=y
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CONFIG_LBLAW2_BASE=0xF0000000
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CONFIG_LBLAW2_NAME="VSC7385"
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CONFIG_LBLAW2_LENGTH_128_KBYTES=y
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CONFIG_LBLAW3=y
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CONFIG_LBLAW3_BASE=0xFA000000
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CONFIG_LBLAW3_NAME="BCSR"
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CONFIG_LBLAW3_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
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@@ -32,3 +109,55 @@ CONFIG_PHY_MARVELL=y
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CONFIG_TSEC_ENET=y
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CONFIG_SYS_NS16550=y
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CONFIG_OF_LIBFDT=y
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CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xFE000000
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CONFIG_BR0_MACHINE_GPCM=y
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CONFIG_BR0_PORTSIZE_16BIT=y
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CONFIG_OR0_AM_8_MBYTES=y
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CONFIG_OR0_EAD_EXTRA=y
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CONFIG_OR0_SCY_9=y
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CONFIG_OR0_XACS_EXTENDED=y
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CONFIG_OR0_EHTR_1_CYCLE=y
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CONFIG_ELBC_BR1_OR1=y
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CONFIG_BR1_OR1_NAME="NAND"
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CONFIG_BR1_OR1_BASE=0xE2800000
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CONFIG_BR1_ERRORCHECKING_BOTH=y
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CONFIG_BR1_MACHINE_FCM=y
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CONFIG_BR1_PORTSIZE_8BIT=y
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CONFIG_OR1_AM_32_KBYTES=y
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CONFIG_OR1_SCY_1=y
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CONFIG_OR1_TRLX_RELAXED=y
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CONFIG_OR1_CHT_TWO_CLOCK=y
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CONFIG_OR1_CSCT_8_CYCLE=y
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CONFIG_OR1_CST_ONE_CLOCK=y
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CONFIG_OR1_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR3_OR3=y
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CONFIG_BR3_OR3_NAME="BCSR"
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CONFIG_BR3_OR3_BASE=0xFA000000
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CONFIG_BR3_MACHINE_GPCM=y
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CONFIG_BR3_PORTSIZE_8BIT=y
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CONFIG_OR3_AM_32_KBYTES=y
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CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR3_CSNT_EARLIER=y
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CONFIG_OR3_EAD_EXTRA=y
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CONFIG_OR3_SCY_15=y
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CONFIG_OR3_XACS_EXTENDED=y
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CONFIG_OR3_TRLX_RELAXED=y
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CONFIG_OR3_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR2_OR2=y
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CONFIG_BR2_OR2_NAME="VSC7385"
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CONFIG_BR2_OR2_BASE=0xF0000000
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CONFIG_BR2_MACHINE_GPCM=y
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CONFIG_BR2_PORTSIZE_8BIT=y
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CONFIG_OR2_AM_128_KBYTES=y
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CONFIG_OR2_CSNT_EARLIER=y
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CONFIG_OR2_EAD_EXTRA=y
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CONFIG_OR2_SCY_15=y
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CONFIG_OR2_SETA_EXTERNAL=y
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CONFIG_OR2_XACS_EXTENDED=y
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CONFIG_OR2_TRLX_RELAXED=y
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CONFIG_OR2_EHTR_8_CYCLE=y
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CONFIG_LCRR_EADC_1=y
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CONFIG_LCRR_CLKDIV_4=y
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@@ -1,7 +1,83 @@
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CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xFE000000
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CONFIG_SYS_CLK_FREQ=66666667
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CONFIG_MPC83xx=y
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CONFIG_TARGET_MPC8313ERDB=y
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CONFIG_HIGH_BATS=y
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CONFIG_TARGET_MPC8313ERDB_NOR=y
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CONFIG_CORE_PLL_RATIO_2_1=y
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CONFIG_PCI_HOST_MODE_ENABLE=y
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CONFIG_PCI_INT_ARBITER1_ENABLE=y
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CONFIG_BOOT_MEMORY_SPACE_LOW=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_TSEC1_MODE_RGMII=y
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CONFIG_TSEC2_MODE_RGMII=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="DDR"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_256_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="PCI1_MEM"
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CONFIG_BAT1_BASE=0x80000000
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CONFIG_BAT1_LENGTH_256_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
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||||
CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
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CONFIG_BAT2_BASE=0x90000000
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CONFIG_BAT2_LENGTH_256_MBYTES=y
|
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CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
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CONFIG_BAT2_ICACHE_GUARDED=y
|
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CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2800000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
|
||||
@@ -32,3 +108,55 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE2800000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -2,8 +2,85 @@ CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00100000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8313ERDB=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8313ERDB_NAND=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_5_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_SMALL=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2800000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
|
||||
@@ -40,3 +117,55 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_0=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="NAND"
|
||||
CONFIG_BR0_OR0_BASE=0xE2800000
|
||||
CONFIG_BR0_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR0_MACHINE_FCM=y
|
||||
CONFIG_BR0_PORTSIZE_8BIT=y
|
||||
CONFIG_OR0_AM_32_KBYTES=y
|
||||
CONFIG_OR0_SCY_1=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR0_CSCT_8_CYCLE=y
|
||||
CONFIG_OR0_CST_ONE_CLOCK=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FLASH"
|
||||
CONFIG_BR1_OR1_BASE=0xFE000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_8_MBYTES=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_9=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -2,8 +2,84 @@ CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00100000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SYS_CLK_FREQ=66666667
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8313ERDB=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8313ERDB_NAND=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_SMALL=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2800000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
|
||||
@@ -40,3 +116,55 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_0=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="NAND"
|
||||
CONFIG_BR0_OR0_BASE=0xE2800000
|
||||
CONFIG_BR0_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR0_MACHINE_FCM=y
|
||||
CONFIG_BR0_PORTSIZE_8BIT=y
|
||||
CONFIG_OR0_AM_32_KBYTES=y
|
||||
CONFIG_OR0_SCY_1=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR0_CSCT_8_CYCLE=y
|
||||
CONFIG_OR0_CST_ONE_CLOCK=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FLASH"
|
||||
CONFIG_BR1_OR1_BASE=0xFE000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_8_MBYTES=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_9=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,7 +1,88 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666667
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8315ERDB=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="PCI_MEM_PHYS"
|
||||
CONFIG_BAT4_BASE=0x80000000
|
||||
CONFIG_BAT4_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="PCI_MMIO_PHYS"
|
||||
CONFIG_BAT5_BASE=0x90000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -35,3 +116,32 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,81 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666667
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8323ERDB=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="PCI_MEM_PHYS"
|
||||
CONFIG_BAT5_BASE=0x80000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="PCI1_MMIO_PHYS"
|
||||
CONFIG_BAT6_BASE=0x90000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_OPT_SPEC_READ=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -20,3 +94,19 @@ CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,76 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC832XEMDS=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="BCSR"
|
||||
CONFIG_BAT2_BASE=0xF8000000
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xFE000000
|
||||
CONFIG_BAT3_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
|
||||
@@ -21,3 +90,58 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,96 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC832XEMDS=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="BCSR"
|
||||
CONFIG_BAT2_BASE=0xF8000000
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xFE000000
|
||||
CONFIG_BAT3_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="PCI_MEM_PHYS"
|
||||
CONFIG_BAT6_BASE=0x80000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="PCI1_MMIO_PHYS"
|
||||
CONFIG_BAT7_BASE=0x90000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1"
|
||||
@@ -21,3 +110,58 @@ CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,96 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC832XEMDS=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="BCSR"
|
||||
CONFIG_BAT2_BASE=0xF8000000
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xFE000000
|
||||
CONFIG_BAT3_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="PCI_MEM_PHYS"
|
||||
CONFIG_BAT6_BASE=0x80000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="PCI1_MMIO_PHYS"
|
||||
CONFIG_BAT7_BASE=0x90000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1"
|
||||
@@ -21,3 +110,58 @@ CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,93 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC832XEMDS=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="BCSR"
|
||||
CONFIG_BAT2_BASE=0xF8000000
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xFE000000
|
||||
CONFIG_BAT3_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="PCI_MEM_PHYS"
|
||||
CONFIG_BAT6_BASE=0x80000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="PCI1_MMIO_PHYS"
|
||||
CONFIG_BAT7_BASE=0x90000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
|
||||
@@ -21,3 +107,58 @@ CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,76 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC832XEMDS=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="BCSR"
|
||||
CONFIG_BAT2_BASE=0xF8000000
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xFE000000
|
||||
CONFIG_BAT3_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -20,3 +89,58 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
108
configs/MPC8349EMDS_PCI64_defconfig
Normal file
108
configs/MPC8349EMDS_PCI64_defconfig
Normal file
@@ -0,0 +1,108 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349EMDS=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_64BIT_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
117
configs/MPC8349EMDS_SDRAM_defconfig
Normal file
117
configs/MPC8349EMDS_SDRAM_defconfig
Normal file
@@ -0,0 +1,117 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349EMDS_SDRAM=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="SDRAM"
|
||||
CONFIG_LBLAW2_LENGTH_64_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="SDRAM"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_PORTSIZE_32BIT=y
|
||||
CONFIG_BR2_MACHINE_SDRAM=y
|
||||
CONFIG_OR2_COLS_9=y
|
||||
CONFIG_OR2_ROWS_13=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_PCI_ONE_PCI1=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MPC8XXX_SPI=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
108
configs/MPC8349EMDS_SLAVE_defconfig
Normal file
108
configs/MPC8349EMDS_SLAVE_defconfig
Normal file
@@ -0,0 +1,108 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666666
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349EMDS=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_64BIT_MODE_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_PCI_ONE_PCI1=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
@@ -1,7 +1,66 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349EMDS=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_PCI_ONE_PCI1=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -24,3 +83,29 @@ CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MPC8XXX_SPI=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,9 +1,111 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666666
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349ITX=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="PCI2_MEM"
|
||||
CONFIG_BAT3_BASE=0xA0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="PCI2_MMIO"
|
||||
CONFIG_BAT4_BASE=0xB0000000
|
||||
CONFIG_BAT4_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT4_ICACHE_GUARDED=y
|
||||
CONFIG_BAT4_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="VSC7385"
|
||||
CONFIG_LBLAW1_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF0000000
|
||||
CONFIG_LBLAW3_NAME="CF"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitxgp:eth0:off console=ttyS0,115200"
|
||||
@@ -29,3 +131,52 @@ CONFIG_MII=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,10 +1,110 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666666
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349ITX=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="PCI2_MEM"
|
||||
CONFIG_BAT3_BASE=0xA0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="PCI2_MMIO"
|
||||
CONFIG_BAT4_BASE=0xB0000000
|
||||
CONFIG_BAT4_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT4_ICACHE_GUARDED=y
|
||||
CONFIG_BAT4_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="VSC7385"
|
||||
CONFIG_LBLAW1_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF0000000
|
||||
CONFIG_LBLAW3_NAME="CF"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200"
|
||||
@@ -39,3 +139,52 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,10 +1,109 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFEF00000
|
||||
CONFIG_SYS_CLK_FREQ=66666666
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8349ITX=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="PCI2_MEM"
|
||||
CONFIG_BAT3_BASE=0xA0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="PCI2_MMIO"
|
||||
CONFIG_BAT4_BASE=0xB0000000
|
||||
CONFIG_BAT4_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT4_ICACHE_GUARDED=y
|
||||
CONFIG_BAT4_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="VSC7385"
|
||||
CONFIG_LBLAW1_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF0000000
|
||||
CONFIG_LBLAW3_NAME="CF"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200"
|
||||
@@ -39,3 +138,52 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,7 +1,112 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC837XEMDS=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_6_1=y
|
||||
CONFIG_CORE_PLL_RATIO_15_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT1_BASE=0x10000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="IMMR"
|
||||
CONFIG_BAT2_BASE=0xE0000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="BCSR"
|
||||
CONFIG_BAT3_BASE=0xF8000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT3_ICACHE_GUARDED=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="FLASH"
|
||||
CONFIG_BAT4_BASE=0xFE000000
|
||||
CONFIG_BAT4_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="PCI_MEM"
|
||||
CONFIG_BAT6_BASE=0x80000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="PCI_MMIO"
|
||||
CONFIG_BAT7_BASE=0x90000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE0600000
|
||||
CONFIG_LBLAW3_NAME="NAND"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -32,3 +137,46 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
||||
135
configs/MPC837XEMDS_SLAVE_defconfig
Normal file
135
configs/MPC837XEMDS_SLAVE_defconfig
Normal file
@@ -0,0 +1,135 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC837XEMDS=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_6_1=y
|
||||
CONFIG_CORE_PLL_RATIO_15_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT1_BASE=0x10000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="IMMR"
|
||||
CONFIG_BAT2_BASE=0xE0000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="BCSR"
|
||||
CONFIG_BAT3_BASE=0xF8000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT3_ICACHE_GUARDED=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE0600000
|
||||
CONFIG_LBLAW3_NAME="NAND"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_NAND=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
@@ -1,7 +1,92 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC837XEMDS=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_6_1=y
|
||||
CONFIG_CORE_PLL_RATIO_15_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT1_BASE=0x10000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="IMMR"
|
||||
CONFIG_BAT2_BASE=0xE0000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="BCSR"
|
||||
CONFIG_BAT3_BASE=0xF8000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT3_ICACHE_GUARDED=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="FLASH"
|
||||
CONFIG_BAT4_BASE=0xFE000000
|
||||
CONFIG_BAT4_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF8000000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE0600000
|
||||
CONFIG_LBLAW3_NAME="NAND"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -28,3 +113,46 @@ CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
||||
136
configs/MPC837XERDB_SLAVE_defconfig
Normal file
136
configs/MPC837XERDB_SLAVE_defconfig
Normal file
@@ -0,0 +1,136 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666667
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC837XERDB=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_5_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT1_BASE=0x10000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="IMMR"
|
||||
CONFIG_BAT2_BASE=0xE0000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="L2_SWITCH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT3_ICACHE_GUARDED=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_SATA=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_FSL_SATA=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
@@ -1,9 +1,115 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=66666667
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC837XERDB=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_5_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT1_BASE=0x10000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="IMMR"
|
||||
CONFIG_BAT2_BASE=0xE0000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="L2_SWITCH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT3_ICACHE_GUARDED=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="FLASH"
|
||||
CONFIG_BAT4_BASE=0xFE000000
|
||||
CONFIG_BAT4_LENGTH_32_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="STACH_IN_DCACHE"
|
||||
CONFIG_BAT5_BASE=0xE6000000
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="PCI_MEM"
|
||||
CONFIG_BAT6_BASE=0x80000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="PCI_MMIO"
|
||||
CONFIG_BAT7_BASE=0x90000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCIE"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
@@ -33,3 +139,41 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xfff00000
|
||||
CONFIG_MPC86xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8610HPCD=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xeff00000
|
||||
CONFIG_MPC86xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8641HPCN=y
|
||||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xeff00000
|
||||
CONFIG_MPC86xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_MPC8641HPCN=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
|
||||
@@ -1,7 +1,110 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x80000000
|
||||
CONFIG_SYS_CLK_FREQ=66666000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_TQM834X=y
|
||||
CONFIG_SYS_IMMR=0xff400000
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT1_BASE=0x10000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT2_BASE=0x20000000
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="PCI_MEM_BASE"
|
||||
CONFIG_BAT3_BASE=0x90000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="PCI_MMIO"
|
||||
CONFIG_BAT4_BASE=0xA0000000
|
||||
CONFIG_BAT4_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_ICACHE_GUARDED=y
|
||||
CONFIG_BAT4_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT4_DCACHE_GUARDED=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="PCI_IO"
|
||||
CONFIG_BAT5_BASE=0xE2000000
|
||||
CONFIG_BAT5_LENGTH_16_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="IMMR"
|
||||
CONFIG_BAT6_BASE=0xFF400000
|
||||
CONFIG_BAT6_LENGTH_1_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="FLASH"
|
||||
CONFIG_BAT7_BASE=0x80000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0x80000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_1_GBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
# CONFIG_LBLAW1_ENABLE is not set
|
||||
CONFIG_LBLAW2=y
|
||||
# CONFIG_LBLAW2_ENABLE is not set
|
||||
CONFIG_LBLAW3=y
|
||||
# CONFIG_LBLAW3_ENABLE is not set
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -34,3 +137,15 @@ CONFIG_MII=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0x80000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_32BIT=y
|
||||
CONFIG_OR0_AM_1_GBYTES=y
|
||||
CONFIG_OR0_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
||||
@@ -1,10 +1,81 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF00000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_VME8349=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_CADDY2=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR_PCIIO"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="UNKNOWN"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFFC00000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_4_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF0000000
|
||||
CONFIG_LBLAW1_NAME="WINDOW1"
|
||||
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CADDY2"
|
||||
CONFIG_BOOTDELAY=6
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
@@ -24,3 +95,24 @@ CONFIG_E1000=y
|
||||
CONFIG_BAUDRATE=9600
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFFC00000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_4_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="WINDOW1"
|
||||
CONFIG_BR1_OR1_BASE=0xF0000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_32BIT=y
|
||||
CONFIG_OR1_AM_256_KBYTES=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
|
||||
196
configs/gazerbeam_defconfig
Normal file
196
configs/gazerbeam_defconfig
Normal file
@@ -0,0 +1,196 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x600
|
||||
CONFIG_IDENT_STRING=" gazerbeam 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_GAZERBEAM=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="INIT_RAM"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xE0700000
|
||||
CONFIG_LBLAW2_NAME="FPGA1"
|
||||
CONFIG_LBLAW2_LENGTH_1_MBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA0"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_SCY_5=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="FPGA1"
|
||||
CONFIG_BR2_OR2_BASE=0xE0700000
|
||||
CONFIG_BR2_PORTSIZE_16BIT=y
|
||||
CONFIG_OR2_AM_1_MBYTES=y
|
||||
CONFIG_OR2_SCY_5=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
|
||||
CONFIG_SICR_GPIO_A_TSEC2=y
|
||||
CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_CONSOLE_MUX is not set
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
CONFIG_DISPLAY_CPUINFO=y
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
CONFIG_LAST_STAGE_INIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_STOP_STR=" "
|
||||
CONFIG_CMD_CPU=y
|
||||
CONFIG_CMD_BINOP=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_SYS_ALT_MEMTEST=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_AXI=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_MII_DRIVER=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_CMD_TPM=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_DOS_PARTITION=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="gazerbeam"
|
||||
CONFIG_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_AXI=y
|
||||
CONFIG_IHS_AXI=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_ICS8N3QV01=y
|
||||
CONFIG_CPU=y
|
||||
CONFIG_CPU_MPC83XX=y
|
||||
CONFIG_BOARD=y
|
||||
CONFIG_BOARD_GAZERBEAM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_MPC8XXX_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_FSL=y
|
||||
CONFIG_SYS_I2C_IHS=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_GDSYS_RXAUI_CTRL=y
|
||||
CONFIG_GDSYS_IOEP=y
|
||||
CONFIG_MPC83XX_SERDES=y
|
||||
CONFIG_GDSYS_SOC=y
|
||||
CONFIG_IHS_FPGA=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_FSL_ESDHC=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_CFI_FLASH=y
|
||||
CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_PHYLIB_10G=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_RAM=y
|
||||
CONFIG_MPC83XX_SDRAM=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_MCP83XX=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_MPC83XX_TIMER=y
|
||||
CONFIG_TPM_ATMEL_TWI=y
|
||||
CONFIG_TPM_AUTH_SESSIONS=y
|
||||
# CONFIG_TPM_V2 is not set
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_LOGICORE_DP_TX=y
|
||||
CONFIG_OSD=y
|
||||
CONFIG_IHS_VIDEO_OUT=y
|
||||
CONFIG_TPM=y
|
||||
@@ -1,8 +1,75 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_IDENT_STRING=" hrcon 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_HRCON=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
|
||||
CONFIG_SICR_GPIO_A_GPIO=y
|
||||
CONFIG_SICR_GPIO_B_GPIO=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
@@ -38,3 +105,31 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,8 +1,75 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_IDENT_STRING=" hrcon dh 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_HRCON=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_RGMII=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
|
||||
CONFIG_SICR_GPIO_A_GPIO=y
|
||||
CONFIG_SICR_GPIO_B_GPIO=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
@@ -36,3 +103,31 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,81 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF00000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_IDS8313=y
|
||||
CONFIG_SYS_IMMR=0xF0000000
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="INITRAM"
|
||||
CONFIG_BAT1_BASE=0xFD000000
|
||||
CONFIG_BAT1_LENGTH_256_KBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFF800000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR"
|
||||
CONFIG_BAT5_BASE=0xF0000000
|
||||
CONFIG_BAT5_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="NAND_MRAM_CPLD"
|
||||
CONFIG_BAT6_BASE=0xE0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFF800000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE1000000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xE2000000
|
||||
CONFIG_LBLAW2_NAME="MRAM"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE3000000
|
||||
CONFIG_LBLAW3_NAME="CPLD"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_IMAGE_FORMAT_LEGACY=y
|
||||
@@ -51,3 +125,50 @@ CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MPC8XXX_SPI=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFF800000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_8BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_10=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE1000000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_PGS_LARGE=y
|
||||
CONFIG_OR1_RST_ONE_CLOCK=y
|
||||
CONFIG_OR1_SCY_4=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="MRAM"
|
||||
CONFIG_BR2_OR2_BASE=0xE2000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_SCY_7=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CPLD"
|
||||
CONFIG_BR3_OR3_BASE=0xE3000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,10 +1,118 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_KM8360=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMCOGE5NE=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_4=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_6=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_LALE_TIMING_EARLIER=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="PAXE"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="BFTIC3"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="SDRAM_UPPER"
|
||||
CONFIG_BAT7_BASE=0x10000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xA0000000
|
||||
CONFIG_LBLAW3_NAME="PAXE"
|
||||
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMCOGE5NE"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -42,3 +150,48 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_BCH=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_64_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PAXE"
|
||||
CONFIG_BR3_OR3_BASE=0xA0000000
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_2=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR4_OR4=y
|
||||
CONFIG_BR4_OR4_NAME="BFTIC3"
|
||||
CONFIG_BR4_OR4_BASE=0xB0000000
|
||||
CONFIG_BR4_PORTSIZE_8BIT=y
|
||||
CONFIG_OR4_AM_256_MBYTES=y
|
||||
CONFIG_OR4_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR4_CSNT_EARLIER=y
|
||||
CONFIG_OR4_EAD_EXTRA=y
|
||||
CONFIG_OR4_SCY_2=y
|
||||
CONFIG_OR4_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_LCRR_EADC_2=y
|
||||
|
||||
@@ -1,10 +1,91 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_KM8360=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMETER1=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_4=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_6=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_LALE_TIMING_EARLIER=y
|
||||
CONFIG_LDP_PIN_MUX_STATE_0=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="PAXE"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xA0000000
|
||||
CONFIG_LBLAW3_NAME="PAXE"
|
||||
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMETER1"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -41,3 +122,38 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_64_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PAXE"
|
||||
CONFIG_BR3_OR3_BASE=0xA0000000
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_2=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_LCRR_EADC_2=y
|
||||
|
||||
@@ -1,10 +1,106 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_TUXX1=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMOPTI2=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="APP2"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xB0000000
|
||||
CONFIG_LBLAW3_NAME="APP2"
|
||||
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMOPTI2"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -41,3 +137,48 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_2=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_4_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="APP2"
|
||||
CONFIG_BR3_OR3_BASE=0xB0000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_SCY_4=y
|
||||
CONFIG_OR3_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,10 +1,92 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_TUXX1=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMSUPX5=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMSUPX5"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -41,3 +123,40 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_2=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_4_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,91 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_SUVD3=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMTEGR1=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="APP2"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xB0000000
|
||||
CONFIG_LBLAW3_NAME="APP2"
|
||||
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
|
||||
@@ -43,3 +127,36 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_BCH=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="APP2"
|
||||
CONFIG_BR3_OR3_BASE=0xB0000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_SCY_5=y
|
||||
CONFIG_OR3_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,10 +1,106 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_TUXX1=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMTEPR2=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="APP2"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xB0000000
|
||||
CONFIG_LBLAW3_NAME="APP2"
|
||||
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMTEPR2"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -41,3 +137,48 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_2=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_4_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="APP2"
|
||||
CONFIG_BR3_OR3_BASE=0xB0000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_SCY_4=y
|
||||
CONFIG_OR3_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,105 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_SUVD3=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_KMVECT1=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="APP2"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xB0000000
|
||||
CONFIG_LBLAW3_NAME="APP2"
|
||||
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
|
||||
@@ -42,3 +140,43 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_UPMA=y
|
||||
CONFIG_BR2_PORTSIZE_16BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="APP2"
|
||||
CONFIG_BR3_OR3_BASE=0xB0000000
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_SCY_3=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,76 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFC000000
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8308_P1M=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFC000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACKINDCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFC000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_64_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xFBFF0000
|
||||
CONFIG_LBLAW1_NAME="SJA1000"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xFBFF8000
|
||||
CONFIG_LBLAW2_NAME="CPLD"
|
||||
CONFIG_LBLAW2_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ESDHC_A_GPIO=y
|
||||
CONFIG_SICR_ESDHC_B_GPIO=y
|
||||
CONFIG_SICR_ESDHC_C_GTM=y
|
||||
CONFIG_SICR_GPIO_A_TSEC2=y
|
||||
CONFIG_SICR_GPIO_B_TSEC2=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
@@ -24,3 +93,34 @@ CONFIG_MII=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFC000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_64_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_4=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="SJA1000"
|
||||
CONFIG_BR1_OR1_BASE=0xFBFF0000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_5=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="CPLD"
|
||||
CONFIG_BR2_OR2_BASE=0xFBFF8000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_SCY_4=y
|
||||
CONFIG_OR2_EHTR_1_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,78 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_SYS_CLK_FREQ=33000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_SBC8349=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_8_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_64BIT_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR_PCIIO"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="LBC_INITRAM_FLASH"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFF800000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_PCI_64BIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCI_33M"
|
||||
@@ -21,3 +92,19 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFF800000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,7 +1,78 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_SBC8349=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_64BIT_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR_PCIIO"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="LBC_INITRAM_FLASH"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFF800000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_PCI_64BIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCI_66M"
|
||||
@@ -21,3 +92,19 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFF800000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,7 +1,57 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_SBC8349=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER2_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR_PCIIO"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="LBC_INITRAM_FLASH"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFF800000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -20,3 +70,19 @@ CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFF800000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xfff00000
|
||||
CONFIG_MPC86xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_SBC8641D=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
|
||||
@@ -1,8 +1,74 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_IDENT_STRING=" strider con 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_STRIDER=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC2=y
|
||||
CONFIG_SICR_GPIO_A_GPIO=y
|
||||
CONFIG_SICR_GPIO_B_GPIO=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
@@ -41,3 +107,28 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_5=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,8 +1,74 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_IDENT_STRING=" strider con dp 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_STRIDER=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC2=y
|
||||
CONFIG_SICR_GPIO_A_GPIO=y
|
||||
CONFIG_SICR_GPIO_B_GPIO=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
@@ -41,3 +107,28 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_5=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,8 +1,74 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_IDENT_STRING=" strider cpu 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_STRIDER=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC2=y
|
||||
CONFIG_SICR_GPIO_A_GPIO=y
|
||||
CONFIG_SICR_GPIO_B_GPIO=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
@@ -41,3 +107,28 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_5=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,8 +1,74 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_IDENT_STRING=" strider cpu dp 0.01"
|
||||
CONFIG_SYS_CLK_FREQ=33333333
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_STRIDER=y
|
||||
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_3_1=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC2_MODE_RGMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="DDR"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMRBAR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="FLASH"
|
||||
CONFIG_BAT2_BASE=0xFE000000
|
||||
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT3_BASE=0xE6000000
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="FPGA0"
|
||||
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_SICR_ETSEC1_A_TSEC2=y
|
||||
CONFIG_SICR_GPIO_A_GPIO=y
|
||||
CONFIG_SICR_GPIO_B_GPIO=y
|
||||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_ETSEC2_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
@@ -41,3 +107,28 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_CONS_INDEX=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_1_MBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_5=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,104 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_SUVD3=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="APP2"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xB0000000
|
||||
CONFIG_LBLAW3_NAME="APP2"
|
||||
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
|
||||
@@ -41,3 +138,43 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_UPMA=y
|
||||
CONFIG_BR2_PORTSIZE_16BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="APP2"
|
||||
CONFIG_BR3_OR3_BASE=0xB0000000
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_SCY_3=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,10 +1,92 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_TUXX1=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_TUGE1=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="TUGE1"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -41,3 +123,40 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_2=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_4_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,10 +1,106 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_TUXX1=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_QUICC_MULT_FACTOR_3=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT0_ICACHE_GUARDED=y
|
||||
CONFIG_BAT0_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT0_DCACHE_GUARDED=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="IMMR"
|
||||
CONFIG_BAT1_BASE=0xE0000000
|
||||
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT1_ICACHE_GUARDED=y
|
||||
CONFIG_BAT1_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT1_DCACHE_GUARDED=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
||||
CONFIG_BAT2_BASE=0xE8000000
|
||||
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT3=y
|
||||
CONFIG_BAT3_NAME="FLASH"
|
||||
CONFIG_BAT3_BASE=0xF0000000
|
||||
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT3_ACCESS_RW=y
|
||||
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT3_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT3_DCACHE_GUARDED=y
|
||||
CONFIG_BAT3_USER_MODE_VALID=y
|
||||
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT4=y
|
||||
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
||||
CONFIG_BAT4_BASE=0xE6000000
|
||||
CONFIG_BAT4_ACCESS_RW=y
|
||||
CONFIG_BAT4_USER_MODE_VALID=y
|
||||
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="APP1"
|
||||
CONFIG_BAT5_BASE=0xA0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="APP2"
|
||||
CONFIG_BAT6_BASE=0xB0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF0000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE8000000
|
||||
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
||||
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xA0000000
|
||||
CONFIG_LBLAW2_NAME="APP1"
|
||||
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
||||
CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xB0000000
|
||||
CONFIG_LBLAW3_NAME="APP2"
|
||||
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="TUXX1"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
@@ -41,3 +137,51 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF0000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_256_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
||||
CONFIG_BR1_OR1_BASE=0xE8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_MBYTES=y
|
||||
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="APP1"
|
||||
CONFIG_BR2_OR2_BASE=0xA0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_256_MBYTES=y
|
||||
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_2=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_4_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="APP2"
|
||||
CONFIG_BR3_OR3_BASE=0xB0000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_256_MBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_SCY_2=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_4_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,84 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_SYS_CLK_FREQ=32000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_VE8313=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_25_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_LALE_TIMING_EARLIER=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR_PCIIO_BCSR"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="INITRAM_FLASH"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_GUARDED=y
|
||||
CONFIG_BAT6_DCACHE_GUARDED=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT7=y
|
||||
CONFIG_BAT7_NAME="FPGA_SRAM_NAND"
|
||||
CONFIG_BAT7_BASE=0x60000000
|
||||
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT7_ACCESS_RW=y
|
||||
CONFIG_BAT7_ICACHE_GUARDED=y
|
||||
CONFIG_BAT7_DCACHE_GUARDED=y
|
||||
CONFIG_BAT7_USER_MODE_VALID=y
|
||||
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0x61000000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -23,3 +100,50 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0x61000000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR1_RST_ONE_CLOCK=y
|
||||
CONFIG_OR1_SCY_2=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="NVRAM"
|
||||
CONFIG_BR2_OR2_BASE=0x60000000
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_3=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="SRAM"
|
||||
CONFIG_BR3_OR3_BASE=0x62000000
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_MBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_3=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
||||
@@ -1,7 +1,80 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF00000
|
||||
CONFIG_SYS_CLK_FREQ=66000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_VME8349=y
|
||||
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
||||
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
||||
CONFIG_CORE_PLL_RATIO_2_1=y
|
||||
CONFIG_PCI_HOST_MODE_ENABLE=y
|
||||
CONFIG_PCI_64BIT_MODE_ENABLE=y
|
||||
CONFIG_PCI_INT_ARBITER1_ENABLE=y
|
||||
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
||||
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
||||
CONFIG_TSEC1_MODE_GMII=y
|
||||
CONFIG_TSEC2_MODE_GMII=y
|
||||
CONFIG_BAT0=y
|
||||
CONFIG_BAT0_NAME="SDRAM"
|
||||
CONFIG_BAT0_BASE=0x00000000
|
||||
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT0_ACCESS_RW=y
|
||||
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT0_USER_MODE_VALID=y
|
||||
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT1=y
|
||||
CONFIG_BAT1_NAME="PCI1_MEM"
|
||||
CONFIG_BAT1_BASE=0x80000000
|
||||
CONFIG_BAT1_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT1_ACCESS_RW=y
|
||||
CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT1_USER_MODE_VALID=y
|
||||
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT2=y
|
||||
CONFIG_BAT2_NAME="PCI1_MMIO"
|
||||
CONFIG_BAT2_BASE=0x90000000
|
||||
CONFIG_BAT2_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT2_ACCESS_RW=y
|
||||
CONFIG_BAT2_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT2_ICACHE_GUARDED=y
|
||||
CONFIG_BAT2_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT2_DCACHE_GUARDED=y
|
||||
CONFIG_BAT2_USER_MODE_VALID=y
|
||||
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT5=y
|
||||
CONFIG_BAT5_NAME="IMMR_PCIIO"
|
||||
CONFIG_BAT5_BASE=0xE0000000
|
||||
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT5_ACCESS_RW=y
|
||||
CONFIG_BAT5_ICACHE_INHIBITED=y
|
||||
CONFIG_BAT5_ICACHE_GUARDED=y
|
||||
CONFIG_BAT5_DCACHE_INHIBITED=y
|
||||
CONFIG_BAT5_DCACHE_GUARDED=y
|
||||
CONFIG_BAT5_USER_MODE_VALID=y
|
||||
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_BAT6=y
|
||||
CONFIG_BAT6_NAME="UNKNOWN"
|
||||
CONFIG_BAT6_BASE=0xF0000000
|
||||
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
||||
CONFIG_BAT6_ACCESS_RW=y
|
||||
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
|
||||
CONFIG_BAT6_USER_MODE_VALID=y
|
||||
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
||||
CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xF8000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_128_MBYTES=y
|
||||
CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF0000000
|
||||
CONFIG_LBLAW1_NAME="WINDOW1"
|
||||
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_PCI_64BIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@@ -24,3 +97,25 @@ CONFIG_TSEC_ENET=y
|
||||
CONFIG_BAUDRATE=9600
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xF8000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_128_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="WINDOW1"
|
||||
CONFIG_BR1_OR1_BASE=0xF0000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_32BIT=y
|
||||
CONFIG_OR1_AM_256_KBYTES=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xfff00000
|
||||
CONFIG_MPC86xx=y
|
||||
CONFIG_HIGH_BATS=y
|
||||
CONFIG_TARGET_XPEDITE517X=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
||||
Reference in New Issue
Block a user