Fixes for 2020.04

-----------------
 
 - mx7dsabre: Fix ramdisk_addr* for distro boot
 - Toradex boards
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/671988124
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Merge tag 'u-boot-imx-20200408' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.04
-----------------

- mx7dsabre: Fix ramdisk_addr* for distro boot
- Toradex boards

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/671988124
This commit is contained in:
Tom Rini 2020-04-08 12:06:39 -04:00
commit dfd5321bec
4 changed files with 84 additions and 61 deletions

View File

@ -4,125 +4,133 @@
*/
&mu {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&iomuxc {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio4 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio5 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio6 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio7 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_dma {
u-boot,dm-pre-proper;
};
&pd_dma_lpuart1 {
u-boot,dm-pre-proper;
};
&pd_conn {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_conn_sdch0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_conn_sdch1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_conn_sdch2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio4 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio5 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio6 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio7 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&lpuart0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&lpuart1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&lpuart2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&lpuart3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&usdhc1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&usdhc2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&usdhc3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};

View File

@ -5,113 +5,125 @@
&{/imx8qx-pm} {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&mu {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&iomuxc {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio4 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio5 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio6 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_lsio_gpio7 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_dma {
u-boot,dm-pre-proper;
};
&pd_dma_lpuart0 {
u-boot,dm-pre-proper;
};
&pd_dma_lpuart3 {
u-boot,dm-pre-proper;
};
&pd_conn {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_conn_sdch0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_conn_sdch1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&pd_conn_sdch2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio0 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio4 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio5 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio6 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&gpio7 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&lpuart3 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&usdhc1 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};
&usdhc2 {
u-boot,dm-spl;
u-boot,dm-pre-proper;
};

View File

@ -354,12 +354,15 @@ int board_phy_config(struct phy_device *phydev)
int setup_fec(void)
{
int ret;
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
/* provide the PHY clock from the i.MX 6 */
ret = enable_fec_anatop_clock(0, ENET_50MHZ);
if (ret)
return ret;
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
return 0;
}

View File

@ -81,8 +81,8 @@
"fdt_addr_r=0x83000000\0" \
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"ramdisk_addr_r=0x83000000\0" \
"ramdiskaddr=0x83000000\0" \
"ramdisk_addr_r=0x83100000\0" \
"ramdiskaddr=0x83100000\0" \
"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
BOOTENV