- Marvell SheevaPlug: Convert Ethernet and SATA to Driver Model (Tony)
- Zyxel NSA310S NAS: Convert to Driver Model (Tony)
- Turris_omnia: Add `u-boot-env` NOR partition (Marek)
- Turris_omnia: Fixup MTD partitions in Linux' DTB (Marek)
- Espressobin: Enable 'mtd' command and define SPI NOR partitions (Pali)
This commit is contained in:
Tom Rini 2021-07-19 08:41:04 -04:00
commit dd3dfa50d8
14 changed files with 548 additions and 37 deletions

View File

@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
kirkwood-ns2lite.dtb \
kirkwood-ns2max.dtb \
kirkwood-ns2mini.dtb \
kirkwood-nsa310s.dtb \
kirkwood-openrd-base.dtb \
kirkwood-openrd-client.dtb \
kirkwood-openrd-ultimate.dtb \

View File

@ -164,6 +164,24 @@
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
m25p,fast-read;
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@firmware {
reg = <0 CONFIG_ENV_OFFSET>;
label = "firmware";
};
partition@u-boot-env {
reg = <CONFIG_ENV_OFFSET CONFIG_ENV_SIZE>;
label = "u-boot-env";
};
};
#endif
};
};

View File

@ -43,6 +43,17 @@
spi-nor@0 {
u-boot,dm-pre-reloc;
partitions {
partition@0 {
reg = <0x0 CONFIG_ENV_OFFSET>;
};
partition@f0000 {
reg = <CONFIG_ENV_OFFSET CONFIG_ENV_SIZE>;
label = "u-boot-env";
};
};
};
};

View File

@ -0,0 +1,318 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device tree file for the Zyxel NSA 310S NAS box.
*
* Copyright (c) 2015-2021, Tony Dinh <mibodhi@gmail.com>
*
* Based on
* Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
* Based upon the board setup file created by Peter Schildmann
*/
/dts-v1/;
#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
/ {
model = "Zyxel NSA310S";
compatible = "zyxel,nsa320s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
};
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = &uart0;
};
ocp@f1000000 {
pinctrl: pin-controller@10000 {
pinctrl-names = "default";
pmx_sata0: pmx-sata0 {
marvell,pins ;
marvell,function = "sata0";
};
pmx_sata1: pmx-sata1 {
marvell,pins ;
marvell,function = "sata1";
};
pmx_usb_power: pmx-usb-power {
marvell,pins = "mpp21";
marvell,function = "gpio";
};
pmx_pwr_off: pmx-pwr-off {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
pmx_btn_reset: pmx-btn-reset {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
pmx_btn_copy: pmx-btn-copy {
marvell,pins = "mpp25";
marvell,function = "gpio";
};
pmx_btn_power: pmx-btn-power {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
pmx_led_hdd2_green: pmx-led-hdd2-green {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
pmx_led_hdd2_red: pmx-led-hdd2-red {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_led_usb_green: pmx-led-usb-green {
marvell,pins = "mpp15";
marvell,function = "gpio";
};
pmx_led_copy_green: pmx-led-copy-green {
marvell,pins = "mpp22";
marvell,function = "gpio";
};
pmx_led_copy_red: pmx-led-copy-red {
marvell,pins = "mpp23";
marvell,function = "gpio";
};
pmx_led_sys_green: pmx-led-sys-green {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
pmx_led_sys_orange: pmx-led-sys-orange {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
pmx_led_hdd1_green: pmx-led-hdd1-green {
marvell,pins = "mpp16";
marvell,function = "gpio";
};
pmx_led_hdd1_red: pmx-led-hdd1-red {
marvell,pins = "mpp13";
marvell,function = "gpio";
};
pmx_pwr_sata1: pmx-pwr-sata1 {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
};
serial@12000 {
status = "ok";
};
sata@80000 {
status = "okay";
nr-ports = <1>;
};
rtc@10300 {
status = "disabled";
};
i2c@11000 {
status = "okay";
ht1382: rtc@68 {
compatible = "htk,ht1382";
reg = <0x68>;
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pmx_usb_power &pmx_pwr_sata1>;
usb0_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
};
sata1_power: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA1 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&pmx_pwr_off>;
pinctrl-names = "default";
gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
pinctrl-names = "default";
button@1 {
label = "Power Button";
linux,code = <KEY_POWER>;
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
};
button@2 {
label = "Copy Button";
linux,code = <KEY_COPY>;
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
};
button@3 {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
&pmx_led_usb_green
&pmx_led_sys_green &pmx_led_sys_orange
&pmx_led_copy_green &pmx_led_copy_red
&pmx_led_hdd1_green &pmx_led_hdd1_red>;
pinctrl-names = "default";
green-sys {
label = "nsa310s:green:sys";
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
orange-sys {
label = "nsa310s:orange:sys";
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
green-hdd1 {
label = "nsa310s:green:hdd1";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
};
red-hdd1 {
label = "nsa310s:red:hdd1";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
};
green-hdd2 {
label = "nsa310s:green:hdd2";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
red-hdd2 {
label = "nsa310s:red:hdd2";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
};
green-usb {
label = "nsa310s:green:usb";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
};
green-copy {
label = "nsa310s:green:copy";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ide-disk";
};
red-copy {
label = "nsa310s:red:copy";
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
};
};
};
&nand {
status = "okay";
chip-delay = <35>;
partition@0 {
label = "uboot";
reg = <0x0000000 0x0100000>;
};
partition@100000 {
label = "stock_uboot_env";
reg = <0x0100000 0x0080000>;
};
partition@180000 {
label = "key_store";
reg = <0x0180000 0x0080000>;
};
partition@200000 {
label = "info";
reg = <0x0200000 0x0080000>;
};
partition@280000 {
label = "etc";
reg = <0x0280000 0x0a00000>;
};
partition@c80000 {
label = "kernel_1";
reg = <0x0c80000 0x0a00000>;
};
partition@1680000 {
label = "rootfs1";
reg = <0x1680000 0x2fc0000>;
};
partition@4640000 {
label = "kernel_2";
reg = <0x4640000 0x0a00000>;
};
partition@5040000 {
label = "rootfs2";
reg = <0x5040000 0x2fc0000>;
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@1 {
compatible = "marvell,88e1510";
reg = <1>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&pciec {
status = "okay";
};
&pcie0 {
status = "okay";
};

View File

@ -13,6 +13,7 @@
#include <init.h>
#include <log.h>
#include <miiphy.h>
#include <mtd.h>
#include <net.h>
#include <netdev.h>
#include <asm/global_data.h>
@ -31,6 +32,8 @@
DECLARE_GLOBAL_DATA_PTR;
#define OMNIA_SPI_NOR_PATH "/soc/spi@10600/spi-nor@0"
#define OMNIA_I2C_BUS_NAME "i2c@11000->i2cmux@70->i2c@0"
#define OMNIA_I2C_MCU_CHIP_ADDR 0x2a
@ -557,3 +560,90 @@ out:
return 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
/*
* I plan to generalize this function and move it to common/fdt_support.c.
* This will require some more work on multiple boards, though, so for now leave
* it here.
*/
static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd)
{
struct mtd_info *slave;
int parts;
parts = fdt_subnode_offset(blob, offset, "partitions");
if (parts < 0)
return false;
if (fdt_del_node(blob, parts) < 0)
return false;
parts = fdt_add_subnode(blob, offset, "partitions");
if (parts < 0)
return false;
if (fdt_setprop_u32(blob, parts, "#address-cells", 1) < 0)
return false;
if (fdt_setprop_u32(blob, parts, "#size-cells", 1) < 0)
return false;
if (fdt_setprop_string(blob, parts, "compatible",
"fixed-partitions") < 0)
return false;
mtd_probe_devices();
list_for_each_entry(slave, &mtd->partitions, node) {
char name[32];
int part;
snprintf(name, sizeof(name), "partition@%llx", slave->offset);
part = fdt_add_subnode(blob, parts, name);
if (part < 0)
return false;
if (fdt_setprop_u32(blob, part, "reg", slave->offset) < 0)
return false;
if (fdt_appendprop_u32(blob, part, "reg", slave->size) < 0)
return false;
if (fdt_setprop_string(blob, part, "label", slave->name) < 0)
return false;
if (!(slave->flags & MTD_WRITEABLE))
if (fdt_setprop_empty(blob, part, "read-only") < 0)
return false;
if (slave->flags & MTD_POWERUP_LOCK)
if (fdt_setprop_empty(blob, part, "lock") < 0)
return false;
}
return true;
}
int ft_board_setup(void *blob, struct bd_info *bd)
{
struct mtd_info *mtd;
int node;
mtd = get_mtd_device_nm(OMNIA_SPI_NOR_PATH);
if (IS_ERR_OR_NULL(mtd))
goto fail;
node = fdt_path_offset(blob, OMNIA_SPI_NOR_PATH);
if (node < 0)
goto fail;
if (!fixup_mtd_partitions(blob, node, mtd))
goto fail;
return 0;
fail:
printf("Failed fixing SPI NOR partitions!\n");
return 0;
}
#endif

View File

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com>
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
@ -100,36 +101,65 @@ int board_init(void)
return 0;
}
static int fdt_get_phy_addr(const char *path)
{
const void *fdt = gd->fdt_blob;
const u32 *reg;
const u32 *val;
int node, phandle, addr;
/* Find the node by its full path */
node = fdt_path_offset(fdt, path);
if (node >= 0) {
/* Look up phy-handle */
val = fdt_getprop(fdt, node, "phy-handle", NULL);
if (val) {
phandle = fdt32_to_cpu(*val);
if (!phandle)
return -1;
/* Follow it to its node */
node = fdt_node_offset_by_phandle(fdt, phandle);
if (node) {
/* Look up reg */
reg = fdt_getprop(fdt, node, "reg", NULL);
if (reg) {
addr = fdt32_to_cpu(*reg);
return addr;
}
}
}
}
return -1;
}
#ifdef CONFIG_RESET_PHY_R
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
{
u16 reg;
u16 devadr;
char *name = "egiga0";
int phyaddr;
char *name = "ethernet-controller@72000";
char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..%s could not read PHY dev address\n",
__FUNCTION__);
phyaddr = fdt_get_phy_addr(eth0_path);
if (phyaddr < 0)
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, devadr);
miiphy_reset(name, phyaddr);
printf("88E1116 Initialized on %s\n", name);
}

View File

@ -1,8 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015
* Gerald Kerma <dreagle@doukki.net>
* Tony Dinh <mibodhi@gmail.com>
* Copyright (C) 2015, 2021 Tony Dinh <mibodhi@gmail.com>
* Copyright (C) 2015 Gerald Kerma <dreagle@doukki.net>
*/
#include <common.h>
@ -81,21 +80,51 @@ int board_init(void)
return 0;
}
static int fdt_get_phy_addr(const char *path)
{
const void *fdt = gd->fdt_blob;
const u32 *reg;
const u32 *val;
int node, phandle, addr;
/* Find the node by its full path */
node = fdt_path_offset(fdt, path);
if (node >= 0) {
/* Look up phy-handle */
val = fdt_getprop(fdt, node, "phy-handle", NULL);
if (val) {
phandle = fdt32_to_cpu(*val);
if (!phandle)
return -1;
/* Follow it to its node */
node = fdt_node_offset_by_phandle(fdt, phandle);
if (node) {
/* Look up reg */
reg = fdt_getprop(fdt, node, "reg", NULL);
if (reg) {
addr = fdt32_to_cpu(*reg);
return addr;
}
}
}
}
return -1;
}
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
u16 reg;
u16 phyaddr;
char *name = "egiga0";
char *name = "ethernet-controller@72000";
char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
if (miiphy_set_current_dev(name))
return;
/* read PHY dev address */
if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) {
printf("could not read PHY dev address\n");
phyaddr = fdt_get_phy_addr(eth0_path);
if (phyaddr < 0)
return;
}
/* set RGMII delay */
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
@ -131,5 +160,7 @@ void reset_phy(void)
/* downshift */
miiphy_write(name, phyaddr, 0x10, 0x3860);
miiphy_write(name, phyaddr, 0x0, 0x9140);
printf("MV88E1318 PHY initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */

View File

@ -28,6 +28,7 @@ CONFIG_BOARD_LATE_INIT=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@ -54,6 +55,7 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_SPI_FLASH_GIGADEVICE=y
@ -62,6 +64,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y

View File

@ -7,14 +7,16 @@ CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NSA310S=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nsa310s => "
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@ -44,3 +46,11 @@ CONFIG_USB_STORAGE=y
CONFIG_LZMA=y
CONFIG_BZIP2=y
CONFIG_OF_LIBFDT=y
CONFIG_DM=y
CONFIG_BLK=y
CONFIG_OF_CONTROL=y
CONFIG_DM_USB=y
CONFIG_DM_ETH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CMD_SATA=y
CONFIG_SATA_MV=y

View File

@ -17,7 +17,6 @@ CONFIG_USE_PREBOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
@ -53,3 +52,8 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LZMA=y
CONFIG_BZIP2=y
CONFIG_BLK=y
CONFIG_DM_ETH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CMD_SATA=y
CONFIG_SATA_MV=y

View File

@ -23,6 +23,7 @@ CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y

View File

@ -57,11 +57,6 @@
#define CONFIG_I2C_MV
#define CONFIG_SYS_I2C_SLAVE 0x0
/*
* SPI Flash configuration
*/
#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
/*
* Environment
*/

View File

@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, 2021 Tony Dinh <mibodhi@gmail.com>
* Copyright (C) 2015
* Gerald Kerma <dreagle@doukki.net>
* Tony Dinh <mibodhi@gmail.com>
* Luka Perkov <luka.perkov@sartura.hr>
*/
@ -46,10 +46,10 @@
#endif /* CONFIG_CMD_NET */
/* SATA driver configuration */
#ifdef CONFIG_IDE
#define __io
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /* CONFIG_IDE */
#ifdef CONFIG_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_LBA48
#endif /* CONFIG_SATA */
/* RTC driver configuration */
#ifdef CONFIG_CMD_DATE

View File

@ -53,10 +53,9 @@
/*
* SATA driver configuration
*/
#ifdef CONFIG_IDE
#define __io
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif /* CONFIG_IDE */
#ifdef CONFIG_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 2
#define CONFIG_LBA48
#endif /* CONFIG_SATA */
#endif /* _CONFIG_SHEEVAPLUG_H */