armv8/ls104xa: remove the DDR interactive debugging info from SPL
Remove the DDR interactive debugging to reduce the size of spl image. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -38,7 +38,9 @@ unsigned long get_board_ddr_clk(void);
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#define SPD_EEPROM_ADDRESS 0x51
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#define CONFIG_SYS_SPD_BUS_NUM 0
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#ifndef CONFIG_SPL
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#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
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#endif
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#define CONFIG_DDR_ECC
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#ifdef CONFIG_DDR_ECC
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@ -29,7 +29,9 @@
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#define CONFIG_SYS_SPD_BUS_NUM 0
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#define CONFIG_FSL_DDR_BIST
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#ifndef CONFIG_SPL
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#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
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#endif
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#define CONFIG_SYS_DDR_RAW_TIMING
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#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
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#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
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@ -38,7 +38,9 @@ unsigned long get_board_ddr_clk(void);
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#define SPD_EEPROM_ADDRESS 0x51
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#define CONFIG_SYS_SPD_BUS_NUM 0
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#ifndef CONFIG_SPL
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#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
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#endif
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#define CONFIG_DDR_ECC
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#ifdef CONFIG_DDR_ECC
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@ -34,7 +34,9 @@
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#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
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#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
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#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */
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#ifndef CONFIG_SPL
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#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
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#endif
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#ifdef CONFIG_RAMBOOT_PBL
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#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
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