configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boards
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS, remove it in all boards' config files. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
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99c2255688
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cbb89ed026
@ -19,11 +19,7 @@ enum usbhs_omap_port_mode {
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OMAP_EHCI_PORT_MODE_HSIC,
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};
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#ifdef CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
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#define OMAP_HS_USB_PORTS CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
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#else
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#define OMAP_HS_USB_PORTS 3
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#endif
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#define is_ehci_phy_mode(x) ((x) == OMAP_EHCI_PORT_MODE_PHY)
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#define is_ehci_tll_mode(x) ((x) == OMAP_EHCI_PORT_MODE_TLL)
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@ -560,7 +560,6 @@
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#define CONFIG_USB_EHCI_PCI
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_PCI_EHCI_DEVICE 0
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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#endif
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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@ -56,7 +56,6 @@
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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/* USB UHH support options */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 76 /* HSIC2 HUB #RESET */
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@ -94,9 +94,6 @@
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_AT91_WANTS_COMMON_PHY
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/* USB */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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@ -25,8 +25,6 @@
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#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
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/* USB UHH support options */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
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#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
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@ -134,8 +134,6 @@
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/* Enable Time Command */
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/* USB */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_SMSC95XX
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@ -96,7 +96,6 @@
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* USB device */
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#define CONFIG_USB_ETHER
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@ -74,7 +74,6 @@
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/* EHCI */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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@ -93,12 +93,7 @@
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#define CONFIG_NET_RETRY_COUNT 50
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#define CONFIG_PHY_MARVELL
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/* USB 2.0 */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* USB 3.0 */
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
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3)
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
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/* USB ethernet */
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#define CONFIG_USB_HOST_ETHER
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@ -97,12 +97,7 @@
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#define CONFIG_ARP_TIMEOUT 200
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#define CONFIG_NET_RETRY_COUNT 50
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/* USB 2.0 */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* USB 3.0 */
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
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3)
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
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/* USB ethernet */
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#define CONFIG_USB_HOST_ETHER
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@ -195,7 +195,6 @@
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#define CONFIG_SYS_NAND_LARGEPAGE
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/* EHCI driver */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_EHCI_MXC
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@ -184,7 +184,6 @@
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/* USB */
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#define CONFIG_USB_EHCI_EXYNOS
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_SMSC95XX
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@ -58,7 +58,6 @@
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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@ -41,7 +41,6 @@
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/* USB EHCI */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* commands to include */
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@ -17,8 +17,6 @@
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*/
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/* USB UHH support options */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
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#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
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@ -51,7 +51,6 @@
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#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
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/* USB UHH support options */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
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@ -97,9 +97,6 @@
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#define CONFIG_RESET_PHY_R
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#define CONFIG_AT91_WANTS_COMMON_PHY
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/* USB */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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@ -30,7 +30,6 @@
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#define CONFIG_PL01X_SERIAL
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/* USB configuration */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_SYS_USB_EVENT_POLL
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#define CONFIG_USB_HOST_ETHER
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@ -65,10 +65,6 @@
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/* USB */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#endif
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/* USB device */
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_DUALSPEED
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@ -60,9 +60,6 @@
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#define CONFIG_TFTP_PORT
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#define CONFIG_TFTP_TSIZE
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/* USB */
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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/* MMC */
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#define CONFIG_GENERIC_ATMEL_MCI
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@ -310,7 +310,6 @@ extern int soft_i2c_gpio_scl;
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_USB_OHCI_SUNXI
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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#endif
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#ifdef CONFIG_USB_MUSB_SUNXI
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115200}
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/* EHCI */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* commands to include */
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#define CONFIG_CMD_NAND /* NAND support */
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@ -228,7 +228,6 @@
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/* USB EHCI */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_SMSC95XX
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/* For USB EHCI controller */
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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#endif /* _TEGRA114_COMMON_H_ */
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@ -65,7 +65,6 @@
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/* For USB EHCI controller */
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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/* GPU needs setup */
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#define CONFIG_TEGRA_GPU
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*/
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#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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#define CONFIG_SYS_NAND_SELF_INIT
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* For USB EHCI controller */
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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/* GPU needs setup */
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#define CONFIG_TEGRA_GPU
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@ -64,6 +64,5 @@
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/* For USB EHCI controller */
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
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#endif /* _TEGRA30_COMMON_H_ */
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#endif
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#endif
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/* USB device */
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETH_RNDIS
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* USB configuration
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*/
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#define CONFIG_USB_EHCI_PCI
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12
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#define CONFIG_SYS_USB_EVENT_POLL
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#define CONFIG_USB_HOST_ETHER
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CONFIG_SYS_USBCTRL
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CONFIG_SYS_USBD_BASE
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CONFIG_SYS_USB_EHCI_CPU_INIT
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CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
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CONFIG_SYS_USB_EHCI_REGS_BASE
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CONFIG_SYS_USB_FAT_BOOT_PARTITION
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CONFIG_SYS_USB_HOST
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