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include/configs: Whitespace fixup

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A number of moveconfig.py runs have left a instances of multiple empty
lines in a row.  Correct this to a single empty line.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2016-04-24 10:24:59 -04:00
parent 78d1e1d0a1
commit cb04db155f
244 changed files with 0 additions and 675 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/configs/B4860QDS.h
View File

@ -712,7 +712,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7 /*SLOT 1*/
#define CONFIG_SYS_FM1_10GEC2_PHY_ADDR 0x6 /*SLOT 2*/
#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c
#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d
#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e

1
include/configs/BSC9131RDB.h
View File

@ -52,7 +52,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */

3
include/configs/BSC9132QDS.h
View File

@ -93,7 +93,6 @@
#define CONFIG_CMD_PCI
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
@ -223,7 +222,6 @@ combinations. this should be removed later
#define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800
#endif
/* relocated CCSRBAR */
#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT
@ -590,7 +588,6 @@ combinations. this should be removed later
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
/*
* For booting Linux, the board info and command line data
* have to be in the first 64 MB of memory, since this is

1
include/configs/C29XPCIE.h
View File

@ -100,7 +100,6 @@
#define CONFIG_CMD_PCI
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.

4
include/configs/CPCI2DP.h
View File

@ -48,7 +48,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -57,7 +56,6 @@
#define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@ -67,7 +65,6 @@
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
@ -102,7 +99,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */

2
include/configs/CPCI4052.h
View File

@ -62,7 +62,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
/*
* Command line configuration.
*/
@ -89,7 +88,6 @@
*/
#undef CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else

1
include/configs/M5235EVB.h
View File

@ -40,7 +40,6 @@
#define CONFIG_CMD_PCI
#define CONFIG_CMD_REGINFO
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
# define CONFIG_MII 1

1
include/configs/M5253EVBE.h
View File

@ -37,7 +37,6 @@
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text)
/*
* BOOTP options
*/

1
include/configs/M5275EVB.h
View File

@ -58,7 +58,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_MII
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
#define CONFIG_MII 1

7
include/configs/MIP405.h
View File

@ -21,7 +21,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
/***********************************************************
* Note that it may also be a MIP405T board which is a subset of the
* MIP405
@ -37,7 +36,6 @@
***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
/*
* BOOTP options
*/
@ -46,7 +44,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -66,7 +63,6 @@
#if !defined(CONFIG_MIP405T)
#endif
/**************************************************************
* I2C Stuff:
* the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address
@ -89,7 +85,6 @@
/* last 6 bits of the address */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
#define CONFIG_ENV_OFFSET 0x00000 /* environment starts at the beginning of the EEPROM */
#define CONFIG_ENV_SIZE 0x00800 /* 2k bytes may be used for env vars */
@ -280,7 +275,6 @@
#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
#define CONFIG_PORT_ADDR PER_PLD_ADDR + 5
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in On Chip SRAM)
*/
@ -406,5 +400,4 @@
#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version"
#endif
#endif /* __CONFIG_H */

3
include/configs/MPC8313ERDB.h
View File

@ -276,7 +276,6 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
#define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024)
#define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE \
| BR_DECC_CHK_GEN /* Use HW ECC */ \
| BR_PS_8 /* 8 bit port */ \
@ -427,7 +426,6 @@
#define TSEC2_PHYIDX 0
#endif
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC1"
@ -474,7 +472,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/

1
include/configs/MPC8315ERDB.h
View File

@ -635,7 +635,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */

3
include/configs/MPC832XEMDS.h
View File

@ -337,7 +337,6 @@
#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000
#define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
@ -407,7 +406,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -602,7 +600,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */

3
include/configs/MPC8349EMDS.h
View File

@ -464,7 +464,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
@ -473,7 +472,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -617,7 +615,6 @@
HID0_ENABLE_M_BIT |\
HID0_ENABLE_ADDRESS_BROADCAST) */
#define CONFIG_SYS_HID2 HID2_HBE
#define CONFIG_HIGH_BATS 1 /* High BATs supported */

2
include/configs/MPC8349ITX.h
View File

@ -484,7 +484,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -710,7 +709,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
/*
* Environment Configuration
*/

2
include/configs/MPC837XEMDS.h
View File

@ -475,7 +475,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -695,7 +694,6 @@ extern int board_pci_host_broken(void);
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */

1
include/configs/MPC837XERDB.h
View File

@ -486,7 +486,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/

1
include/configs/MPC8536DS.h
View File

@ -156,7 +156,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
/*
* Memory map -- xxx -this is wrong, needs updating
*

9
include/configs/MPC8540ADS.h
View File

@ -65,7 +65,6 @@
#define CONFIG_SYS_CLK_FREQ 33000000
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@ -136,7 +135,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
/*
* Local Bus Definitions
*/
@ -201,7 +199,6 @@
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
/*
* 32KB, 8-bit wide for ADS config reg
*/
@ -278,7 +275,6 @@
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
@ -293,7 +289,6 @@
#define TSEC1_FLAGS TSEC_GIGABIT
#define TSEC2_FLAGS TSEC_GIGABIT
#if CONFIG_HAS_FEC
#define CONFIG_MPC85XX_FEC 1
#define CONFIG_MPC85XX_FEC_NAME "FEC"
@ -307,7 +302,6 @@
#endif /* CONFIG_TSEC_ENET */
/*
* Environment
*/
@ -326,7 +320,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
@ -335,7 +328,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -377,7 +369,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
/*
* Environment Configuration
*/

4
include/configs/MPC8541CDS.h
View File

@ -133,7 +133,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
/*
* SDRAM on the Local Bus
*/
@ -314,7 +313,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
@ -353,7 +351,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -365,7 +362,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*

4
include/configs/MPC8544DS.h
View File

@ -179,12 +179,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
@ -317,7 +315,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
@ -368,7 +365,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/

5
include/configs/MPC8548CDS.h
View File

@ -132,7 +132,6 @@ extern unsigned long get_clock_freq(void);
*
*/
/*
* Local Bus Definitions
*/
@ -421,7 +420,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
@ -479,7 +477,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -491,7 +488,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@ -580,7 +576,6 @@ extern unsigned long get_clock_freq(void);
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \

5
include/configs/MPC8555CDS.h
View File

@ -33,7 +33,6 @@
#define CONFIG_FSL_VIA
#ifndef __ASSEMBLY__
extern unsigned long get_clock_freq(void);
#endif
@ -131,7 +130,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
/*
* SDRAM on the Local Bus
*/
@ -312,7 +310,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
@ -351,7 +348,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -363,7 +359,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*

7
include/configs/MPC8560ADS.h
View File

@ -60,7 +60,6 @@
#define CONFIG_SYS_CLK_FREQ 33000000
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@ -133,7 +132,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
/*
* Local Bus Definitions
*/
@ -198,7 +196,6 @@
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
/*
* 32KB, 8-bit wide for ADS config reg
*/
@ -273,7 +270,6 @@
#endif /* CONFIG_PCI */
#ifdef CONFIG_TSEC_ENET
#ifndef CONFIG_MII
@ -345,7 +341,6 @@
#endif
/*
* Environment
*/
@ -372,7 +367,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -419,7 +413,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
/*
* Environment Configuration
*/

8
include/configs/MPC8568MDS.h
View File

@ -51,7 +51,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
@ -144,14 +143,12 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
/*
* SDRAM on the LocalBus
*/
#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */
#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
/*Chip select 2 - SDRAM*/
#define CONFIG_SYS_BR2_PRELIM 0xf0001861
#define CONFIG_SYS_OR2_PRELIM 0xfc006901
@ -364,7 +361,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
@ -373,7 +369,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -385,7 +380,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@ -459,14 +453,12 @@ extern unsigned long get_clock_freq(void);
"ramargs=setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs\0" \
#define CONFIG_NFSBOOTCOMMAND \
"run nfsargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"run ramargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \

2
include/configs/MPC8569MDS.h
View File

@ -463,7 +463,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -475,7 +474,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_MMC 1

4
include/configs/MPC8572DS.h
View File

@ -177,7 +177,6 @@
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
#define CONFIG_FLASH_BR_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)
#define CONFIG_FLASH_OR_PRELIM 0xf8000ff7
@ -318,7 +317,6 @@
#define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
/* NAND flash config */
#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
@ -358,7 +356,6 @@
| BR_V) /* valid */
#define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
/* Serial Port - controlled on board with jumper J8
* open - index 2
* shorted - index 1
@ -509,7 +506,6 @@
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */

10
include/configs/MPC8610HPCD.h
View File

@ -20,7 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xfff00000
/* video */
#define CONFIG_FSL_DIU_FB
@ -136,14 +135,12 @@
#endif
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_FLASH_BASE 0xf0000000 /* start of FLASH 128M */
#define CONFIG_SYS_FLASH_BASE2 0xf8000000
@ -161,7 +158,6 @@
#define CONFIG_SYS_BR3_PRELIM 0xe8000801 /* port size 8bit */
#define CONFIG_SYS_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
#define PIXIS_BASE 0xe8000000 /* PIXIS registers */
#define PIXIS_ID 0x0 /* Board ID at offset 0 */
@ -277,7 +273,6 @@
#define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000
#define CONFIG_SYS_PCIE2_IO_SIZE 0x00100000 /* 1M */
#if defined(CONFIG_PCI)
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
@ -386,7 +381,6 @@
#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE2_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U
/*
* BAT5 128K Cacheable, non-guarded
* 0xe400_0000 128K Init RAM for stack in the CPU DCache (no backing memory)
@ -424,7 +418,6 @@
#define CONFIG_SYS_IBAT7L (PIXIS_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U
/*
* Environment
*/
@ -442,7 +435,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
@ -451,7 +443,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -463,7 +454,6 @@
#define CONFIG_CMD_EXT2
#endif
#define CONFIG_WATCHDOG /* watchdog enabled */
#define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */

7
include/configs/MPC8641HPCN.h
View File

@ -134,7 +134,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define SPD_EEPROM_ADDRESS3 0x53 /* CTLR 1 DIMM 0 */
#define SPD_EEPROM_ADDRESS4 0x54 /* CTLR 1 DIMM 1 */
/*
* These are used when DDR doesn't use SPD.
*/
@ -359,7 +358,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100
#undef CONFIG_TULIP
@ -440,7 +438,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_TSEC_ENET */
#ifdef CONFIG_PHYS_64BIT
#define PHYS_HIGH_TO_BXPN(x) ((x & 0x0000000e) << 8)
#define PHYS_HIGH_TO_BX(x) ((x & 0x00000001) << 2)
@ -600,7 +597,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
@ -609,7 +605,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -621,7 +616,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_CMD_EXT2
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@ -703,7 +697,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
"dis-wd=mw.b ffdf0010 0x00; echo -expect:- 00; md.b ffdf0010 1\0" \
"maxcpus=2"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \

2
include/configs/P1010RDB.h
View File

@ -185,7 +185,6 @@
#define CONFIG_CMD_PCI
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
@ -699,7 +698,6 @@ extern unsigned long get_sdram_size(void);
#endif /* CONFIG_TSEC_ENET */
/* SATA */
#define CONFIG_FSL_SATA
#define CONFIG_FSL_SATA_V2

2
include/configs/P1022DS.h
View File

@ -172,7 +172,6 @@
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
/* DDR Setup */
#define CONFIG_DDR_SPD
#define CONFIG_VERY_BIG_RAM
@ -217,7 +216,6 @@
#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600
#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8675f608
/*
* Memory map
*

7
include/configs/PATI.h
View File

@ -21,14 +21,12 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF00000
/* Serial Console Configuration */
#define CONFIG_5xx_CONS_SCI1
#undef CONFIG_5xx_CONS_SCI2
#define CONFIG_BAUDRATE 9600
/*
* BOOTP options
*/
@ -37,7 +35,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -47,7 +44,6 @@
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
@ -135,7 +131,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*-----------------------------------------------------------------------
@ -165,7 +160,6 @@
#define CONFIG_ENV_OFFSET ((0 - CONFIG_SYS_FLASH_BASE) - CONFIG_ENV_SIZE) /* Environment starts at this adress */
#endif
#define CONFIG_SPI 1
#define CONFIG_SYS_SPI_CS_USED 0x09 /* CS0 and CS3 are used */
#define CONFIG_SYS_SPI_CS_BASE 0x08 /* CS3 is active low */
@ -224,7 +218,6 @@
*/
#define CONFIG_SYS_OSC_CLK ((uint)4000000) /* Oscillator clock is 4MHz */
#define CONFIG_SYS_PLPRCR (PLPRCR_MF_9 | PLPRCR_DIVF_0)
/*-----------------------------------------------------------------------

8
include/configs/PIP405.h
View File

@ -21,13 +21,11 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
/***********************************************************
* Clock
***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
/*
* BOOTP options
*/
@ -36,7 +34,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -81,7 +78,6 @@
/* last 6 bits of the address */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
/***************************************************************
* Definitions for Serial Presence Detect EEPROM address
* (to get SDRAM settings)
@ -96,13 +92,11 @@
**************************************************************/
#define CONFIG_BAUDRATE 9600 /* STD Baudrate */
#define CONFIG_BOOTDELAY 5
/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
@ -231,7 +225,6 @@
#define CONFIG_PORT_ADDR 0xF4000000
#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in On Chip SRAM)
*/
@ -353,5 +346,4 @@
#define CONFIG_ISO_STRING "MEV-10066-001"
#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
#endif /* __CONFIG_H */

3
include/configs/PLU405.h
View File

@ -47,7 +47,6 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
/*
* BOOTP options
*/
@ -56,7 +55,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -86,7 +84,6 @@
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else

1
include/configs/PMC405DE.h
View File

@ -158,7 +158,6 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* 'E' for empty sector (flinfo) */
#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
/*
* Start addresses for the final memory configuration
* (Set up by the startup code)

1
include/configs/PMC440.h
View File

@ -158,7 +158,6 @@
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5

2
include/configs/T102xQDS.h
View File

@ -202,7 +202,6 @@
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
@ -879,7 +878,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BAUDRATE 115200
#define __USB_PHY_TYPE utmi
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1;\0" \
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \

2
include/configs/T102xRDB.h
View File

@ -217,7 +217,6 @@
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
@ -916,7 +915,6 @@ unsigned long get_board_ddr_clk(void);
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \

1
include/configs/T1040QDS.h
View File

@ -450,7 +450,6 @@ unsigned long get_board_ddr_clk(void);
#define I2C_MUX_PCA_ADDR 0x77
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
/* I2C bus multiplexer */
#define I2C_MUX_CH_DEFAULT 0x8
#define I2C_MUX_CH_DIU 0xC

1
include/configs/T104xRDB.h
View File

@ -709,7 +709,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#endif
#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */

1
include/configs/T208xQDS.h
View File

@ -744,7 +744,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
#endif
/*
* Dynamic MTD Partition support with mtdparts
*/

1
include/configs/T208xRDB.h
View File

@ -652,7 +652,6 @@ unsigned long get_board_ddr_clk(void);
#define FM1_10GEC4_PHY_ADDR 0x01
#endif
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC3"

3
include/configs/T4240QDS.h
View File

@ -343,7 +343,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_RAMBOOT
#endif
/* I2C */
#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
@ -404,7 +403,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SF_DEFAULT_SPEED 10000000
#define CONFIG_SF_DEFAULT_MODE 0
/* Qman/Bman */
#ifndef CONFIG_NOBQFMAN
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
@ -492,7 +490,6 @@ unsigned long get_board_ddr_clk(void);
#define FM2_10GEC2_PHY_ADDR 0x3
#endif
/* SATA */
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_LIBATA

6
include/configs/T4240RDB.h
View File

@ -154,14 +154,12 @@
#define CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR3
/*
* IFC Definitions
*/
#define CONFIG_SYS_FLASH_BASE 0xe0000000
#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else
@ -349,7 +347,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
#define CONFIG_BAUDRATE 115200
#define CONFIG_HVBOOT \
@ -572,7 +569,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_RAMBOOT
#endif
/* I2C */
#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
@ -606,7 +602,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SF_DEFAULT_SPEED 10000000
#define CONFIG_SF_DEFAULT_MODE 0
/* Qman/Bman */
#ifndef CONFIG_NOBQFMAN
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
@ -696,7 +691,6 @@ unsigned long get_board_ddr_clk(void);
#define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR
#endif
/* SATA */
#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_LIBATA

5
include/configs/TQM5200.h
View File

@ -117,7 +117,6 @@
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#endif /* #ifndef CONFIG_TQM5200S */
/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@ -151,7 +150,6 @@
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
#endif
/*
* BOOTP options
*/
@ -160,7 +158,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -198,7 +195,6 @@
#define CONFIG_CMD_DIAG
#endif
#define CONFIG_TIMESTAMP /* display image timestamps */
#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
@ -485,7 +481,6 @@
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET

3
include/configs/TQM823L.h
View File

@ -95,13 +95,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/
@ -115,7 +113,6 @@
#define CONFIG_CMD_BMP
#endif
#define CONFIG_NETCONSOLE
/*

2
include/configs/TQM823M.h
View File

@ -93,13 +93,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM834x.h
View File

@ -282,7 +282,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -307,7 +306,6 @@
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else

1
include/configs/TQM850L.h
View File

@ -84,7 +84,6 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION

3
include/configs/TQM850M.h
View File

@ -84,7 +84,6 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@ -99,10 +98,8 @@
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
#define CONFIG_NETCONSOLE
/*
* Miscellaneous configurable options
*/

2
include/configs/TQM855L.h
View File

@ -86,13 +86,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM855M.h
View File

@ -115,13 +115,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM860L.h
View File

@ -86,13 +86,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM860M.h
View File

@ -86,13 +86,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM862L.h
View File

@ -89,13 +89,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM862M.h
View File

@ -89,13 +89,11 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
/*
* Command line configuration.
*/

2
include/configs/TQM866M.h
View File

@ -127,7 +127,6 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@ -135,7 +134,6 @@
#define CONFIG_TIMESTAMP /* but print image timestmps */
/*
* Command line configuration.
*/

3
include/configs/VCMA9.h
View File

@ -13,7 +13,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define MACH_TYPE_MPL_VCMA9 227
/*
@ -29,7 +28,6 @@
#define CONFIG_SYS_TEXT_BASE 0x0
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
/* input clock of PLL (VCMA9 has 12MHz input clock) */
@ -113,7 +111,6 @@
/* RTC */
#define CONFIG_RTC_S3C24X0
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

1
include/configs/VOM405.h
View File

@ -74,7 +74,6 @@
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else

1
include/configs/a3m071.h
View File

@ -230,7 +230,6 @@
* +- 31 0 PSC1
*/
/*
* Miscellaneous configurable options
*/

3
include/configs/a4m072.h
View File

@ -88,7 +88,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -222,7 +221,6 @@
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
@ -276,7 +274,6 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Various low-level settings
*/

1
include/configs/ac14xx.h
View File

@ -342,7 +342,6 @@
CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN)
#define CONFIG_CMDLINE_EDITING 1 /* command line history */
/* I2C */

1
include/configs/am3517_crane.h
View File

@ -134,7 +134,6 @@
#define CONFIG_CMD_MMC /* MMC support */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000

2
include/configs/amcc-common.h
View File

@ -10,7 +10,6 @@
#ifndef __AMCC_COMMON_H
#define __AMCC_COMMON_H
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
@ -88,7 +87,6 @@
#define CONFIG_VERSION_VARIABLE /* include version env variable */
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */

1
include/configs/apf27.h
View File

@ -147,7 +147,6 @@
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_PREBOOT "run check_flash check_env;"
/*
* Boot Linux
*/

2
include/configs/apx4devkit.h
View File

@ -38,7 +38,6 @@
#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Environment */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_NAND
@ -92,7 +91,6 @@
#define CONFIG_USB_STORAGE
#endif
/* RTC */
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_PCF8563

1
include/configs/astro_mcf5373l.h
View File

@ -68,7 +68,6 @@
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMDLINE_EDITING
#define CONFIG_MCFRTC
#undef RTC_DEBUG

1
include/configs/at91rm9200ek.h
View File

@ -60,7 +60,6 @@
#define CONFIG_CMD_BOOTZ
/*
* Memory Configuration
*/

1
include/configs/at91sam9rlek.h
View File

@ -61,7 +61,6 @@
#undef CONFIG_FB_ADDR
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
/* LED */
#define CONFIG_AT91_LED
#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */

1
include/configs/at91sam9x5ek.h
View File

@ -74,7 +74,6 @@
* NB: in this case, USB 1.1 devices won't be recognized.
*/
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000

2
include/configs/atngw100.h
View File

@ -86,7 +86,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC
#define CONFIG_ATMEL_USART
#define CONFIG_MACB
#define CONFIG_PORTMUX_PIO
@ -97,7 +96,6 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_ATMEL_SPI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32

2
include/configs/atngw100mkii.h
View File

@ -106,7 +106,6 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_MII
#define CONFIG_ATMEL_USART
#define CONFIG_MACB
#define CONFIG_PORTMUX_PIO
@ -117,7 +116,6 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_ATMEL_SPI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32

1
include/configs/atstk1002.h
View File

@ -107,7 +107,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC
#define CONFIG_ATMEL_USART
#define CONFIG_MACB
#define CONFIG_PORTMUX_PIO

1
include/configs/baltos.h
View File

@ -198,7 +198,6 @@
"run mmcboot;" \
"run nandboot;"
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */

9
include/configs/bct-brettl2.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf536-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -39,14 +37,12 @@
#define CONFIG_SCLK_DIV 3
#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
/*
* Memory Settings
*/
#define CONFIG_MEM_ADD_WDTH 9
#define CONFIG_MEM_SIZE 32
/*
* SDRAM Settings
*/
@ -60,7 +56,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -75,7 +70,6 @@
#define CONFIG_ROOTPATH "/romfs/brettl2"
#endif
/*
* Flash Settings
*/
@ -87,7 +81,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 135
/*
* Env Storage Settings
*/
@ -115,14 +108,12 @@
common/env_embedded.o (.text*);
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* Misc Settings
*/

5
include/configs/bf506f-ezkit.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf506-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -52,7 +49,6 @@
#define CONFIG_SYS_MONITOR_LEN (4 * 1024)
#define CONFIG_SYS_MALLOC_LEN (4 * 1024)
/*
* Flash Settings
*/
@ -79,7 +75,6 @@
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE 0x400
/*
* Misc Settings
*/

9
include/configs/bf518f-ezbrd.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf518-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -56,7 +53,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
@ -98,7 +94,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71
/*
* SPI Settings
*/
@ -106,7 +101,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -124,14 +118,12 @@
#endif
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* SDH Settings
*/
@ -141,7 +133,6 @@
#define CONFIG_BFIN_SDH
#endif
/*
* Misc Settings
*/

11
include/configs/bf526-ezbrd.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf526-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -56,7 +53,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
/*
* NAND Settings
* (can't be used same time as ethernet)
@ -73,7 +69,6 @@
#define CONFIG_CMD_NAND
#endif
/*
* Network Settings
*/
@ -96,7 +91,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71
/*
* SPI Settings
*/
@ -104,7 +98,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -122,14 +115,12 @@
#endif
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* USB Settings
*/
@ -141,7 +132,6 @@
#define CONFIG_USB_MUSB_TIMEOUT 100000
#endif
/*
* Misc Settings
*/
@ -167,7 +157,6 @@
/* #define STATUS_LED_BIT2 GPIO_PG12 */
#endif
/*
* Pull in common ADI header for remaining command/environment setup
*/

10
include/configs/bf527-ad7160-eval.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/*
* NAND Settings
* (can't be used same time as ethernet)
@ -71,7 +67,6 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif
/*
* Flash Settings
*/
@ -82,7 +77,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259
/*
* SPI Settings
*/
@ -90,7 +84,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -113,14 +106,12 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* SPI_MMC Settings
*/
@ -128,7 +119,6 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI
/*
* Misc Settings
*/

9
include/configs/bf527-ezkit.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
/*
* Memory Settings
*/
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/*
* NAND Settings
* (can't be used same time as ethernet)
@ -71,7 +67,6 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif
/*
* Network Settings
*/
@ -94,7 +89,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259
/*
* SPI Settings
*/
@ -102,7 +96,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -125,14 +118,12 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* USB Settings
*/

8
include/configs/bf527-sdp.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -42,7 +40,6 @@
#define CONFIG_PLL_CTL_VAL 0x2a00
#define CONFIG_VR_CTL_VAL 0x7090
/*
* Memory Settings
*/
@ -59,7 +56,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/*
* Flash Settings
*/
@ -70,7 +66,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259
/*
* SPI Settings
*/
@ -79,7 +74,6 @@
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH_ALL
/*
* Env Storage Settings
*/
@ -98,14 +92,12 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* Misc Settings
*/

6
include/configs/bf533-ezkit.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -60,7 +57,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -76,7 +72,6 @@
} while (0)
#define CONFIG_HOSTNAME bf533-ezkit
/*
* Flash Settings
*/
@ -88,7 +83,6 @@
#define CONFIG_ENV_SECT_SIZE 0x10000
#define FLASH_TOT_SECT 40
/*
* I2C Settings
*/

6
include/configs/bf533-stamp.h
View File

@ -7,7 +7,6 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
@ -53,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
@ -69,7 +67,6 @@
} while (0)
#define CONFIG_HOSTNAME bf533-stamp
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
@ -134,7 +131,6 @@
common/env_embedded.o (.text*);
#endif
/*
* I2C Settings
*/
@ -177,7 +173,6 @@
#define CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2
#endif
/*
* Misc Settings
*/
@ -211,7 +206,6 @@
/* define to enable splash screen support */
/* #define CONFIG_VIDEO */
/*
* Pull in common ADI header for remaining command/environment setup
*/

9
include/configs/bf537-minotaur.h
View File

@ -20,14 +20,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -51,7 +49,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -68,7 +65,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_SYS_MALLOC_LEN (128 << 10)
/*
* Network Settings
*/
@ -87,14 +83,12 @@
#define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_ROOTPATH "/romfs"
/*
* Flash Settings
*/
/* We don't have a parallel flash chip there */
#define CONFIG_SYS_NO_FLASH
/*
* SPI Settings
*/
@ -102,7 +96,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -112,7 +105,6 @@
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C settings
*/
@ -121,7 +113,6 @@
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0
/*
* Misc Settings
*/

10
include/configs/bf537-pnav.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
/*
* Memory Settings
*/
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -75,7 +71,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71
/*
* SPI Settings
*/
@ -83,7 +78,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -112,7 +106,6 @@
common/env_embedded.o (.text*);
#endif
/*
* NAND Settings
*/
@ -133,14 +126,12 @@
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF12
/*
* I2C settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* Misc Settings
*/
@ -157,7 +148,6 @@
#define CONFIG_BOOTCOMMAND "run nandboot"
#define CONFIG_BOOTARGS_ROOT "/dev/mtdblock1 rw rootfstype=yaffs"
/*
* Pull in common ADI header for remaining command/environment setup
*/

8
include/configs/bf537-srv1.h
View File

@ -20,14 +20,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -51,7 +49,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -68,7 +65,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_SYS_MALLOC_LEN (384 << 10)
/*
* Network Settings
*/
@ -93,7 +89,6 @@
/* We don't have a parallel flash chip there */
#define CONFIG_SYS_NO_FLASH
/*
* SPI Settings
*/
@ -101,7 +96,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -111,7 +105,6 @@
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C settings
*/
@ -120,7 +113,6 @@
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0
/*
* Misc Settings
*/

10
include/configs/bf537-stamp.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
/*
* Memory Settings
*/
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
@ -77,7 +73,6 @@
/* some have 67 sectors (M29W320DB), but newer have 71 (M29W320EB) */
#define CONFIG_SYS_MAX_FLASH_SECT 71
/*
* SPI Settings
*/
@ -86,7 +81,6 @@
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH_ALL
/*
* Env Storage Settings
*/
@ -120,14 +114,12 @@
common/env_embedded.o (.text*);
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* SPI_MMC Settings
*/
@ -243,7 +235,6 @@
#endif
/*
* Misc Settings
*/
@ -270,7 +261,6 @@
#define CONFIG_BOOTCOMMAND "bootldr 0x203f0100"
#endif
/*
* Pull in common ADI header for remaining command/environment setup
*/

8
include/configs/bf538f-ezkit.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf538-0.4
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
/*
* Memory Settings
*/
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
@ -64,7 +60,6 @@
#define CONFIG_SMC91111_BASE 0x20310300
#define CONFIG_HOSTNAME bf538f-ezkit
/*
* Flash Settings
*/
@ -75,7 +70,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 71
/*
* SPI Settings
*/
@ -119,14 +113,12 @@
common/env_embedded.o (.text*);
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* Misc Settings
*/

12
include/configs/bf548-ezkit.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
/*
* Memory Settings
*/
@ -64,7 +61,6 @@
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MALLOC_LEN (768 * 1024)
/*
* Network Settings
*/
@ -74,7 +70,6 @@
#define CONFIG_SMC911X_16_BIT
#define CONFIG_HOSTNAME bf548-ezkit
/*
* Flash Settings
*/
@ -85,7 +80,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259
/*
* SPI Settings
*/
@ -93,7 +87,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -133,7 +126,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* SATA
*/
@ -146,7 +138,6 @@
#define CONFIG_BFIN_ATA_MODE XFER_PIO_4
#endif
/*
* SDH Settings
*/
@ -156,7 +147,6 @@
#define CONFIG_BFIN_SDH
#endif
/*
* USB Settings
*/
@ -168,7 +158,6 @@
#define CONFIG_USB_MUSB_TIMEOUT 100000
#endif
/*
* Misc Settings
*/
@ -199,7 +188,6 @@
#define CONFIG_SYS_POST_FLASH_END 127
#endif
/*
* Pull in common ADI header for remaining command/environment setup
*/

11
include/configs/bf561-acvilon.h
View File

@ -8,14 +8,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf561-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -39,7 +37,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -56,7 +53,6 @@
#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* RTC Settings
*/
@ -71,7 +67,6 @@
#define CONFIG_SYS_DTT_LOW_TEMP -30
#define CONFIG_SYS_DTT_HYSTERESIS 3*/
/*
* Network Settings
*/
@ -91,13 +86,11 @@
#define CONFIG_HOSTNAME bf561-acvilon
/*
* Flash Settings
*/
#define CONFIG_SYS_NO_FLASH
/*
* I2C Settings
*/
@ -107,7 +100,6 @@
#define CONFIG_PCA9564_I2C
#define CONFIG_PCA9564_BASE 0x2c000000
/*
* SPI Settings
*/
@ -115,7 +107,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 10000000
#define CONFIG_SF_DEFAULT_SPEED 10000000
/*
* Env Storage Settings
*/
@ -124,7 +115,6 @@
#define CONFIG_ENV_OFFSET ((16 + 256) * 1056)
#define CONFIG_ENV_SIZE (8 * 1056)
/*
* NAND Settings
* We're using NAND_PLAT driver to make things simplier
@ -146,7 +136,6 @@
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10
/*
* Misc Settings
*/

7
include/configs/bf561-ezkit.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf561-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -38,7 +36,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 6
/*
* Memory Settings
*/
@ -55,7 +52,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -65,7 +61,6 @@
#define CONFIG_SMC_USE_32_BIT 1
#define CONFIG_HOSTNAME bf561-ezkit
/*
* Flash Settings
*/
@ -82,7 +77,6 @@
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_SECT_SIZE 0x2000
/*
* I2C Settings
*/
@ -106,7 +100,6 @@
*/
/* #define CONFIG_CORE1_RUN 1 */
/*
* Pull in common ADI header for remaining command/environment setup
*/

1
include/configs/bf609-ezkit.h
View File

@ -13,7 +13,6 @@
#define CONFIG_BFIN_CPU bf609-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/* For ez-board version 1.0, else undef this */
#define CONFIG_BFIN_BOARD_VERSION_1_0

8
include/configs/br4.h
View File

@ -10,14 +10,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
@ -75,7 +71,6 @@
*/
#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */
/*
* SPI Settings
*/
@ -83,7 +78,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
/*
* Env Storage Settings
*/
@ -93,14 +87,12 @@
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* NAND Settings
*/

1
include/configs/canmb.h
View File

@ -135,7 +135,6 @@
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET

1
include/configs/charon.h
View File

@ -34,7 +34,6 @@
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"
/* additional features on charon board */
#define CONFIG_RESET_PHY_R

8
include/configs/cm-bf527.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000)
/*
* Memory Settings
*/
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* NAND Settings
* (can't be used sametime as ethernet)
@ -71,7 +67,6 @@
#define CONFIG_CMD_NAND
#endif
/*
* Network Settings
*/
@ -95,7 +90,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 67
/*
* Env Storage Settings
*/
@ -106,14 +100,12 @@
#define CONFIG_ENV_SECT_SIZE 0x8000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* Misc Settings
*/

7
include/configs/cm-bf533.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
/*
* Memory Settings
*/
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -67,7 +63,6 @@
#define CONFIG_SMC91111_BASE 0x20200300
#define CONFIG_HOSTNAME cm-bf533
/*
* Flash Settings
*/
@ -78,7 +73,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 16
/*
* Env Storage Settings
*/
@ -87,7 +81,6 @@
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x10000
/*
* Misc Settings
*/

9
include/configs/cm-bf537e.h
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@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
/*
* Memory Settings
*/
@ -58,7 +55,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -83,14 +79,12 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 35
/*
* SPI Settings
*/
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000
/*
* Env Storage Settings
*/
@ -115,14 +109,12 @@
common/env_embedded.o (.text*);
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* SPI_MMC Settings
*/
@ -130,7 +122,6 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI
/*
* Misc Settings
*/

8
include/configs/cm-bf537u.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -40,7 +38,6 @@
/* Core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
/*
* Memory Settings
*/
@ -57,7 +54,6 @@
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* Network Settings
*/
@ -81,14 +77,12 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 35
/*
* SPI Settings
*/
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000
/*
* Env Storage Settings
*/
@ -113,14 +107,12 @@
common/env_embedded.o (.text*);
#endif
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* SPI_MMC Settings
*/

9
include/configs/cm-bf548.h
View File

@ -7,14 +7,12 @@
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@ -41,7 +39,6 @@
/* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
/*
* Memory Settings
*/
@ -67,7 +64,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (640 * 1024)
/*
* Network Settings
*/
@ -77,7 +73,6 @@
#define CONFIG_SMC911X_16_BIT
#define CONFIG_HOSTNAME cm-bf548
/*
* Flash Settings
*/
@ -88,7 +83,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 259
/*
* Env Storage Settings
*/
@ -98,14 +92,12 @@
#define CONFIG_ENV_SIZE 0x8000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
/*
* Misc Settings
*/
@ -134,7 +126,6 @@
#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */
#endif
/*
* Pull in common ADI header for remaining command/environment setup
*/

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