powerpc/85xx: Specify CONFIG_SYS_FM_MURAM_SIZE
CONFIG_SYS_FM_MURAM_SIZE varies from SoC to SoC to specify it in config_mpc85xx.h for those parts with a Frame Manager. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -166,6 +166,7 @@
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#define CONFIG_SYS_QMAN_NUM_PORTALS 3
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#define CONFIG_SYS_BMAN_NUM_PORTALS 3
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#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
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#elif defined(CONFIG_P1020)
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#define CONFIG_MAX_CPUS 2
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@ -203,6 +204,7 @@
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#define CONFIG_SYS_QMAN_NUM_PORTALS 3
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#define CONFIG_SYS_BMAN_NUM_PORTALS 3
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#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
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/* P1024 is lower end variant of P1020 */
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#elif defined(CONFIG_P1024)
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@ -246,6 +248,7 @@
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#define CONFIG_SYS_NUM_FMAN 1
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#define CONFIG_SYS_NUM_FM1_DTSEC 5
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
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#elif defined(CONFIG_PPC_P3041)
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#define CONFIG_MAX_CPUS 4
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@ -255,11 +258,13 @@
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#define CONFIG_SYS_NUM_FM1_DTSEC 5
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#define CONFIG_SYS_NUM_FM1_10GEC 1
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
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#elif defined(CONFIG_PPC_P4040)
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#define CONFIG_MAX_CPUS 4
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#define CONFIG_SYS_FSL_NUM_LAWS 32
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#define CONFIG_SYS_FSL_SEC_COMPAT 4
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#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
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#elif defined(CONFIG_PPC_P4080)
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#define CONFIG_MAX_CPUS 8
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@ -271,6 +276,7 @@
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#define CONFIG_SYS_NUM_FM1_10GEC 1
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#define CONFIG_SYS_NUM_FM2_10GEC 1
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#define CONFIG_NUM_DDR_CONTROLLERS 2
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#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
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#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
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#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
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#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
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@ -290,6 +296,7 @@
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#define CONFIG_SYS_NUM_FM1_DTSEC 5
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#define CONFIG_SYS_NUM_FM1_10GEC 1
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
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#elif defined(CONFIG_PPC_P5020)
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#define CONFIG_MAX_CPUS 2
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@ -299,6 +306,7 @@
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#define CONFIG_SYS_NUM_FM1_DTSEC 5
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#define CONFIG_SYS_NUM_FM1_10GEC 1
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#define CONFIG_NUM_DDR_CONTROLLERS 2
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#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
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#else
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#error Processor type not defined for this platform
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