rockchip: enable SYS_NS16550 for all SoCs by default
All rockchip SoCs can use ns16550 driver, enable it for all and set SYS_NS16550_MEM32 for all SoCs. Version-changes: 2 - use imply instead of select Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -1185,6 +1185,7 @@ config ARCH_ROCKCHIP
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imply TPL_SYSRESET
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imply ADC
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imply SARADC_ROCKCHIP
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imply SYS_NS16550
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config TARGET_THUNDERX_88XX
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bool "Support ThunderX 88xx"
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@ -103,7 +103,6 @@ config ROCKCHIP_RK3368
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imply SPL_SERIAL_SUPPORT
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imply TPL_SERIAL_SUPPORT
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select DEBUG_UART_BOARD_INIT
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select SYS_NS16550
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help
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The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
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into a big and little cluster with 4 cores each) Cortex-A53 including
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@ -18,9 +18,6 @@
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#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
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#define CONFIG_SYS_LOAD_ADDR 0x60800800
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#define CONFIG_SPL_STACK 0x10081fff
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@ -19,8 +19,6 @@
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#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
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#define CONFIG_SYS_LOAD_ADDR 0x60800800
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@ -18,7 +18,6 @@
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#define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
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#define CONFIG_SYS_LOAD_ADDR 0x60800800
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#define CONFIG_SPL_STACK 0x10088000
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@ -19,8 +19,6 @@
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#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SYS_NS16550_MEM32
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#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
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/* Bootrom will load u-boot binary to 0x0 once return from SPL */
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#endif
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@ -18,9 +18,6 @@
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#define CONFIG_SYS_TIMER_BASE 0x10350020
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_SDRAM_BASE 0x60000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
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