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sunxi: Enable NAND controller on the CHIP

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Enable the NAND controller in the sun5i-r8-chip.dts.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
Boris Brezillon 2016-06-15 21:09:28 +02:00 committed by Scott Wood
parent a0dfa88b4e
commit c1aa7d629e
3 changed files with 44 additions and 0 deletions

14
arch/arm/dts/sun5i-a10s.dtsi
View File

@ -241,6 +241,20 @@
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs2_pins_a: nand_cs@2 {
allwinner,pins = "PC17";
allwinner,function = "nand0";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
nand_cs3_pins_a: nand_cs@3 {
allwinner,pins = "PC18";
allwinner,function = "nand0";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
};
&sram_a {

15
arch/arm/dts/sun5i-a13-olinuxino.dts
View File

@ -155,6 +155,21 @@
status = "okay";
};
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
status = "okay";
nand@0 {
#address-cells = <2>;
#size-cells = <2>;
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
allwinner,randomize;
};
};
&ohci0 {
status = "okay";
};

15
arch/arm/dts/sun5i-r8-chip.dts
View File

@ -142,6 +142,21 @@
status = "okay";
};
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
status = "okay";
nand@0 {
#address-cells = <2>;
#size-cells = <2>;
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
nand-on-flash-bbt;
};
};
&ohci0 {
status = "okay";
};