ARM64: zynqmp: List all SMMU ids
Add SMMU description for all tested IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Michal Simek
parent
d64e43f1d4
commit
ba6ad317d0
@ -315,6 +315,8 @@
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interrupts = <0 124 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14e8>;
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power-domains = <&pd_gdma>;
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};
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@ -326,6 +328,8 @@
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interrupts = <0 125 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14e9>;
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power-domains = <&pd_gdma>;
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};
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@ -337,6 +341,8 @@
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interrupts = <0 126 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ea>;
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power-domains = <&pd_gdma>;
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};
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@ -348,6 +354,8 @@
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interrupts = <0 127 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14eb>;
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power-domains = <&pd_gdma>;
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};
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@ -359,6 +367,8 @@
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interrupts = <0 128 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ec>;
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power-domains = <&pd_gdma>;
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};
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@ -370,6 +380,8 @@
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interrupts = <0 129 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ed>;
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power-domains = <&pd_gdma>;
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};
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@ -381,6 +393,8 @@
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interrupts = <0 130 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ee>;
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power-domains = <&pd_gdma>;
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};
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@ -392,6 +406,8 @@
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interrupts = <0 131 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ef>;
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power-domains = <&pd_gdma>;
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};
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@ -413,6 +429,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 77 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x868>;
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power-domains = <&pd_adma>;
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};
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@ -423,6 +441,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 78 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x869>;
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power-domains = <&pd_adma>;
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};
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@ -433,6 +453,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 79 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86a>;
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power-domains = <&pd_adma>;
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};
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@ -443,6 +465,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 80 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86b>;
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power-domains = <&pd_adma>;
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};
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@ -453,6 +477,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 81 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86c>;
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power-domains = <&pd_adma>;
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};
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@ -463,6 +489,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 82 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86d>;
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power-domains = <&pd_adma>;
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};
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@ -473,6 +501,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 83 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86e>;
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power-domains = <&pd_adma>;
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};
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@ -483,6 +513,8 @@
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interrupt-parent = <&gic>;
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interrupts = <0 84 4>;
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xlnx,bus-width = <64>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86f>;
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power-domains = <&pd_adma>;
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};
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@ -502,6 +534,8 @@
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interrupts = <0 14 4>;
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#address-cells = <2>;
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#size-cells = <1>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x872>;
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power-domains = <&pd_nand>;
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};
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@ -515,6 +549,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x874>;
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power-domains = <&pd_eth0>;
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};
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@ -528,6 +563,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x875>;
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power-domains = <&pd_eth1>;
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};
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@ -541,6 +577,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x876>;
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power-domains = <&pd_eth2>;
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};
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@ -554,6 +591,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x877>;
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power-domains = <&pd_eth3>;
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};
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@ -636,6 +674,8 @@
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<0x0 0xc0000000 0x8000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x873>;
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power-domains = <&pd_qspi>;
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};
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@ -666,6 +706,8 @@
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reg = <0x0 0xff160000 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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broken-tuning;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x870>;
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power-domains = <&pd_sd0>;
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};
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@ -678,12 +720,15 @@
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reg = <0x0 0xff170000 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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broken-tuning;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x871>;
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power-domains = <&pd_sd1>;
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};
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smmu: smmu@fd800000 {
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compatible = "arm,mmu-500";
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reg = <0x0 0xfd800000 0x20000>;
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#iommu-cells = <1>;
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#global-interrupts = <1>;
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interrupt-parent = <&gic>;
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interrupts = <0 155 4>,
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@ -694,7 +739,29 @@
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mmu-masters = < &gem0 0x874
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&gem1 0x875
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&gem2 0x876
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&gem3 0x877 >;
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&gem3 0x877
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&usb0 0x860
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&usb1 0x861
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&qspi 0x873
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&lpd_dma_chan1 0x868
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&lpd_dma_chan2 0x869
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&lpd_dma_chan3 0x86a
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&lpd_dma_chan4 0x86b
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&lpd_dma_chan5 0x86c
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&lpd_dma_chan6 0x86d
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&lpd_dma_chan7 0x86e
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&lpd_dma_chan8 0x86f
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&fpd_dma_chan1 0x14e8
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&fpd_dma_chan2 0x14e9
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&fpd_dma_chan3 0x14ea
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&fpd_dma_chan4 0x14eb
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&fpd_dma_chan5 0x14ec
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&fpd_dma_chan6 0x14ed
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&fpd_dma_chan7 0x14ee
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&fpd_dma_chan8 0x14ef
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&sdhci0 0x870
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&sdhci1 0x871
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&nand0 0x872>;
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};
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spi0: spi@ff040000 {
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@ -790,6 +857,8 @@
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compatible = "xlnx,zynqmp-dwc3";
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clock-names = "bus_clk", "ref_clk";
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clocks = <&clk125>, <&clk125>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x860>;
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power-domains = <&pd_usb0>;
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ranges;
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@ -811,6 +880,8 @@
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compatible = "xlnx,zynqmp-dwc3";
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clock-names = "bus_clk", "ref_clk";
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clocks = <&clk125>, <&clk125>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x861>;
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power-domains = <&pd_usb1>;
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ranges;
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