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@@ -7,7 +7,7 @@ obj-$(CONFIG_USB_GADGET_DOWNLOAD) += gadget.o
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obj-$(CONFIG_MISC_COMMON) += misc.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_BOARD_COMMON) += board.o
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obj-$(CONFIG_BOARD_COMMON) += board.o sromc.o
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ifdef CONFIG_EXYNOS5_DT
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obj-y += exynos5-dt.o
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obj-$(CONFIG_BOARD_TYPES) += exynos5-dt-types.o
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@@ -26,7 +26,6 @@
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#include <asm/arch/pinmux.h>
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#include <asm/arch/power.h>
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#include <asm/arch/system.h>
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#include <asm/arch/sromc.h>
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#include <lcd.h>
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#include <i2c.h>
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#include <mmc.h>
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@@ -195,83 +194,6 @@ int power_init_board(void)
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}
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#endif
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#ifdef CONFIG_SMC911X
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static int decode_sromc(const void *blob, struct fdt_sromc *config)
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{
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int err;
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int node;
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node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
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if (node < 0) {
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debug("Could not find SROMC node\n");
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return node;
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}
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config->bank = fdtdec_get_int(blob, node, "bank", 0);
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config->width = fdtdec_get_int(blob, node, "width", 2);
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err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
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FDT_SROM_TIMING_COUNT);
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if (err < 0) {
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debug("Could not decode SROMC configuration Error: %s\n",
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fdt_strerror(err));
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return -FDT_ERR_NOTFOUND;
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}
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return 0;
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}
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#endif
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int board_eth_init(struct bd_info *bis)
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{
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#ifdef CONFIG_SMC911X
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u32 smc_bw_conf, smc_bc_conf;
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struct fdt_sromc config;
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fdt_addr_t base_addr;
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int node;
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node = decode_sromc(gd->fdt_blob, &config);
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if (node < 0) {
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debug("%s: Could not find sromc configuration\n", __func__);
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return 0;
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}
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node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
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if (node < 0) {
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debug("%s: Could not find lan9215 configuration\n", __func__);
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return 0;
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}
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/* We now have a node, so any problems from now on are errors */
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base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
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if (base_addr == FDT_ADDR_T_NONE) {
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debug("%s: Could not find lan9215 address\n", __func__);
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return -1;
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}
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/* Ethernet needs data bus width of 16 bits */
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if (config.width != 2) {
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debug("%s: Unsupported bus width %d\n", __func__,
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config.width);
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return -1;
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}
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smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
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| SROMC_BYTE_ENABLE(config.bank);
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smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
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SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
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SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
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SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
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SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
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SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
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SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
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/* Select and configure the SROMC bank */
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exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
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s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
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return smc911x_initialize(0, base_addr);
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#endif
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return 0;
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}
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#if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
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int checkboard(void)
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{
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76
board/samsung/common/sromc.c
Normal file
76
board/samsung/common/sromc.c
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@@ -0,0 +1,76 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 Google LLC
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*/
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#define LOG_CATEGORY UCLASS_ETH
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/sromc.h>
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enum {
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FDT_SROM_PMC,
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FDT_SROM_TACP,
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FDT_SROM_TAH,
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FDT_SROM_TCOH,
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FDT_SROM_TACC,
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FDT_SROM_TCOS,
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FDT_SROM_TACS,
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FDT_SROM_TIMING_COUNT,
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};
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static int exyno5_sromc_probe(struct udevice *dev)
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{
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u32 timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
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u32 smc_bw_conf, smc_bc_conf;
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int bank; /* srom bank number */
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int width; /* bus width in bytes */
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int ret;
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if (!IS_ENABLED(CONFIG_SMC911X))
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return 0;
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bank = dev_read_s32_default(dev, "bank", 0);
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width = dev_read_s32_default(dev, "width", 2);
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/* Ethernet needs data bus width of 16 bits */
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if (width != 2) {
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log_debug("Unsupported bus width %d\n", width);
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return log_msg_ret("width", -EINVAL);
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}
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ret = dev_read_u32_array(dev, "srom-timing", timing,
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FDT_SROM_TIMING_COUNT);
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if (ret)
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return log_msg_ret("sromc", -EINVAL);
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smc_bw_conf = SROMC_DATA16_WIDTH(bank) | SROMC_BYTE_ENABLE(bank);
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smc_bc_conf = SROMC_BC_TACS(timing[FDT_SROM_TACS]) |
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SROMC_BC_TCOS(timing[FDT_SROM_TCOS]) |
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SROMC_BC_TACC(timing[FDT_SROM_TACC]) |
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SROMC_BC_TCOH(timing[FDT_SROM_TCOH]) |
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SROMC_BC_TAH(timing[FDT_SROM_TAH]) |
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SROMC_BC_TACP(timing[FDT_SROM_TACP]) |
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SROMC_BC_PMC(timing[FDT_SROM_PMC]);
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/* Select and configure the SROMC bank */
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exynos_pinmux_config(PERIPH_ID_SROMC, bank);
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s5p_config_sromc(bank, smc_bw_conf, smc_bc_conf);
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return 0;
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}
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static const struct udevice_id exyno5_sromc_ids[] = {
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{ .compatible = "samsung,exynos5-sromc" },
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{}
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};
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U_BOOT_DRIVER(exyno5_sromc) = {
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.name = "exyno5_sromc",
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.id = UCLASS_SIMPLE_BUS,
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.of_match = exyno5_sromc_ids,
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.probe = exyno5_sromc_probe,
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};
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@@ -73,15 +73,6 @@ int dram_init_banksize(void)
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return 0;
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}
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int board_eth_init(struct bd_info *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC911X
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rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#endif
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return rc;
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}
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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