microblaze: Remove interrupt handler
The primary purpose for this code was timer. By converting it to CONFIG_TIMER there is no code which uses this implementation that's why remove it. If there is a need to handle interrupts this patch can be reverted in future. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com
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Michal Simek
parent
a36d86720f
commit
aec051d813
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@ -74,7 +74,6 @@ config M68K
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config MICROBLAZE
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bool "MicroBlaze architecture"
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select SUPPORT_OF_CONTROL
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imply CMD_IRQ
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imply CMD_TIMER
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imply SPL_REGMAP if SPL
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imply SPL_TIMER if SPL
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@ -8,17 +8,8 @@
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*/
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#include <common.h>
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#include <command.h>
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#include <fdtdec.h>
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#include <irq_func.h>
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#include <log.h>
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#include <malloc.h>
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#include <asm/global_data.h>
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#include <asm/microblaze_intc.h>
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#include <asm/asm.h>
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DECLARE_GLOBAL_DATA_PTR;
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void enable_interrupts(void)
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{
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debug("Enable interrupts for the whole CPU\n");
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@ -34,183 +25,12 @@ int disable_interrupts(void)
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return (msr & 0x2) != 0;
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}
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static struct irq_action *vecs;
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static u32 irq_no;
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/* mapping structure to interrupt controller */
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microblaze_intc_t *intc;
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/* default handler */
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static void def_hdlr(void)
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{
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puts("def_hdlr\n");
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}
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static void enable_one_interrupt(int irq)
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{
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int mask;
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int offset = 1;
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offset <<= irq;
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mask = intc->ier;
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intc->ier = (mask | offset);
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debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
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intc->ier);
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debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
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intc->iar, intc->mer);
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}
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static void disable_one_interrupt(int irq)
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{
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int mask;
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int offset = 1;
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offset <<= irq;
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mask = intc->ier;
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intc->ier = (mask & ~offset);
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debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
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intc->ier);
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debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
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intc->iar, intc->mer);
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}
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int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
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{
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struct irq_action *act;
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/* irq out of range */
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if ((irq < 0) || (irq > irq_no)) {
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puts("IRQ out of range\n");
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return -1;
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}
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act = &vecs[irq];
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if (hdlr) { /* enable */
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act->handler = hdlr;
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act->arg = arg;
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act->count = 0;
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enable_one_interrupt(irq);
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return 0;
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}
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/* Disable */
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act->handler = (interrupt_handler_t *)def_hdlr;
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act->arg = (void *)irq;
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disable_one_interrupt(irq);
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return 1;
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}
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/* initialization interrupt controller - hardware */
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static void intc_init(void)
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{
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intc->mer = 0;
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intc->ier = 0;
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intc->iar = 0xFFFFFFFF;
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/* XIntc_Start - hw_interrupt enable and all interrupt enable */
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intc->mer = 0x3;
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debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
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intc->iar, intc->mer);
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}
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int interrupt_init(void)
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{
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int i;
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const void *blob = gd->fdt_blob;
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int node = 0;
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debug("INTC: Initialization\n");
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node = fdt_node_offset_by_compatible(blob, node,
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"xlnx,xps-intc-1.00.a");
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if (node != -1) {
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fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
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if (base == FDT_ADDR_T_NONE)
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return -1;
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debug("INTC: Base addr %lx\n", base);
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intc = (microblaze_intc_t *)base;
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irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
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debug("INTC: IRQ NO %x\n", irq_no);
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} else {
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return node;
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}
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if (irq_no) {
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vecs = calloc(1, sizeof(struct irq_action) * irq_no);
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if (vecs == NULL) {
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puts("Interrupt vector allocation failed\n");
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return -1;
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}
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/* initialize irq list */
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for (i = 0; i < irq_no; i++) {
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vecs[i].handler = (interrupt_handler_t *)def_hdlr;
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vecs[i].arg = (void *)i;
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vecs[i].count = 0;
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}
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/* initialize intc controller */
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intc_init();
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enable_interrupts();
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} else {
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puts("Undefined interrupt controller\n");
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}
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return 0;
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}
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void interrupt_handler(void)
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{
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int irqs = intc->ivr; /* find active interrupt */
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int mask = 1;
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int value;
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struct irq_action *act = vecs + irqs;
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debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
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intc->iar, intc->mer);
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#ifdef DEBUG
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R14(value);
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#endif
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debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
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debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
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(u32)act->handler, act->count, (u32)act->arg);
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act->handler(act->arg);
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act->count++;
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intc->iar = mask << irqs;
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debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
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intc->ier, intc->iar, intc->mer);
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#ifdef DEBUG
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R14(value);
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#endif
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debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
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panic("Interrupt occurred\n");
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}
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#if defined(CONFIG_CMD_IRQ)
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int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[])
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{
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int i;
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struct irq_action *act = vecs;
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if (irq_no) {
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puts("\nInterrupt-Information:\n\n"
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"Nr Routine Arg Count\n"
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"-----------------------------\n");
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for (i = 0; i < irq_no; i++) {
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if (act->handler != (interrupt_handler_t *)def_hdlr) {
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printf("%02d %08x %08x %d\n", i,
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(int)act->handler, (int)act->arg,
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act->count);
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}
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act++;
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}
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puts("\n");
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} else {
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puts("Undefined interrupt controller\n");
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}
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return 0;
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}
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#endif
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@ -1,37 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2007 Michal Simek
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*
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* Michal SIMEK <monstr@monstr.cz>
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*/
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#include <irq_func.h>
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typedef volatile struct microblaze_intc_t {
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int isr; /* interrupt status register */
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int ipr; /* interrupt pending register */
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int ier; /* interrupt enable register */
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int iar; /* interrupt acknowledge register */
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int sie; /* set interrupt enable bits */
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int cie; /* clear interrupt enable bits */
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int ivr; /* interrupt vector register */
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int mer; /* master enable register */
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} microblaze_intc_t;
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struct irq_action {
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interrupt_handler_t *handler; /* pointer to interrupt rutine */
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void *arg;
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int count; /* number of interrupt */
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};
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/**
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* Register and unregister interrupt handler rutines
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*
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* @param irq IRQ number
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* @param hdlr Interrupt handler rutine
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* @param arg Pointer to argument which is passed to int. handler rutine
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* Return: 0 if registration pass, 1 if unregistration pass,
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* or an error code < 0 otherwise
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*/
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int install_interrupt_handler(int irq, interrupt_handler_t *hdlr,
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void *arg);
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