drivers: net: vsc9953: Add LAG support
You can now configure LAG on VSC9953's ports using the command:
ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>}
A port must belong to a single LAG. By default, a port
belongs to a LAG equal to the port's number.
For each frame, a hash will be calculated based on
Source/Destination MAC addresses, Source/Destination IP(v4/v6)
addresses, Source/Destination ports. This hash will be used to
select a single egress port from LAG. This also assures
that frames from the same flow will always have the
same egress port.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Codrin Ciubotariu
Joe Hershberger
parent
bf9f2ed83b
commit
aae0e68909
@ -114,6 +114,17 @@ static int ethsw_ingr_fltr_help_key_func(struct ethsw_command_def *parsed_cmd)
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return CMD_RET_SUCCESS;
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}
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#define ETHSW_PORT_AGGR_HELP "ethsw [port <port_no>] aggr" \
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" { [help] | show | <lag_group_no> } " \
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"- get/set LAG group for a port"
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static int ethsw_port_aggr_help_key_func(struct ethsw_command_def *parsed_cmd)
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{
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printf(ETHSW_PORT_AGGR_HELP"\n");
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return CMD_RET_SUCCESS;
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}
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static struct keywords_to_function {
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enum ethsw_keyword_id cmd_keyword[ETHSW_MAX_CMD_PARAMS];
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int cmd_func_offset;
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@ -532,6 +543,39 @@ static struct keywords_to_function {
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.cmd_func_offset = offsetof(struct ethsw_command_func,
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port_ingr_filt_set),
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.keyword_function = NULL,
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}, {
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.cmd_keyword = {
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ethsw_id_aggr,
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ethsw_id_key_end,
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},
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.cmd_func_offset = -1,
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.keyword_function = ðsw_port_aggr_help_key_func,
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}, {
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.cmd_keyword = {
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ethsw_id_aggr,
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ethsw_id_help,
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ethsw_id_key_end,
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},
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.cmd_func_offset = -1,
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.keyword_function = ðsw_port_aggr_help_key_func,
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}, {
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.cmd_keyword = {
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ethsw_id_aggr,
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ethsw_id_show,
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ethsw_id_key_end,
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},
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.cmd_func_offset = offsetof(struct ethsw_command_func,
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port_aggr_show),
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.keyword_function = NULL,
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}, {
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.cmd_keyword = {
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ethsw_id_aggr,
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ethsw_id_aggr_no,
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ethsw_id_key_end,
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},
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.cmd_func_offset = offsetof(struct ethsw_command_func,
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port_aggr_set),
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.keyword_function = NULL,
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},
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};
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@ -576,6 +620,9 @@ static int keyword_match_pvid(enum ethsw_keyword_id key_id, int argc,
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static int keyword_match_mac_addr(enum ethsw_keyword_id key_id, int argc,
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char *const argv[], int *argc_nr,
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struct ethsw_command_def *parsed_cmd);
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static int keyword_match_aggr(enum ethsw_keyword_id key_id, int argc,
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char *const argv[], int *argc_nr,
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struct ethsw_command_def *parsed_cmd);
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/*
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* Define properties for each keyword;
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@ -661,6 +708,9 @@ struct keyword_def {
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}, {
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.keyword_name = "filtering",
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.match = &keyword_match_gen,
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}, {
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.keyword_name = "aggr",
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.match = &keyword_match_aggr,
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},
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};
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@ -826,6 +876,28 @@ static int keyword_match_mac_addr(enum ethsw_keyword_id key_id, int argc,
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return 1;
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}
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/* Function used to match the command's aggregation number */
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static int keyword_match_aggr(enum ethsw_keyword_id key_id, int argc,
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char *const argv[], int *argc_nr,
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struct ethsw_command_def *parsed_cmd)
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{
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unsigned long val;
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if (!keyword_match_gen(key_id, argc, argv, argc_nr, parsed_cmd))
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return 0;
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if (*argc_nr + 1 >= argc)
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return 1;
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if (strict_strtoul(argv[*argc_nr + 1], 10, &val) != -EINVAL) {
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parsed_cmd->aggr_grp = val;
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(*argc_nr)++;
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parsed_cmd->cmd_to_keywords[*argc_nr] = ethsw_id_aggr_no;
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}
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return 1;
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}
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/* Finds optional keywords and modifies *argc_va to skip them */
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static void cmd_keywords_opt_check(const struct ethsw_command_def *parsed_cmd,
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int *argc_val)
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@ -984,6 +1056,7 @@ static void command_def_init(struct ethsw_command_def *parsed_cmd)
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parsed_cmd->port = ETHSW_CMD_PORT_ALL;
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parsed_cmd->vid = ETHSW_CMD_VLAN_ALL;
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parsed_cmd->aggr_grp = ETHSW_CMD_AGGR_GRP_NONE;
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parsed_cmd->cmd_function = NULL;
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/* We initialize the MAC address with the Broadcast address */
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@ -1024,4 +1097,5 @@ U_BOOT_CMD(ethsw, ETHSW_MAX_CMD_PARAMS, 0, do_ethsw,
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ETHSW_EGR_VLAN_TAG_HELP"\n"
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ETHSW_VLAN_FDB_HELP"\n"
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ETHSW_PORT_INGR_FLTR_HELP"\n"
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ETHSW_PORT_AGGR_HELP"\n"
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);
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@ -31,6 +31,7 @@ Commands supported
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- Port-based VLAN
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- Private/Shared VLAN learning
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- VLAN ingress filtering
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- Port LAG
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Commands syntax
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ethsw [port <port_no>] { enable | disable | show } - enable/disable a port; show a port's configuration
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@ -45,6 +46,7 @@ ethsw [port <port_no>] egress tag { [help] | show | pvid | classified } - config
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Tag's VID could be the frame's classified VID or the PVID of the port
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ethsw vlan fdb { [help] | show | shared | private } - make VLAN learning shared or private
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ethsw [port <port_no>] ingress filtering { [help] | show | enable | disable } - enable/disable VLAN ingress filtering on port
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ethsw [port <port_no>] aggr { [help] | show | <lag_group_no> } - get/set LAG group for a port
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=> ethsw show
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Port Status Link Speed Duplex
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@ -469,6 +469,47 @@ static void vsc9953_vlan_ingr_fltr_learn_drop(int enable)
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clrbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
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}
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enum aggr_code_mode {
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AGGR_CODE_RAND = 0,
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AGGR_CODE_ALL, /* S/D MAC, IPv4 S/D IP, IPv6 Flow Label, S/D PORT */
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};
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/* Set aggregation code generation mode */
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static int vsc9953_aggr_code_set(enum aggr_code_mode ac)
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{
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int rc;
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struct vsc9953_analyzer *l2ana_reg;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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switch (ac) {
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case AGGR_CODE_RAND:
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clrsetbits_le32(&l2ana_reg->common.aggr_cfg,
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VSC9953_AC_DMAC_ENA | VSC9953_AC_SMAC_ENA |
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VSC9953_AC_IP6_LBL_ENA |
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VSC9953_AC_IP6_TCPUDP_ENA |
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VSC9953_AC_IP4_SIPDIP_ENA |
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VSC9953_AC_IP4_TCPUDP_ENA, VSC9953_AC_RND_ENA);
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rc = 0;
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break;
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case AGGR_CODE_ALL:
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clrsetbits_le32(&l2ana_reg->common.aggr_cfg, VSC9953_AC_RND_ENA,
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VSC9953_AC_DMAC_ENA | VSC9953_AC_SMAC_ENA |
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VSC9953_AC_IP6_LBL_ENA |
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VSC9953_AC_IP6_TCPUDP_ENA |
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VSC9953_AC_IP4_SIPDIP_ENA |
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VSC9953_AC_IP4_TCPUDP_ENA);
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rc = 0;
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break;
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default:
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/* unknown mode for aggregation code */
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rc = -EINVAL;
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}
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return rc;
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}
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/* Egress untag modes of a VSC9953 port */
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enum egress_untag_mode {
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EGRESS_UNTAG_ALL = 0,
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@ -1493,6 +1534,224 @@ static int vsc9953_port_ingress_filtering_get(int port_no)
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return !!(val & (1 << port_no));
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}
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/* Get the aggregation group of a port */
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static int vsc9953_port_aggr_grp_get(int port_no, int *aggr_grp)
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{
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u32 val;
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struct vsc9953_analyzer *l2ana_reg;
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if (!VSC9953_PORT_CHECK(port_no))
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return -EINVAL;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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val = in_le32(&l2ana_reg->port[port_no].port_cfg);
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*aggr_grp = bitfield_extract_by_mask(val,
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VSC9953_PORT_CFG_PORTID_MASK);
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return 0;
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}
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static void vsc9953_aggr_grp_members_get(int aggr_grp,
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u8 aggr_membr[VSC9953_MAX_PORTS])
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{
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int port_no;
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int aggr_membr_grp;
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for (port_no = 0; port_no < VSC9953_MAX_PORTS; port_no++) {
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aggr_membr[port_no] = 0;
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if (vsc9953_port_aggr_grp_get(port_no, &aggr_membr_grp))
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continue;
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if (aggr_grp == aggr_membr_grp)
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aggr_membr[port_no] = 1;
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}
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}
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static void vsc9953_update_dest_members_masks(int port_no, u32 membr_bitfld_old,
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u32 membr_bitfld_new)
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{
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int i;
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u32 pgid;
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struct vsc9953_analyzer *l2ana_reg;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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/*
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* NOTE: Only the unicast destination masks are updated, since
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* we do not support for now Layer-2 multicast entries
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*/
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for (i = 0; i < VSC9953_MAX_PORTS; i++) {
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if (i == port_no) {
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clrsetbits_le32(&l2ana_reg->port_id_tbl.port_grp_id[i],
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VSC9953_PGID_PORT_MASK,
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membr_bitfld_new);
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continue;
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}
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pgid = in_le32(&l2ana_reg->port_id_tbl.port_grp_id[i]);
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if ((u32)(1 << i) & membr_bitfld_old & VSC9953_PGID_PORT_MASK)
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pgid &= ~((u32)(1 << port_no));
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if ((u32)(1 << i) & membr_bitfld_new & VSC9953_PGID_PORT_MASK)
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pgid |= ((u32)(1 << port_no));
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out_le32(&l2ana_reg->port_id_tbl.port_grp_id[i], pgid);
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}
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}
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static void vsc9953_update_source_members_masks(int port_no,
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u32 membr_bitfld_old,
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u32 membr_bitfld_new)
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{
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int i;
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int index;
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u32 pgid;
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struct vsc9953_analyzer *l2ana_reg;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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for (i = 0; i < VSC9953_MAX_PORTS + 1; i++) {
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index = PGID_SRC_START + i;
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pgid = in_le32(&l2ana_reg->port_id_tbl.port_grp_id[index]);
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if (i == port_no) {
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pgid = (pgid | VSC9953_PGID_PORT_MASK) &
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~membr_bitfld_new;
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out_le32(&l2ana_reg->port_id_tbl.port_grp_id[index],
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pgid);
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continue;
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}
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if ((u32)(1 << i) & membr_bitfld_old & VSC9953_PGID_PORT_MASK)
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pgid |= (u32)(1 << port_no);
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if ((u32)(1 << i) & membr_bitfld_new & VSC9953_PGID_PORT_MASK)
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pgid &= ~(u32)(1 << port_no);
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out_le32(&l2ana_reg->port_id_tbl.port_grp_id[index], pgid);
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}
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}
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static u32 vsc9953_aggr_mask_get_next(u32 aggr_mask, u32 member_bitfield)
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{
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if (!member_bitfield)
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return 0;
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if (!(aggr_mask & VSC9953_PGID_PORT_MASK))
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aggr_mask = 1;
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else
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aggr_mask <<= 1;
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while (!(aggr_mask & member_bitfield)) {
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aggr_mask <<= 1;
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if (!(aggr_mask & VSC9953_PGID_PORT_MASK))
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aggr_mask = 1;
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}
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return aggr_mask;
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}
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static void vsc9953_update_aggr_members_masks(int port_no, u32 membr_bitfld_old,
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u32 membr_bitfld_new)
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{
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int i;
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u32 pgid;
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u32 aggr_mask_old = 0;
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u32 aggr_mask_new = 0;
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struct vsc9953_analyzer *l2ana_reg;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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/* Update all the PGID aggregation masks */
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for (i = PGID_AGGR_START; i < PGID_SRC_START; i++) {
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pgid = in_le32(&l2ana_reg->port_id_tbl.port_grp_id[i]);
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aggr_mask_old = vsc9953_aggr_mask_get_next(aggr_mask_old,
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membr_bitfld_old);
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pgid = (pgid & ~membr_bitfld_old) | aggr_mask_old;
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aggr_mask_new = vsc9953_aggr_mask_get_next(aggr_mask_new,
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membr_bitfld_new);
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pgid = (pgid & ~membr_bitfld_new) | aggr_mask_new;
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out_le32(&l2ana_reg->port_id_tbl.port_grp_id[i], pgid);
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}
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}
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static u32 vsc9953_aggr_membr_bitfield_get(u8 member[VSC9953_MAX_PORTS])
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{
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int i;
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u32 member_bitfield = 0;
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for (i = 0; i < VSC9953_MAX_PORTS; i++) {
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if (member[i])
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member_bitfield |= 1 << i;
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}
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member_bitfield &= VSC9953_PGID_PORT_MASK;
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return member_bitfield;
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}
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static void vsc9953_update_members_masks(int port_no,
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u8 member_old[VSC9953_MAX_PORTS],
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u8 member_new[VSC9953_MAX_PORTS])
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{
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u32 membr_bitfld_old = vsc9953_aggr_membr_bitfield_get(member_old);
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u32 membr_bitfld_new = vsc9953_aggr_membr_bitfield_get(member_new);
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vsc9953_update_dest_members_masks(port_no, membr_bitfld_old,
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membr_bitfld_new);
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vsc9953_update_source_members_masks(port_no, membr_bitfld_old,
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membr_bitfld_new);
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vsc9953_update_aggr_members_masks(port_no, membr_bitfld_old,
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membr_bitfld_new);
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}
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/* Set the aggregation group of a port */
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static int vsc9953_port_aggr_grp_set(int port_no, int aggr_grp)
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{
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u8 aggr_membr_old[VSC9953_MAX_PORTS];
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u8 aggr_membr_new[VSC9953_MAX_PORTS];
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int rc;
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int aggr_grp_old;
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u32 val;
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struct vsc9953_analyzer *l2ana_reg;
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if (!VSC9953_PORT_CHECK(port_no) || !VSC9953_PORT_CHECK(aggr_grp))
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return -EINVAL;
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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rc = vsc9953_port_aggr_grp_get(port_no, &aggr_grp_old);
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if (rc)
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return rc;
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/* get all the members of the old aggregation group */
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vsc9953_aggr_grp_members_get(aggr_grp_old, aggr_membr_old);
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/* get all the members of the same aggregation group */
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vsc9953_aggr_grp_members_get(aggr_grp, aggr_membr_new);
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/* add current port as member to the new aggregation group */
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aggr_membr_old[port_no] = 0;
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aggr_membr_new[port_no] = 1;
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/* update masks */
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vsc9953_update_members_masks(port_no, aggr_membr_old, aggr_membr_new);
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/* Change logical port number */
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val = in_le32(&l2ana_reg->port[port_no].port_cfg);
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val = bitfield_replace_by_mask(val,
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VSC9953_PORT_CFG_PORTID_MASK, aggr_grp);
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out_le32(&l2ana_reg->port[port_no].port_cfg, val);
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return 0;
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}
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static int vsc9953_port_status_key_func(struct ethsw_command_def *parsed_cmd)
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{
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int i;
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@ -2083,6 +2342,72 @@ static int vsc9953_ingr_fltr_set_key_func(struct ethsw_command_def *parsed_cmd)
|
||||
return CMD_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static int vsc9953_port_aggr_show_key_func(struct ethsw_command_def *parsed_cmd)
|
||||
{
|
||||
int i;
|
||||
int aggr_grp;
|
||||
|
||||
if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
|
||||
if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
|
||||
printf("Invalid port number: %d\n", parsed_cmd->port);
|
||||
return CMD_RET_FAILURE;
|
||||
}
|
||||
|
||||
if (vsc9953_port_aggr_grp_get(parsed_cmd->port, &aggr_grp))
|
||||
return CMD_RET_FAILURE;
|
||||
printf("%7s %10s\n", "Port", "Aggr grp");
|
||||
printf("%7d %10d\n", parsed_cmd->port, aggr_grp);
|
||||
} else {
|
||||
printf("%7s %10s\n", "Port", "Aggr grp");
|
||||
for (i = 0; i < VSC9953_MAX_PORTS; i++) {
|
||||
if (vsc9953_port_aggr_grp_get(i, &aggr_grp))
|
||||
continue;
|
||||
printf("%7d %10d\n", i, aggr_grp);
|
||||
}
|
||||
}
|
||||
|
||||
return CMD_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static int vsc9953_port_aggr_set_key_func(struct ethsw_command_def *parsed_cmd)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Aggregation group number should be set in parsed_cmd->aggr_grp */
|
||||
if (parsed_cmd->aggr_grp == ETHSW_CMD_AGGR_GRP_NONE) {
|
||||
printf("Please set an aggregation group value\n");
|
||||
return CMD_RET_FAILURE;
|
||||
}
|
||||
|
||||
if (!VSC9953_PORT_CHECK(parsed_cmd->aggr_grp)) {
|
||||
printf("Invalid aggregation group number: %d\n",
|
||||
parsed_cmd->aggr_grp);
|
||||
return CMD_RET_FAILURE;
|
||||
}
|
||||
|
||||
if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
|
||||
if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
|
||||
printf("Invalid port number: %d\n", parsed_cmd->port);
|
||||
return CMD_RET_FAILURE;
|
||||
}
|
||||
if (vsc9953_port_aggr_grp_set(parsed_cmd->port,
|
||||
parsed_cmd->aggr_grp)) {
|
||||
printf("Port %d: failed to set aggr group %d\n",
|
||||
parsed_cmd->port, parsed_cmd->aggr_grp);
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < VSC9953_MAX_PORTS; i++) {
|
||||
if (vsc9953_port_aggr_grp_set(i,
|
||||
parsed_cmd->aggr_grp)) {
|
||||
printf("Port %d: failed to set aggr group %d\n",
|
||||
i, parsed_cmd->aggr_grp);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return CMD_RET_SUCCESS;
|
||||
}
|
||||
|
||||
static struct ethsw_command_func vsc9953_cmd_func = {
|
||||
.ethsw_name = "L2 Switch VSC9953",
|
||||
.port_enable = &vsc9953_port_status_key_func,
|
||||
@ -2107,7 +2432,9 @@ static struct ethsw_command_func vsc9953_cmd_func = {
|
||||
.vlan_learn_show = &vsc9953_vlan_learn_show_key_func,
|
||||
.vlan_learn_set = &vsc9953_vlan_learn_set_key_func,
|
||||
.port_ingr_filt_show = &vsc9953_ingr_fltr_show_key_func,
|
||||
.port_ingr_filt_set = &vsc9953_ingr_fltr_set_key_func
|
||||
.port_ingr_filt_set = &vsc9953_ingr_fltr_set_key_func,
|
||||
.port_aggr_show = &vsc9953_port_aggr_show_key_func,
|
||||
.port_aggr_set = &vsc9953_port_aggr_set_key_func,
|
||||
};
|
||||
|
||||
#endif /* CONFIG_CMD_ETHSW */
|
||||
@ -2138,6 +2465,8 @@ void vsc9953_default_configuration(void)
|
||||
vsc9953_vlan_table_membership_all_set(1, 1);
|
||||
vsc9953_vlan_ingr_fltr_learn_drop(1);
|
||||
vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO);
|
||||
if (vsc9953_aggr_code_set(AGGR_CODE_ALL))
|
||||
debug("VSC9953: failed to set default aggregation code mode\n");
|
||||
}
|
||||
|
||||
void vsc9953_init(bd_t *bis)
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
#define ETHSW_MAX_CMD_PARAMS 20
|
||||
#define ETHSW_CMD_PORT_ALL -1
|
||||
#define ETHSW_CMD_VLAN_ALL -1
|
||||
#define ETHSW_CMD_AGGR_GRP_NONE -1
|
||||
|
||||
/* IDs used to track keywords in a command */
|
||||
enum ethsw_keyword_id {
|
||||
@ -41,6 +42,7 @@ enum ethsw_keyword_id {
|
||||
ethsw_id_private,
|
||||
ethsw_id_ingress,
|
||||
ethsw_id_filtering,
|
||||
ethsw_id_aggr,
|
||||
ethsw_id_count, /* keep last */
|
||||
};
|
||||
|
||||
@ -50,6 +52,7 @@ enum ethsw_keyword_opt_id {
|
||||
ethsw_id_pvid_no,
|
||||
ethsw_id_add_del_no,
|
||||
ethsw_id_add_del_mac,
|
||||
ethsw_id_aggr_no,
|
||||
ethsw_id_count_all, /* keep last */
|
||||
};
|
||||
|
||||
@ -58,6 +61,7 @@ struct ethsw_command_def {
|
||||
int cmd_keywords_nr;
|
||||
int port;
|
||||
int vid;
|
||||
int aggr_grp;
|
||||
uchar ethaddr[6];
|
||||
int (*cmd_function)(struct ethsw_command_def *parsed_cmd);
|
||||
};
|
||||
@ -88,6 +92,8 @@ struct ethsw_command_func {
|
||||
int (*vlan_learn_set)(struct ethsw_command_def *parsed_cmd);
|
||||
int (*port_ingr_filt_show)(struct ethsw_command_def *parsed_cmd);
|
||||
int (*port_ingr_filt_set)(struct ethsw_command_def *parsed_cmd);
|
||||
int (*port_aggr_show)(struct ethsw_command_def *parsed_cmd);
|
||||
int (*port_aggr_set)(struct ethsw_command_def *parsed_cmd);
|
||||
};
|
||||
|
||||
int ethsw_define_functions(const struct ethsw_command_func *cmd_func);
|
||||
|
||||
@ -126,6 +126,7 @@
|
||||
#define VSC9953_PORT_CFG_LEARN_AUTO 0x00000100
|
||||
#define VSC9953_PORT_CFG_LEARN_CPU 0x00000200
|
||||
#define VSC9953_PORT_CFG_LEARN_DROP 0x00000400
|
||||
#define VSC9953_PORT_CFG_PORTID_MASK 0x0000003c
|
||||
|
||||
/* Macros for vsc9953_qsys_sys.switch_port_mode register */
|
||||
#define VSC9953_PORT_ENA 0x00002000
|
||||
@ -156,6 +157,19 @@
|
||||
/* Macros for vsc9953_ana_ana_tables.mach_data register */
|
||||
#define VSC9953_MACHDATA_VID_MASK 0x1fff0000
|
||||
|
||||
/* Macros for vsc9953_ana_common.aggr_cfg register */
|
||||
#define VSC9953_AC_RND_ENA 0x00000080
|
||||
#define VSC9953_AC_DMAC_ENA 0x00000040
|
||||
#define VSC9953_AC_SMAC_ENA 0x00000020
|
||||
#define VSC9953_AC_IP6_LBL_ENA 0x00000010
|
||||
#define VSC9953_AC_IP6_TCPUDP_ENA 0x00000008
|
||||
#define VSC9953_AC_IP4_SIPDIP_ENA 0x00000004
|
||||
#define VSC9953_AC_IP4_TCPUDP_ENA 0x00000002
|
||||
#define VSC9953_AC_MASK 0x000000fe
|
||||
|
||||
/* Macros for vsc9953_ana_pgid.port_grp_id[] registers */
|
||||
#define VSC9953_PGID_PORT_MASK 0x000003ff
|
||||
|
||||
#define VSC9953_MAX_PORTS 10
|
||||
#define VSC9953_PORT_CHECK(port) \
|
||||
(((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1)
|
||||
@ -239,6 +253,10 @@ struct vsc9953_ana_ana {
|
||||
u32 port_mode[12];
|
||||
};
|
||||
|
||||
#define PGID_DST_START 0
|
||||
#define PGID_AGGR_START 64
|
||||
#define PGID_SRC_START 80
|
||||
|
||||
struct vsc9953_ana_pgid {
|
||||
u32 port_grp_id[91];
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user