Convert CONFIG_SYS_NAND_PAGE_2K et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_NAND_PAGE_2K
   CONFIG_SYS_NAND_PAGE_4K

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini 2022-11-12 17:36:49 -05:00
parent 1a792803d8
commit a9f03760c1
9 changed files with 15 additions and 14 deletions

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@ -80,6 +80,7 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_PAGE_4K=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y

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@ -58,6 +58,7 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_PAGE_4K=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y

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@ -168,6 +168,19 @@ config SYS_NAND_SOFT_ECC
endchoice
choice
prompt "NAND page size"
depends on NAND_DAVINCI
default SYS_NAND_PAGE_2K
config SYS_NAND_PAGE_2K
bool "Page size is 2K"
config SYS_NAND_PAGE_4K
bool "Page size is 4K"
endchoice
config KEYSTONE_RBL_NAND
depends on ARCH_KEYSTONE
def_bool y

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@ -107,7 +107,6 @@
* Flash & Environment
*/
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_MASK_CLE 0x10

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@ -36,9 +36,6 @@
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* NAND Configuration */
#define CONFIG_SYS_NAND_PAGE_2K
/* Network */
#define CONFIG_KSNET_NETCP_V1_5
#define CONFIG_KSNET_CPSW_NUM_PORTS 9

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@ -50,9 +50,6 @@
"get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}\0"\
"name_fs=arago-base-tisdk-image-k2g-evm.cpio\0"
/* NAND Configuration */
#define CONFIG_SYS_NAND_PAGE_2K
/* Network */
#define CONFIG_KSNET_NETCP_V1_5
#define CONFIG_KSNET_CPSW_NUM_PORTS 2

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@ -36,9 +36,6 @@
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* NAND Configuration */
#define CONFIG_SYS_NAND_PAGE_2K
/* Network */
#define CONFIG_KSNET_NETCP_V1_0
#define CONFIG_KSNET_CPSW_NUM_PORTS 5

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@ -36,9 +36,6 @@
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* NAND Configuration */
#define CONFIG_SYS_NAND_PAGE_4K
/* Network */
#define CONFIG_KSNET_NETCP_V1_5
#define CONFIG_KSNET_CPSW_NUM_PORTS 5

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@ -105,7 +105,6 @@
* Flash & Environment
*/
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_MASK_CLE 0x10